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Articles 31 - 60 of 488
Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
Optimization And Acceleration Of Puf Design Through Reduced Order Standard Cell Modeling, Ian Z. Wilcox
Optimization And Acceleration Of Puf Design Through Reduced Order Standard Cell Modeling, Ian Z. Wilcox
Electrical and Computer Engineering ETDs
Application Specific Integrated Circuit (ASIC) designs continue to scale with ever increasing complexity and device counts in the billions. Demand for scalable high-fidelity simulations of these systems drives the need for the development of novel modeling capabilities. This research formulates a non-intrusive model order reduc-tion (MOR) framework, called PUF-ROMS, to accelerate and optimize the design and analysis of physical unclonable functions (PUFs) on ASICs. The primary goals of PUF-ROMS are to estimate entropy and temperature-voltage noise (TV-noise) of circuit structures used in the design in an accelerated evaluation environment to enable designers to explore architecture options with the goal of …
Statistical Monitoring Of Hard Faults In Digital Systems, Dany Akshay Deep Isukapalli
Statistical Monitoring Of Hard Faults In Digital Systems, Dany Akshay Deep Isukapalli
Electrical Engineering Theses and Dissertations
Achieving a high test coverage is crucial for helping to ensure that integrated circuits are working correctly and are non-defective. Although scan-based structural tests are used throughout the industry, high-level functional tests may be needed to detect some defects— especially those that are environmentally sensitive. Unfortunately, the character of functional test makes it difficult to obtain high coverage, and it is even hard to estimate coverage because fault simulation times of large circuits are long. As a result, some method is required for predicting the ability of a functional test that has not been fault simulated to detect defects. In …
Development Of An Embedded Iot Board For Real-Time Floor Estimation Of Autonomous Robots, Carter J. Sorensen
Development Of An Embedded Iot Board For Real-Time Floor Estimation Of Autonomous Robots, Carter J. Sorensen
Electronic Theses and Dissertations
As service robots become more prevalent in multi-story environments such as hospitals, hotels, and laboratories, accurate floor-level detection is critical to ensuring operational reliability. Consider a robot tasked with delivering medical samples in a multi-story laboratory. Without accurate feedback, a robot exiting on the wrong floor could introduce delays, disrupt workflows, or compromise sample integrity. Internet of Things (IoT) technologies offer a way to address these risks by providing real-time error detection and corrective capability. However, current IoT-based floor estimation systems often require invasive modifications to building infrastructure—particularly elevator control panels. These approaches introduce challenges related to cost, liability, backward …
Reverse Engineering Bring Up And Profiling Of Multi-Fpga Systems, Henry A. Evans
Reverse Engineering Bring Up And Profiling Of Multi-Fpga Systems, Henry A. Evans
Master's Theses
FPGAs have long been used for prototyping and verifying high-speed digital designs in industry and in academic research. As ASIC designs have grown in complexity and size, prototyping those designs on FPGAs has required multiple FPGAs that sometimes span multiple servers. Western Digital donated multiple FPGA-based systems to Cal Poly in 2023. These servers contain multiple high-end AMD FPGAs that are ideal for prototyping large high-speed digital designs, however the full documentation on how to use the servers and how the servers work was not provided. The servers did not come with any information on how to program the FPGAs, …
Analog Hardware Implementation Of A Linearly Constrained Quadratic Program Real-Time Solver, Claire E. Tylutki, Claire Tylutki
Analog Hardware Implementation Of A Linearly Constrained Quadratic Program Real-Time Solver, Claire E. Tylutki, Claire Tylutki
Master's Theses
This thesis presents the design, implementation, and analysis of a hardware system for solving Linearly Constrained Quadratic Programs (LCQPs) in real time. The architecture follows a generalized feedback structure composed of three key elements: gradient descent on the quadratic cost function, saturation-based nonlinearity to enforce inequality constraints, and an integral controller with an anti-windup mechanism to regulate dynamic behavior and determine steady-state error. This majority analog system converges with equilibria that satisfy the Karush-Kuhn-Tucker (KKT) optimality conditions. Using a representative LCQP, this work presents simulation of the circuit in PLECS and LT Spice to confirm the feasibility of the novel …
Open Source Asic Design Curriculum, Francisco Wilken
Open Source Asic Design Curriculum, Francisco Wilken
Master's Theses
The ever-growing importance of Application-Specific Integrated Circuits (ASICs) in a high-compute world necessitates that college graduates entering the workforce are well prepared to design them. This thesis details the design of novel ASIC curriculum, using open source tools to teach at the undergraduate level. By moving to a higher level of abstraction than classical transistor-focused coursework, chip design material can be made accessible earlier in an undergraduate degree. Additionally, open source tools provide a powerful, free, and portable platform for students to create their own designs, solving assignments focused on industry readiness. Finally, this thesis studies the results and challenges …
Design Of A Subthreshold Cmos Inverter-Based Amplifier For Low-Noise And Low-Power Applications, Landon Alexander Schmucker
Design Of A Subthreshold Cmos Inverter-Based Amplifier For Low-Noise And Low-Power Applications, Landon Alexander Schmucker
Electrical and Computer Engineering ETDs
Amplification is a fundamental function in most analog circuits. There is a fast-growing demand for low-power, low-noise, and high-gain amplifiers. Modern semiconductor processes are increasingly optimized for digital applications, which has introduced new challenges in analog design. To address these challenges, analog designers have investigated replacing conventional analog circuits with digital implementations. One promising application is the typical CMOS inverter as an amplifier.
This research presents a CMOS inverter-based amplifier with feedback designed to achieve low power consumption, low input noise, and high gain. Unlike typical CMOS inverter-based amplifiers, this topology has two distinctive features: (1) it uses a MOSFET …
Development Of Interactive Games On An Affordable Braille Display, Daniel Tsivkovski, Dylan Ravel, Maryam Etezad
Development Of Interactive Games On An Affordable Braille Display, Daniel Tsivkovski, Dylan Ravel, Maryam Etezad
Student Scholar Symposium Abstracts and Posters
Developing an affordable and STEM learning-focused Braille display addresses a significant disparity in the market for Braille displays, where most fail to provide a cost-effective, accessible, and education-oriented solution. This research aims to bridge this gap through innovative hardware and software development, offering a comprehensive learning experience to elementary school children (K-6) who are blind/visually impaired. The hardware features a piezo-electric tactile display that displays up to six Braille characters at once or a shape in an 8x8 pin array configuration. The educational software includes a user-friendly website packed with engaging STEM activities specifically designed for blind/visually impaired children. The …
Breaking New Ground: Division Directly In Memory, M. Hassan Najafi, Mehran Shoushtari Moghadam
Breaking New Ground: Division Directly In Memory, M. Hassan Najafi, Mehran Shoushtari Moghadam
Faculty Scholarship
In-memory computing (IMC) has emerged as a promising paradigm for overcoming the limitations of traditional von Neumann architectures by reducing data movement and enhancing computational efficiency. Despite significant advancements in this area, implementing complex arithmetic operations, such as division, directly within memory has remained an elusive challenge. This paper introduces a pioneering technique for performing division operations directly in memory, representing the first successful integration of such functionality into the IMC framework. Our approach leverages an innovative circuit based on an unconventional model of computing–stochastic computing (SC). Our technique extends the computational capabilities of IMC systems and paves the way …
Development Of A Cost-Effective Daq For Measuring Brake Performance In Race Cars, Adrin Alias
Development Of A Cost-Effective Daq For Measuring Brake Performance In Race Cars, Adrin Alias
2025 Spring Honors Capstone Projects - Archive
This project explores the feasibility of creating a cost-effective data acquisition (DAQ) system for high-speed, real-time brake performance testing of Formula SAE racecars. The research addresses the limitations of the current MoTeC DAQ system currently employed by the team, which is costly and time-consuming to set up for on-car testing. The team will use a brake dynamometer for steady-state comparisons of different brake pad compounds (senior design project), but evaluating real-world performance requires on-car testing. By systematically comparing various hardware platforms, sensors, communication protocols, and storage solutions, this project aims to balance cost-efficiency with reliability and performance. The research evaluates …
Design Considerations Of A Gpu, Nicholas M. Devilliers
Design Considerations Of A Gpu, Nicholas M. Devilliers
Electrical Engineering and Computer Science Undergraduate Honors Theses
With the current era of AI technology, the era of single instruction multiple data has become an increasingly viable solution to accelerate training. The problem is that while software to use GPUs and other hardware accelerators, designing GPUs and ASIC devices has become increasingly more expensive and there aren’t great examples of generic GPUs that anyone can use and modify. In this thesis, there are four design considerations that will be discussed and how they affect the result of a generic GPU. The four considerations that were talked about in the thesis are, word width, arithmetic type, number of stages, …
Lightlink: Visible Light Communication For Batteryless Devices With Variable Computational Load, Charles Phillips
Lightlink: Visible Light Communication For Batteryless Devices With Variable Computational Load, Charles Phillips
All Theses
Visible Light Communication (VLC) devices have been experimentally proven to work as a suitable communication medium for batteryless devices. However, the effects of practical load have yet to be fully explored. To that end, we have developed LightLink, a new MAC and PHY layer protocol for VLC within batteryless devices, and have studied various ways that computational load can affect transmission accuracy in realistic scenarios. Our key findings point us towards an adaptive VLC reception system based on inferred environmental variables.
Blockchain-Integrated Version Control For Secure And Transparent Software Supply Chains, Iwinosa W. Aideyan
Blockchain-Integrated Version Control For Secure And Transparent Software Supply Chains, Iwinosa W. Aideyan
All Theses
The software supply chain encompasses all stages of software development and delivery from initial coding and version control to integration and deployment. As development environments become increasingly distributed and reliant on external dependencies, ensuring the integrity, auditability, and consistency of code changes has become a pressing challenge. Traditional version control systems like Git, while effective for collaboration and tracking revisions, do not inherently provide tamper-evident commit histories. Features such as history rewriting (e.g., git rebase, git push --force) can be exploited to manipulate commit logs without detection, posing risks in security-sensitive domains. This thesis proposes a blockchain-integrated version control framework …
Hybrid Dc-Dc Converters For Soft Charging Capacitive Actuators: Modeling, Analysis And Design, Bahlakoana Mabetha
Hybrid Dc-Dc Converters For Soft Charging Capacitive Actuators: Modeling, Analysis And Design, Bahlakoana Mabetha
Dartmouth College Ph.D Dissertations
Recent trends in haptics, microrobotics and ultrasound technology have shown an increasing use of piezoelectric and other electrostatic actuators. These actuators are suited for miniaturized applications due to their high power density and favorable scalability at a small size. Their electrical impedance at lower frequency (their typical operating range) is capacitive, therefore, they can be modeled as capacitive loads.
The driving circuits for capacitive actuators need to deliver and recover (bidirectional) dominantly reactive power, unlike typical power electronics converters for resistive loads which deliver (unidirectional) real power to the load. Therefore, the circuits, operation, and optimization required to drive these …
Artificial Intelligence Applications For Grid-Connected Solar Inverters, Utkirjon Ubaydullaev, Sarvinoz Mirzaeva, Hasan Mustafoev
Artificial Intelligence Applications For Grid-Connected Solar Inverters, Utkirjon Ubaydullaev, Sarvinoz Mirzaeva, Hasan Mustafoev
Chemical Technology, Control and Management
The increasing global demand for renewable energy has highlighted the importance of grid-connected solar inverters in ensuring efficient and stable power conversion. However, challenges such as fluctuations in solar energy generation, grid disturbances, and power quality issues necessitate advanced control strategies. The integration of artificial intelligence (AI) into solar inverters presents a transformative solution, enhancing performance, adaptability, and reliability in real-world applications.
This review explores the role of AI techniques, including machine learning (ML), deep learning (DL), fuzzy logic, and reinforcement learning (RL), in optimizing key inverter functionalities such as maximum power point tracking (MPPT), fault detection, power quality enhancement, …
Amplification In Mems Rlc Circuits For Enhanced Sensitivity And Mems Applications, Mutaz Mohd Hamdi Al Fayad
Amplification In Mems Rlc Circuits For Enhanced Sensitivity And Mems Applications, Mutaz Mohd Hamdi Al Fayad
Durham School of Architectural Engineering and Construction: Dissertations, Theses, and Student Research
Micro-electro-mechanical systems (MEMS) have garnered significant attention due to their unique characteristics, including small size, high sensitivity, and cost-effective mass production. While electrostatic actuation offers low power consumption, it requires high voltage to move the MEMS structure, posing a challenge for applications such as RF switches and MEMS resonator-based sensors. Reducing the required input voltage for electrostatic MEMS remains a key research focus.
This thesis investigates voltage amplification in electrostatic MEMS through integration with resonant RLC circuits. By leveraging resonance, optimized configurations are designed to maximize voltage gain and enhance the signal-to-noise ratio. Through theoretical modeling and simulations using MATLAB …
Automatic Cat Caretaker, Connor Mcclenathan, Ryan Anderson, Andrew Tate
Automatic Cat Caretaker, Connor Mcclenathan, Ryan Anderson, Andrew Tate
Williams Honors College, Honors Research Projects
This project will involve developing and constructing a self-cleaning litter box with feeding and watering functions attached. The machine will have a user interface for setting both the feeding and watering times, as well as how much to fill the food and water bowls at the same time. The project will involve the use of motors for the cleaning, feeding, and watering functions, sensors to detect when to perform those functions, and a microcontroller to process all the data and to tell the motors when to perform their respective functions. This project's goal is to make the task of caring …
Trace Flight Computer, Zachary Stratton, Vandad Mossavand Varkaneh, Nicholas Ely
Trace Flight Computer, Zachary Stratton, Vandad Mossavand Varkaneh, Nicholas Ely
Williams Honors College, Honors Research Projects
In the world of collegiate rocketry, there are currently no commercial-off-the-shelf flight computers capable of being fitted to liquid engine rockets with thrust vectoring control. Currently, amateur rocketeers utilize unreliable Arduino-based systems or expensive drone computers. The objective of this project is to design a flight computer capable of data collection and filtering, telemetry transmission, and real-time controls of critical safety systems using readily available commercial-off-the-shelf components to allow rocketeers to complete their designs within a reasonable budget. The system will collect data from two IMUs, a barometric altimeter, and a magnetometer, then filter the collected data using custom Kalman …
Autonomous Landscape Exploration Rover Using Imaging Surface Navigation (Alexis), Noah Jones, Dominic Salupo
Autonomous Landscape Exploration Rover Using Imaging Surface Navigation (Alexis), Noah Jones, Dominic Salupo
Williams Honors College, Honors Research Projects
The objective is to develop a small-form-factor rover prototype that can be used to prove out a novel traversal method for use on extraterrestrial surfaces. The novel traversal method being proposed is LIDAR/CV-enhanced navigation, provided by a detachable flight vehicle that can communicate with the rover. On planets with thin atmospheres, cold gas thrusters or similar may be needed, but for the scope of this project more traditional flight/propulsion methods will be used.
From Tpu To Qpu: Bridging Fidelity Gaps Across Next-Generation Computing Systems, Mohammad Walid M. Charrwi
From Tpu To Qpu: Bridging Fidelity Gaps Across Next-Generation Computing Systems, Mohammad Walid M. Charrwi
Dissertations and Theses
Modern computing systems continue to advance rapidly, enabling unprecedented computational capabilities across diverse domains. Among these powerful architectures are AI accelerators such as Tensor Processing Units (TPUs) and quantum computing systems utilizing Quantum Processing Units (QPUs) stand out as trans-formative technologies. Despite their potential, these systems share significant challenges related to hardware infidelity, manifested as error-induced degradation in computational accuracy and reliability. This thesis explicitly addresses cost-effective methods to screen-out defective AI accelerators across next-generation computing architectures and boost quantum circuit output fidelity through hierarchical circuit optimization using advanced machine learning methodologies.
This thesis first proposes a cost-effective testing methodology …
Batteryless Nfc-Enabled Wireless Sensor Node: Design, Optimization, And Implementation, Rishin Patra
Batteryless Nfc-Enabled Wireless Sensor Node: Design, Optimization, And Implementation, Rishin Patra
Dissertations, Master's Theses and Master's Reports
This thesis presents the design, construction, and testing of a batteryless Near-field communication (NFC) powered wireless sensor node intended for maintenance free, short range Internet of Things (IoT) applications. The work focuses on harvesting energy from a 13.56 MHz NFC field to power a very low-power sensing platform capa- ble of measuring temperature, pressure, and humidity without the use of batteries or wired power. The motivation behind this approach is the growing need for reliable, sustainable, and low-maintenance sensing systems that can operate in environments where battery replacement is impractical, undesirable, or environmentally costly. The prototype is built around a …
Fail-Safe Logic Design Strategies Within Modern Fpga Architectures, Priya A. Bhakta
Fail-Safe Logic Design Strategies Within Modern Fpga Architectures, Priya A. Bhakta
Electrical and Computer Engineering ETDs
Field Programmable Gate Arrays (FPGAs) are vulnerable to radiation-induced single event upsets (SEUs) and fault injection attacks, requiring the use of redundancy techniques such as fail-safe computing. Fail-safe computing refers to computing systems that revert to a non-operational safe state when a fault occurs. This work investigates circuit-level techniques and implements fail-safe computing processes as mitigation for SEUs and fault injection attacks on FPGAs. The analysis reveals vulnerabilities that exist in FPGAs over those in application-specific integrated circuits (ASIC); thus, requiring a more elaborate network of redundant circuits and checking logic. The reconfiguration capability of FPGAs adds complexity to fail-safe …
Automated Solutions For Hydroponic Plant Growth, Sydney Mcclure, Adam Lachguar
Automated Solutions For Hydroponic Plant Growth, Sydney Mcclure, Adam Lachguar
Sustainability Conference
Within the past year, Project H.O.M.E. has been focusing on the design and development of a semi-automatic hydroponic system specifically for sustaining plant life in Martian-like conditions. Given the significance of extended space-based travel, where the duration of human life in space is a crucial factor, growing food becomes imperative. This project has integrated electrical engineering and computer science, with features like automated pH testing and sensor-based evaluations. Key functionalities, including timed watering and automatic adjustments, were coded to enhance plant care. Initially, the project’s comprehensive research and strategic planning resulted in detailed blueprints and computer-aided design models for the …
Hypoxic Incubator: Improving Robustness/Reliability And Demonstrating Physiological Efficacy, Damon Dennis Tan
Hypoxic Incubator: Improving Robustness/Reliability And Demonstrating Physiological Efficacy, Damon Dennis Tan
Master's Theses
The Microphysiological Systems Laboratory aims to develop colorectal cancer tumor models under a hypoxic environment to assess model response to pharmaceutical compounds in vitro. To perform relevant studies, researchers have attempted to use different hypoxic inducing strategies such as a nitrogen pod and hypoxic incubator to recreate in vivo physiological responses to hypoxia. However, studies would be interrupted due to incubator functionality failure. To ensure successful and physiologically relevant studies, I improved and verified the robustness and reliability of a hypoxic incubator previously designed and manufactured in the lab. Through the testing and iterating design processes, I engineered and implemented …
Design And Implementation Of An Inverted Short Baseline Acoustic Positioning System, Jakob Frabosilio
Design And Implementation Of An Inverted Short Baseline Acoustic Positioning System, Jakob Frabosilio
Master's Theses
This document details the design, implementation, testing, and analysis of an inverted short baseline acoustic positioning system. The system presented here is an above-water, air-based prototype for an underwater acoustic positioning system; it is designed to determine the position of remotely-operated underwater vehicles (ROVs) and autonomous underwater vehicles (AUVs) in the global frame using a method that does not drift over time.
A ground-truth positioning system is constructed using a stacked hexapod platform actuator, which mimics the motion of an AUV and provides the true position of an ultrasonic microphone array. An ultrasonic transmitter sends a pulse of sound towards …
Applying Circuit Theory To Describe Changes In Structural Landscape Connectivity In Response To Wildfire, Christian Ross Nielsen
Applying Circuit Theory To Describe Changes In Structural Landscape Connectivity In Response To Wildfire, Christian Ross Nielsen
School of Natural Resources: Dissertations, Theses, and Student Research
Understanding and conserving ecological connectivity is critical to the preservation of vulnerable landscapes. Circuit theory, in which landscapes are imagined as circuit boards with varying resistances to the flow of current, is being increasingly used to model spatially explicit connectivity of landscapes and to inform land management and conservation decision-making. Utilizing continuous, quantitative estimates of percent cover by five land cover functional groups to create a conductance surface, this study expanded upon an established application of circuit theory that used the open-source software Circuitscape to model species-agnostic, omnidirectional connectivity. This model was automated using Python to create time-series connectivity maps …
Periodic Information Leakage Fault Detection On A Risc-V Microprocessor, Idris Somoye
Periodic Information Leakage Fault Detection On A Risc-V Microprocessor, Idris Somoye
Electrical and Computer Engineering ETDs
The execution behavior of a Microprocessor (μP) in the presence of a fault is difficult to predict because of the complex interactions across pipeline stages and between functional units within the architecture. Fault effects are known to not introduce any type of anomaly in the input-output behavior for 10s of thousands to millions of clock cycles. These characteristics increase the difficulty of evaluating μP architectures for resilience to information leakage events, i.e., scenarios where a fault causes sensitive data such as an encryption key to be inadvertently diverted to a primary output channel. This dissertation explores two promising strategies for …
New Improvements To Defend Against Power Analysis Attacks In Ijtag Access Protocol, Haoran Wei
New Improvements To Defend Against Power Analysis Attacks In Ijtag Access Protocol, Haoran Wei
Computer Science and Engineering Theses and Dissertations
More and more instruments are now integrated on the chip for testing, debugging, monitoring, and post-silicon validation. IEEE Std 1687 (IJTAG) provides efficient access to these instruments. At the same time, techniques for an attacker to steal important data through the IJTAG network have also emerged. To improve the security of the IJTAG network and especially the communication between software and a board, others have proposed a security access protocol with several possible implementations based on an information hiding method. For example, one version of this previously published bidirectional authentication access protocol uses multiple templates to embed keys to improve …
Fast And Accurate Automatic Design Of Spiral Inductors From High-Level Specification, Heba Ismail
Fast And Accurate Automatic Design Of Spiral Inductors From High-Level Specification, Heba Ismail
Theses and Dissertations
Integrated on-chip planar spiral inductors are widely employed in communication circuit blocks and other various electronic devices, thus becoming an essential passive component of RF integrated circuits (RFICs). A common vital spiral inductor design problem is determining the optimum layout parameters of spiral inductors that yield the desired inductance value and achieve highest quality factor at the intended operating frequency. Various approaches tackle this difficulty, but the most prevalent approaches for designing inductors are using an electromagnetic simulator or a library of pre-designed inductors. The latter approach requires an extensive amount of time and computational resources, whereas the former restricts …
Physical Effects On The Worst-Case Delay Analysis And Signal Integrity Of Buses And Spirals, Mahmoud Mahany
Physical Effects On The Worst-Case Delay Analysis And Signal Integrity Of Buses And Spirals, Mahmoud Mahany
Theses and Dissertations
Physical effects have a significant impact on the IC design which will be investigated in this thesis. Moving toward advanced technology nodes, magnetic effects become more dominant than capacitive effects. As the dimensions of the devices go down and the interconnect manipulates the circuit behavior more and more. Cross talking and voltage drops are affecting the design heavily, however - going to the full electromagnetic point of view - current return path (CRP) adds significant parasitics to the performance of the chip. Neglecting the CRP gives wrong intuition and simulation of the designs, especially that the environment and surroundings can …