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VLSI and Circuits, Embedded and Hardware Systems Commons™
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Articles 1 - 17 of 17
Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
Reinventing Integrated Photonic Devices And Circuits For High Performance Communication And Computing Applications, Venkata Sai Praneeth Karempudi
Reinventing Integrated Photonic Devices And Circuits For High Performance Communication And Computing Applications, Venkata Sai Praneeth Karempudi
Theses and Dissertations--Electrical and Computer Engineering
The long-standing technological pillars for computing systems evolution, namely Moore's law and Von Neumann architecture, are breaking down under the pressure of meeting the capacity and energy efficiency demands of computing and communication architectures that are designed to process modern data-centric applications related to Artificial Intelligence (AI), Big Data, and Internet-of-Things (IoT). In response, both industry and academia have turned to 'more-than-Moore' technologies for realizing hardware architectures for communication and computing. Fortunately, Silicon Photonics (SiPh) has emerged as one highly promising ‘more-than-Moore’ technology. Recent progress has enabled SiPh-based interconnects to outperform traditional electrical interconnects, offering advantages like high bandwidth density, …
A Novel Processor Architecture Implementing The Stacked Error Diffusion Algorithm And Its Zynq-Based Realization, Qishi Hu
Theses and Dissertations--Electrical and Computer Engineering
Digital halftoning reproduces continuous-tone images using patterns of black and white dots, while multitoning extends this concept by incorporating inks with intermediate intensities. These techniques are extensively utilized in the printing industry to accommodate the limited range of inks available in printers. Stacked error diffusion is a high-quality multitoning algorithm that adheres to the blue-noise dithering standard. This thesis research studies the potential parallelism inherent in the algorithm and introduces the design of a novel processor architecture optimized for efficient execution. The architecture is realized on an FPGA development board featuring a Zynq SoC. Additionally, the hardware prototype can also …
A Phase Change Memory And Dram Based Framework For Energy-Efficient And High-Speed In-Memory Stochastic Computing, Supreeth Mysore
A Phase Change Memory And Dram Based Framework For Energy-Efficient And High-Speed In-Memory Stochastic Computing, Supreeth Mysore
Theses and Dissertations--Electrical and Computer Engineering
Convolutional Neural Networks (CNNs) have proven to be highly effective in various fields related to Artificial Intelligence (AI) and Machine Learning (ML). However, the significant computational and memory requirements of CNNs make their processing highly compute and memory-intensive. In particular, the multiply-accumulate (MAC) operation, which is a fundamental building block of CNNs, requires enormous arithmetic operations. As the input dataset size increases, the traditional processor-centric von-Neumann computing architecture becomes ill-suited for CNN-based applications. This results in exponentially higher latency and energy costs, making the processing of CNNs highly challenging.
To overcome these challenges, researchers have explored the Processing-In Memory (PIM) …
Energy-Efficient And Secure Hardware Using Adiabatic Logic And Non-Volatile Mtj Devices, Zachary Kahleifeh
Energy-Efficient And Secure Hardware Using Adiabatic Logic And Non-Volatile Mtj Devices, Zachary Kahleifeh
Theses and Dissertations--Electrical and Computer Engineering
Internet of Things (IoT) is a collection of devices that exchange data through a network to implement complex applications. IoT devices increase the quality of life of their user base which has a wide variety such as the medical field, consumer electronics, and the manufacturing sector. However, IoT devices have several challenges that need to be overcome namely, security and energy consumption. The threat vector that IoT devices face is growing and includes the following threats, the leakage of information through a side-channel attack known as the Correlation Power Analysis (CPA), authentication, piracy, etc. A side-channel attack is an attack …
Combining Approximate Computing And Adiabatic Logic For Low-Power And Energy-Efficient Iot Edge Computing, Wu Yang
Theses and Dissertations--Electrical and Computer Engineering
The growing data-intensive applications that run on IoT edge devices require the circuit to be low-power consumption and energy-efficient for limited resources. As conventional Complementary Metal-Oxide-Semiconductor (CMOS) scales down to the nanometer technology node, it reaches its limits, such as leakage and power consumption. Adiabatic logic and approximate computing are emerging techniques for the low-power circuit. Adiabatic logic can recycle energy which is a promising solution for building energy-efficient circuits. However, the power clock scheme and dual-rail structure of adiabatic logic increase the overall area. Power consumption is further reduced by applying approximate computing while reducing the complexity and size …
Designing Novel Hardware Security Primitives For Smart Computing Devices, Amitkumar Degada
Designing Novel Hardware Security Primitives For Smart Computing Devices, Amitkumar Degada
Theses and Dissertations--Electrical and Computer Engineering
Smart computing devices are miniaturized electronics devices that can sense their surroundings, communicate, and share information autonomously with other devices to work cohesively. Smart devices have played a major role in improving quality of the life and boosting the global economy. They are ubiquitously present, smart home, smart city, smart girds, industry, healthcare, controlling the hazardous environment, and military, etc. However, we have witnessed an exponential rise in potential threat vectors and physical attacks in recent years. The conventional software-based security approaches are not suitable in the smart computing device, therefore, hardware-enabled security solutions have emerged as an attractive choice. …
Resource Efficient Design Of Quantum Circuits For Cryptanalysis And Scientific Computing Applications, Edgard Munoz-Coreas
Resource Efficient Design Of Quantum Circuits For Cryptanalysis And Scientific Computing Applications, Edgard Munoz-Coreas
Theses and Dissertations--Electrical and Computer Engineering
Quantum computers offer the potential to extend our abilities to tackle computational problems in fields such as number theory, encryption, search and scientific computation. Up to a superpolynomial speedup has been reported for quantum algorithms in these areas. Motivated by the promise of faster computations, the development of quantum machines has caught the attention of both academics and industry researchers. Quantum machines are now at sizes where implementations of quantum algorithms or their components are now becoming possible. In order to implement quantum algorithms on quantum machines, resource efficient circuits and functional blocks must be designed. In this work, we …
Emerging Computing Based Novel Solutions For Design Of Low Power Circuits, Azhar Mohammad
Emerging Computing Based Novel Solutions For Design Of Low Power Circuits, Azhar Mohammad
Theses and Dissertations--Electrical and Computer Engineering
The growing applications for IoT devices have caused an increase in the study of low power consuming circuit design to meet the requirement of devices to operate for various months without external power supply. Scaling down the conventional CMOS causes various complications to design due to CMOS properties, therefore various non-conventional CMOS design techniques are being proposed that overcome the limitations. This thesis focuses on some of those emerging and novel low power design technique namely Adiabatic logic and low power devices like Magnetic Tunnel Junction (MTJ) and Carbon Nanotube Field Effect transistor (CNFET). Circuits that are used for large …
Energy-Efficient And Secure Hardware For Internet Of Things (Iot) Devices, Dinesh Kumar Selvakumaran
Energy-Efficient And Secure Hardware For Internet Of Things (Iot) Devices, Dinesh Kumar Selvakumaran
Theses and Dissertations--Electrical and Computer Engineering
Internet of Things (IoT) is a network of devices that are connected through the Internet to exchange the data for intelligent applications. Though IoT devices provide several advantages to improve the quality of life, they also present challenges related to security. The security issues related to IoT devices include leakage of information through Differential Power Analysis (DPA) based side channel attacks, authentication, piracy, etc. DPA is a type of side-channel attack where the attacker monitors the power consumption of the device to guess the secret key stored in it. There are several countermeasures to overcome DPA attacks. However, most of …
Parameters Affecting The Resistivity Of Lp-Ebid Deposited Copper Nanowires, Gabriel Smith
Parameters Affecting The Resistivity Of Lp-Ebid Deposited Copper Nanowires, Gabriel Smith
Theses and Dissertations--Electrical and Computer Engineering
Electron Beam Induced Deposition (EBID) is a direct write fabrication process with applications in circuit edit and debug, mask repair, and rapid prototyping. However, it suffers from significant drawbacks, most notably low purity. Work over the last several years has demonstrated that deposition from bulk liquid precursors, rather than organometallic gaseous precursors, results in high purity deposits of low resistivity (LPEBID). In this work, it is shown that the deposits resulting from LP-EBID are only highly conductive when deposited at line doses below 25μC/cm. When the dose exceeds this value, the resulting structure is highly porous providing a poor conductive …
A Methodology Of Spice Simulation To Extract Sram Setup And Hold Timing Parameters Based On Dff Delay Degradation, Xiaowei Zhang
A Methodology Of Spice Simulation To Extract Sram Setup And Hold Timing Parameters Based On Dff Delay Degradation, Xiaowei Zhang
Theses and Dissertations--Electrical and Computer Engineering
SRAM is a significant component in high speed computer design, which serves mainly as high speed storage elements like register files in microprocessors, or the interface like multiple-level caches between high speed processing elements and low speed peripherals. One method to design the SRAM is to use commercial memory compiler. Such compiler can generate different density/speed SRAM designs with single/dual/multiple ports to fulfill design purpose. There are discrepancy of the SRAM timing parameters between extracted layout netlist SPICE simulation vs. equation-based Liberty file (.lib) by a commercial memory compiler. This compiler takes spec values as its input and uses them …
Proposed Middleware Solution For Resource-Constrained Distributed Embedded Networks, Jason T. Rexroat
Proposed Middleware Solution For Resource-Constrained Distributed Embedded Networks, Jason T. Rexroat
Theses and Dissertations--Electrical and Computer Engineering
The explosion in processing power of embedded systems has enabled distributed embedded networks to perform more complicated tasks. Middleware are sets of encapsulations of common and network/operating system-specific functionality into generic, reusable frameworks to manage such distributed networks. This thesis will survey and categorize popular middleware implementations into three adapted layers: host-infrastructure, distribution, and common services. This thesis will then apply a quantitative approach to grading and proposing a single middleware solution from all layers for two target platforms: CubeSats and autonomous unmanned aerial vehicles (UAVs). CubeSats are 10x10x10cm nanosatellites that are popular university-level space missions, and impose power and …
Humidity Sensor Circuit Using Real Time Operating System (Freertos) Kernel, Bojie Chen
Humidity Sensor Circuit Using Real Time Operating System (Freertos) Kernel, Bojie Chen
Theses and Dissertations--Electrical and Computer Engineering
A humidity sensor can be used to measure the moisture content of the environment. The physical change of the sensor expresses as the change of electrical property like capacitance, resistance, voltage, current, frequency, etc. In order to process these analog signals digitally, microprocessor is involved in the measurement. This thesis presents design of a circuit to measure low moisture levels. The 16-bit RISC mixed signal microcontroller MSP430F249 from Texas Instruments will be used. The circuit has good performance at extremely low humidity levels.
Meanwhile, a small real time operating system kernel FreeRTOS, a market leading RTOS from Real Time Engineer …
Independent Component Analysis Enhancements For Source Separation In Immersive Audio Environments, Yue Zhao
Independent Component Analysis Enhancements For Source Separation In Immersive Audio Environments, Yue Zhao
Theses and Dissertations--Electrical and Computer Engineering
In immersive audio environments with distributed microphones, Independent Component Analysis (ICA) can be applied to uncover signals from a mixture of other signals and noise, such as in a cocktail party recording. ICA algorithms have been developed for instantaneous source mixtures and convolutional source mixtures. While ICA for instantaneous mixtures works when no delays exist between the signals in each mixture, distributed microphone recordings typically result various delays of the signals over the recorded channels. The convolutive ICA algorithm should account for delays; however, it requires many parameters to be set and often has stability issues. This thesis introduces the …
Fpga To Power System Theorization For A Fault Location And Specification Algorithm, Christina Yeoman
Fpga To Power System Theorization For A Fault Location And Specification Algorithm, Christina Yeoman
Theses and Dissertations--Electrical and Computer Engineering
Fault detection and location algorithms have allowed for the power industry to alter the power grid from the traditional model to becoming a smart grid. This thesis implements an already established algorithm for detecting faults, as well as an impedance-based algorithm for detecting where on the line the fault has occurred and develops a smart algorithm for future HDL conversion using Simulink. Using the algorithms, the ways in which this implementation can be used to create a smarter grid are the fundamental basis for this research. Simulink was used to create a two-bus power system, create environment variables, and then …
Fpga-Based Implementation Of Dual-Frequency Pattern Scheme For 3-D Shape Measurement, Brent Bondehagen
Fpga-Based Implementation Of Dual-Frequency Pattern Scheme For 3-D Shape Measurement, Brent Bondehagen
Theses and Dissertations--Electrical and Computer Engineering
Structured Light Illumination (SLI) is the process where spatially varied patterns are projected onto a 3-D surface and based on the distortion by the surface topology, phase information can be calculated and a 3D model constructed. Phase Measuring Profilometry (PMP) is a particular type of SLI that requires three or more patterns temporarily multiplexed. High speed PMP attempts to scan moving objects whose motion is small so as to have little impact on the 3-D model. Given that practically all machine vision cameras and high speed cameras employ a Field Programmable Gate Array (FPGA) interface directly to the image sensors, …
Providing A Persistent Space Plug-And-Play Avionics Network On The International Space Station, Zachary A. Jacobs
Providing A Persistent Space Plug-And-Play Avionics Network On The International Space Station, Zachary A. Jacobs
Theses and Dissertations--Electrical and Computer Engineering
The CubeLab is a new payload standard that greatly improves access to the International Space Station (ISS) for small, rapid turn-around microgravity experiments. CubeLabs are small (less than 16”x8”x4” and under 10kg) modular payloads that interface with the NanoRacks Platform aboard the ISS. CubeLabs receive power from the station and transfer data using the standard terrestrial plug-and-play Universal Serial Bus (USB). The Space Plug-and-play Avionics (SPA) architecture is a modular technology for spacecraft that provides an infrastructure for modular satellite components to reduce the time to orbit and development costs for satellites. This paper describes the development of a bus …