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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
A Modular Mixed Signal Vlsi Design Approach For Digital Radar Applications, Brian M. Brakus
A Modular Mixed Signal Vlsi Design Approach For Digital Radar Applications, Brian M. Brakus
Theses and Dissertations
This study explores the idea of building a library of VHDL configurable components for use in digital radar applications. Configurable components allows a designer to choose which components he or she needs and configures those components for a specific application. By doing this, design time for ASICs and FPGAs is shortened because the components are already designed and tested. This idea is demonstrated with a configurable dynamic pipelinable fast fourier transform. Many FFT implementations exist, but this implementation is both configurable and dynamic. Pre-synthesis customization allows the FFT to be tailored to almost any DSP application, and the dynamic property …
Microdot - A Four-Bit Microcontroller Designed For Distributed Low-End Computing In Satellites, Anthony R. Woodcock
Microdot - A Four-Bit Microcontroller Designed For Distributed Low-End Computing In Satellites, Anthony R. Woodcock
Theses and Dissertations
Many satellites are an integrated collection of sensors and actuators that require dedicated real-time control. For single processor systems, additional sensors require an increase in computing power and speed to provide the multi-tasking capability needed to service each sensor. Faster processors cost more and consume more power, which taxes a satellite's power resources and may lead to shorter satellite lifetimes. An alternative design approach is a distributed network of small and low power microcontrollers designed for space that handle the computing requirements of each individual sensor and actuator. The design of microdot, a four-bit microcontroller for distributed low-end computing, is …
Microdot-A 4-Bit Synchronous Microcontroller For Space Applications, Kirby M. Watson
Microdot-A 4-Bit Synchronous Microcontroller For Space Applications, Kirby M. Watson
Theses and Dissertations
Satellites have limited power budgets due to the amount of power collected by the satellite's solar panels. The goal is to have a wide range of functionality, while running off a limited power source. Large microprocessors use large amounts of power to report back temperature and chemical sensor data to ground stations. By using small micro controllers to perform the data collection and minimizing the usage of the larger microprocessors, the satellites will save power. A prototype design of the Microdot 4-bit micro controller for space applications is presented. Requirements for the Microdot, such as microwatt power consumption and 23 …
Version And Transaction Management In Osmagic: An Object-Oriented Database Implementation Of The Magic Vlsi Layout Design Tool, Gary M. Lightner
Version And Transaction Management In Osmagic: An Object-Oriented Database Implementation Of The Magic Vlsi Layout Design Tool, Gary M. Lightner
Theses and Dissertations
The goal of this thesis was to study the feasibility of using an object-oriented database management system to provide the functionality and performance needed to support a complex computer-aided design tool. We do this by modifying OSMagic, a prototype system of the Magic very large scale integrated (VLSI) circuit design tool implemented on the ObjectStore object- oriented database management system. OSMagic was changed to support three different interfaces to ObjectStore and to work in a networking environment. We then designed and examined the use of version and transaction management models as a means of addressing the weaknesses of the prototype …
Experimental Evaluation Of Incorporating Digital And Analog Integrated Circuit Die On A Common Substrate Utilizing Silicon-Hybrid Wafer-Scale Integration Technology, Philip C. Reamy
Theses and Dissertations
The objective of this research effort was to investigate the implementation of analog circuits in a wafer scale integration system. A test circuit composed of analog and digital subsystems was designed and tested through simulation. IC die containing this test circuit were utilized in the WSI system fabrication. Preliminary investigations were conducted to evaluate the potential improvements to the IC die mounting procedure, a key step in fabricating functional WSI systems. These investigations demonstrated a procedure which produced repeatable results in achieving acceptable planarization of IC die and host substrate surfaces. These investigations also demonstrated the successful application of a …
Hardware-Verification Through Logic Extraction, Michael A. Dukes
Hardware-Verification Through Logic Extraction, Michael A. Dukes
Theses and Dissertations
A Prolog-based system is described which employs logic-extraction to perform hardware-verification. The extraction rules are built automatically from hierarchical structural VHDL models, enabling the equivalence of a structural VHDL description and a layout specification to be verified. Pin-to-pin critical- path analysis is performed within the logic-extraction process; many noncritical paths are pruned early, making pin-to-pin critical path analysis of large circuits feasible. It is demonstrated that a design methodology based on logic extraction, VHDL, and a layout tool can provide a fabricated functionally- correct IC design without circuit-level or switch-level simulation. This methodology is shown to be practical for VLSI …
Design And Analysis Of Electrical Circuits That Produce Fractional-Order Differentiation, Richard N. Hughes
Design And Analysis Of Electrical Circuits That Produce Fractional-Order Differentiation, Richard N. Hughes
Theses and Dissertations
Two half-order differentiator circuit designs were investigated and their electrical performance evaluated (Oldham and Oldfield). Initially, each circuit design was computer modelled and simulated using the HSPICE computer analysis program. Then, each circuit design (Oldham and Oldfield) was fabricated with two different component technologies. This resulted in four circuits, realized on printed circuit boards, to be evaluated--Oldham discrete component; Oldham hybrid component; Oldfield discrete component; and Oldfield surface mount component. The characterizations of each circuit's electrical performance is documented with time, phase, gain, noise and spectrum responses. A comparison of each circuit's performance versus the design criteria and computer model …
An Object-Oriented Database Implementation Of The Magic Vlsi Layout Design System, Timothy M. Jacobs
An Object-Oriented Database Implementation Of The Magic Vlsi Layout Design System, Timothy M. Jacobs
Theses and Dissertations
This thesis attempts to prove that the commercially available Object Store data management system provide the performance and functionality necessary to support a complex engineering design system. This is accomplished by modifying the Magic VLSI circuit layout design system to eliminate its current Unix file data management system and replace it with Object Store. The approach to this research effort includes a design recovery of the Magic system and identification of its ket data management functions. These functions are then modified to take advantage of the database management facilities of Object Store. Additional code is added to instrument performance measurement …
An Investigation Of A Design For A Finite-Difference Time Domain (Fdtd) Hardware Accelerator, James R. Marek
An Investigation Of A Design For A Finite-Difference Time Domain (Fdtd) Hardware Accelerator, James R. Marek
Theses and Dissertations
This study investigated increasing the speed of Finite-Difference Time Domain (FDTD) cell calculations through a special purpose architecture using Very Large Scale Integration (VLSI). These FDTD cell equations model inhomogeneous, isotropic, lossy magnetic and dielectric materials. Special attention was given to simplicity and performance, using the fastest components generally available in AFIT VLSI programs, while attempting to minimize component count. A VHSIC Hardware Description Language simulation of the proposed chip established design feasibility and provided performance estimates: 350 ns to generate the first cell value, 200 ns thereafter (30 MFLOPS maximum double-precision). This study also implemented boundary conditions in hardware …