VLSI and Circuits, Embedded and Hardware Systems Commons^™

Arithmetic Units For The Elliptic Curve Cryptography With Concurrent Error Detection Capability, Arash Hariri

Electronic Thesis and Dissertation Repository

The elliptic curve cryptography is an important branch in public-key cryptography. In this thesis, we consider the elliptic curve cryptography over binary extension fields from two different points of view. First, we investigate the underlying arithmetic operations in the elliptic curve cryptography. The main arithmetic operation is the scalar multiplication. This operation is based on two elliptic curve operations, known as the point addition and point doubling. Implementing these two elliptic curve operations requires finite field arithmetic, specifically, finite field addition, multiplication, squaring, and inversion. We focus on two finite field operations, namely finite field multiplication and squaring. For the …

An Fpga Based Implementation Of The Exact Stochastic Simulation Algorithm, Phani Bharadwaj Vanguri

Masters Theses

Mathematical and statistical modeling of biological systems is a desired goal for many years. Many biochemical models are often evaluated using a deterministic approach, which uses differential equations to describe the chemical interactions. However, such an approach is inaccurate for small species populations as it neglects the discrete representation of population values, presents the possibility of negative populations, and does not represent the stochastic nature of biochemical systems. The Stochastic Simulation Algorithm (SSA) developed by Gillespie is able to properly account for these inherent noise fluctuations. Due to the stochastic nature of the Monte Carlo simulations, large numbers of simulations …

Design And Implementation Of A Signal Conditioning Operational Amplifier For A Reflective Object Sensor, Ankit Master

Masters Theses

Industrial systems often require the acquisition of real-world analog signals for several applications. Various physical phenomena such as displacement, pressure, temperature, light intensity, etc. are measured by sensors, which is a type of transducer, and then converted into a corresponding electrical signal. The electrical signal obtained from the sensor, usually a few tens mV in magnitude, is subsequently conditioned by means of amplification, filtering, range matching, isolation etc., so that the signal can be rendered for further processing and data extraction.

This thesis presents the design and implementation of a general purpose op amp used to condition a reflective object …

Parameterizable Network-On-Chip Emulation Framework, Jaya Suseela

UNLV Theses, Dissertations, Professional Papers, and Capstones

Networks-on-Chip (NoCs) have been proposed as a promising solution to complex on-chip communication problems. But there is no public accessible HDL synthesizable NoC framework which connects industrial level cores and runs real applications on them. Moreover, many challenging research problems remain unsolved at all levels of design abstraction; design exploration of NoC architecture for applications, scheduling and mapping algorithms, evaluation of switching, topology or routing algorithm for efficient execution of application and optimizing communication cost, area, energy etc Solution to solve the above problem calls for the development of synthesizable, parameterizable NoC Framework that would evaluate and implement the above …

Software Engineering Issues For Mobile Application Development, Tony Wasserman

Tony Wasserman

This paper provides an overview of important software engineering research issues related to the development of applications that run on mobile devices. Among the topics are development processes, tools, user interface design, application portability, quality, and security.

A Single-Chip Ultra-Wideband Based Wireless Sensor Network Node, Nathan R. Schemm

Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research

This dissertation presents the design of a next-generation wireless sensor network node. The node incorporates many new and innovative technologies such as an ultra-wideband radio which allows very low-energy communication, a low-power radiation detection front end, and an efficient implementation of dynamic voltage scaling which improves the energy efficiency of the integrated processor. The complete design is integrated on a single chip for maximum power savings and minimal size.

The ultra-wideband transceiver includes many novel techniques to produce a receiver with low power consumption and fast and accurate packet acquisition and reception. These include the use of a standard symmetric …

Addressing Computational Complexity Of Electromagnetic Systems Using Parameterized Model Order Reduction, Majid Ahmadloo

Electronic Thesis and Dissertation Repository

As operating frequencies increase, full wave numerical techniques such as the finite element method (FEM) become necessary for the analysis of high-frequency and microwave circuit structures. However, the FEM formulation of microwave circuits often results in very large systems of equations which are computationally expensive to solve. The objective of this thesis is to develop new parameterized model order eduction (MOR) techniques to minimize the computational complexity of microwave circuits. MOR techniques provide a mechanism to generate reduced order models from the detailed description of the original FEM formulation. The following contributions are made in this thesis:

1. The first …

Synthesizing Optimal Fixed-Point Arithmetic For Embedded Signal Processing, Kenneth J. Hass

Faculty Conference Papers and Presentations

No abstract provided.

Asynchronous Mips Processors: Educational Simulations, Robert L. Webb

Master's Theses

The system clock has been omnipresent in most mainstream chip designs. While simplifying many design problems the clock has caused the problems of clock skew, high power consumption, electromagnetic interference, and worst-case performance. In recent years, as the timing constraints of synchronous designs have been squeezed ever tighter, the efficiencies of asynchronous designs have become more attractive. By removing the clock, these issues can be mitigated. How- ever, asynchronous designs are generally more complex and difficult to debug. In this paper I discuss the advantages of asynchronous processors and the specifics of some asynchronous designs, outline the roadblocks to asynchronous …

Polyenvi, Stephen Beard, Josh Engel, Paul Fake, Diego Flores, Alvaro Nunez, Miguel Wong

Electrical Engineering

Poor indoor air quality is a problem that is recognized by the Environmental Protection Agency (EPA) to cause health issues. In order to raise awareness of this problem, this document outlines the construction of a device that economically measures air quality through five metrics: dust, smoke, ozone, humidity, and temperature. The device integrates with a router to provide users access to information about their indoor air quality anywhere over the internet as well as local access to the data via an LCD mounted on the router. By increasing indoor air quality awareness, this device will aid users in making adjustments …

A Fully Integrated High-Temperature, High-Voltage, Bcd-On-Soi Voltage Regulator, Benjamin Matthew Mccue

Masters Theses

Developments in automotive (particularly hybrid electric vehicles), aerospace, and energy production industries over the recent years have led to expanding research interest in integrated circuit (IC) design toward high-temperature applications. A high-voltage, high-temperature SOI process allows for circuit design to expand into these extreme environment applications. Nearly all electronic devices require a reliable supply voltage capable of operating under various input voltages and load currents. These input voltages and load currents can be either DC or time-varying signals. In this work, a stable supply voltage for embedded circuit functions is generated on chip via a voltage regulator circuit producing a …

K-Delta-1-Sigma Modulators For Wideband Analog-To-Digital Conversion, Vishal Saxena

Boise State University Theses and Dissertations

As CMOS technology scales, the transistor speed increases enabling higher speed communications and more complex systems. These benefits come at the cost of decreasing inherent device gain, increased transistor leakage currents, and additional mismatches due to process variations. All of these drawbacks affect the design of high-resolution analog-to-digital converters (ADCs) in nano-CMOS processes. To move towards an ADC topology useful in these small processes a first-order K-Delta-1-Sigma (KD1S) modulator-based ADC was proposed. The KD1S topology employs inherent time-interleaving with a shared integrator and K-quantizing feedback paths and can potentially achieve significantly higher conversion bandwidths when compared to the traditional …

Determination Of Material Emission Signatures By Ptr-Ms And Their Correlations With Odor Assessments By Human Subjects, Kwanghoon Han

Kwanghoon Han

The objectives of this study were to determine volatile organic compound (VOC) emission signatures of nine typical building materials by using proton transfer reaction-mass spectrometry (PTR-MS) and to explore the correlation between the PTR-MS measurements and the measurements of acceptability by human subjects. VOC emissions from each material were measured in a 50-l small-scale chamber. Chamber air was sampled by PTR-MS to determine emission signatures. Sorbent tube sampling and TD-GC/MS analysis were also performed to identify the major VOCs emitted and to compare the resulting data with the PTR-MS emission signatures. The data on the acceptability of air quality assessed …

Global Positioning Logger, Matthew Hall

Computer Engineering

The Global Positioning Logger (GPL) is a mobile embedded device that utilizes GPS technology. The GPS data is used to display current speed and past global locations.

A Graduate Education In Software Management And The Software Business For Mid-Career Professionals, Ray Bareiss, Gladys Mercier

Ray Bareiss

Given the unique nature of the software business, the faculty of Carnegie Mellon University’s Silicon Valley campus concluded that mid-career software professionals would be better served by a tailored master’s degree focusing on software management and more broadly on the business of software than by a typical MBA. Our software management master’s program integrates business, technical, and soft skills to prepare our students for technical leadership in their current companies or in entrepreneurial ventures. Our initial program built on the strengths of Carnegie Mellon’s world-class software engineering education. We targeted students working in large companies, engaged in large-scale enterprise software …

Coaching Via Cognitive Apprenticeship, Ray Bareiss, Martin Radley

Ray Bareiss

At Carnegie Mellon’s Silicon Valley campus we employ a learn by- doing educational approach in which nearly all student learning, and thus instruction, is in the context of realistic, team based projects. Consequently, we have adopted coaching as our predominant teaching model. In this paper we reflect on our experience with the nature of teaching by coaching using a framework derived from Cognitive Apprenticeship, and explain how we employ the techniques it suggests in our teaching. We also discuss a range of instructional tensions that arise in teaching by coaching and present a survey of student attitudes regarding the effectiveness …

Approaches To Multiprocessor Error Recovery Using An On-Chip Interconnect Subsystem, Ramakrishna P. Vadlamani

Masters Theses 1911 - February 2014

For future multicores, a dedicated interconnect subsystem for on-chip monitors was found to be highly beneficial in terms of scalability, performance and area. In this thesis, such a monitor network (MNoC) is used for multicores to support selective error identification and recovery and maintain target chip reliability in the context of dynamic voltage and frequency scaling (DVFS). A selective shared memory multiprocessor recovery is performed using MNoC in which, when an error is detected, only the group of processors sharing an application with the affected processors are recovered. Although the use of DVFS in contemporary multicores provides significant protection from …

Scalable, Memory-Intensive Scientific Computing On Field Programmable Gate Arrays, Salma Mirza

Masters Theses 1911 - February 2014

Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for many scientific computing problems. This is due to the memory bottleneck that is encountered with large arrays that must be stored in dynamic RAM. A system of FPGAs, with a large enough memory bandwidth, and clocked at only hundreds of MHz can outperform a CPU clocked at GHz in terms of floating point performance. An FPGA core designed for a target performance that does not unnecessarily exceed the memory imposed bottleneck can then be distributed, along …

On The Radiation-Induced Soft Error Performance Of Hardened Sequential Elements In Advanced Bulk Cmos Technologies, Norbert Seifert, Vinod Ambrose, B Gill, Q Shi, R Allmon, Charles H. Recchia, S Mukherjee, N Nassif, J Krause, J Pickholtz, A Balasubramanian

Charles H Recchia

No abstract provided.

Design Techniques To Improve Time Dependent Dielectric Breakdown Based Failure For Cmos Circuits, Emanuel S. Tarog

Master's Theses

This project investigates the failure of various CMOS circuits as a result of Time Dependent Dielectric Breakdown (TDDB) and explores design techniques to increase the mean time to failure (MTTF) of large-scale circuits. Time Dependent Dielectric Breakdown is a phenomenon where the oxide underneath the gate degrades as a result of the electric field in the material. Currently, there are few well documented design techniques that can increase lifetime, but with a tool chain I created called the MTTF Analyzing Program, or MAP, I was able to test circuits under various conditions in order to identify weak links, discover relationships, …

Embedded Systems As Datacenters, Robert Iannucci

Robert A Iannucci

No abstract provided.

The Effect Of The Digit Slicing Architecture On The Fft Butterfly, Yazan Samir, Rozita Teymourzadeh

Dr. Rozita Teymourzadeh, CEng.

Vlsi Implementation Of Novel Class Of High Speed Pipelined Digital Signal Processing Filter For Wireless Receivers, Rozita Teymourzadeh, Yazan Samir, Shabuil Islam, Masuri Othman, Mok Vh

Dr. Rozita Teymourzadeh, CEng.

Design Of Automatic Soil Humidity Control Using Maximum Power Point Tracking Controller, Hoe Ck, Vaithlingam A.C., Rozita Teymourzadeh, Rajkumar R

Dr. Rozita Teymourzadeh, CEng.

On-Chip Implementation Of Pipeline Digit-Slicing Multiplier-Less Butterfly For Fast Fourier Transform Architecture, Yazan Samir, Rozita Teymourzadeh, Masuri Othman, Shabiul Islam, Mok Vh

Dr. Rozita Teymourzadeh, CEng.

On-Chip Implementation Of High Resolution High Speed Floating Point Adder/Subtractor With Reducing Mean Latency For Ofdm, Rozita Teymourzadeh, Yazan Samir, Nooshin Mahdavi, Masuri Othman

Dr. Rozita Teymourzadeh, CEng.