VLSI and Circuits, Embedded and Hardware Systems Commons^™

Data Logging System For A Synthetic Aperture Radar Unit, Nicholas J. Testin, Philip Davis, Ian Dorell, Alexander Gillespie

KSU Journey Honors College Capstones and Theses

A small, existing radar unit lacked the ability to automatically store the data it was receiving, which made its use clunky and cumbersome. A system was constructed to allow an on-board microprocessor to track distance traveled, and automatically store the data output from the radar unit to a portable memory unit for later data processing. Distance traveled is determined using a specially designed mobile cart, which electronically converts the rotation of a wheel into an electrical signal while also providing stability for taking accurate radar measurements. The output data from the radar unit is stored as a properly-formatted sound file …

Accumulator Volume Sensor Final Project Report, Chris Naughton, Kinwei Yu, Michael George

Mechanical Engineering

Accumulator Volume Sensing Team has developed two sensor designs aimed at detecting the position of the piston within a 4024 accumulator. The two designs include the use of a Renishaw LMA10 magnetic encoder and a SpectraSymbol HotPot linear potentiometer. The magnetic encoder solution drastically increases the accuracy of sensing the piston position compared to the current solutions of both a string-pot and linear variable differential transformer while costing slightly less. The linear potentiometer seeks to provide a solution that drastically decreases the cost compared to the present sensing methods. Both designs call for a modification to one half of the …

Si-Based Germanium-Tin (Gesn) Emitters For Short-Wave Infrared Optoelectronics, Seyed Amir Ghetmiri

Graduate Theses and Dissertations

Conventional integrated electronics have reached a physical limit, and their efficiency has been influenced by the generated heat in the high-density electronic packages. Integrated photonic circuits based on the highly developed Si complementary-metal-oxide-semiconductor (CMOS) infrastructure was proposed as a viable solution; however, Si-based emitters are the most challenging component for the monolithic integrated photonic circuits. The indirect bandgap of silicon and germanium is a bottleneck for the further development of photonic and optoelectronic integrated circuits.

The Ge1-xSnx alloy, a group IV material system compatible with Si CMOS technology, was suggested as a desirable material that theoretically exhibits a direct bandgap …

Active Contact Lens - Low Power Backscattering Sensor-To-Antenna Integration Circuitry, Caleb B. Porter

Electrical Engineering

The Active Contact Lens measures the cornea-scleral radius of the wearer’s eye, which correlates to intraocular pressure (IOP), Glaucoma’s primary indicator. IOP varies throughout the day, and is drastically different from person to person, so constantly measuring it over a period of a few days can provide individualized tracking of the disease’s development and will help doctors develop personalized treatment schedules to treat the disease more precisely.

The Active Contact Lens sensor measures strain, based on the cornea-scleral radius, and reports the results wirelessly, to allow monitoring of an individual’s IOP over time. The lens is powered similarly to a …

Integrated Circuit Design For Hybrid Optoelectronic Interconnects, Kehan Zhu

Boise State University Theses and Dissertations

This dissertation focuses on high-speed circuit design for the integration of hybrid optoelectronic interconnects. It bridges the gap between electronic circuit design and optical device design by seamlessly incorporating the compact Verilog-A model for optical components into the SPICE-like simulation environment, such as the Cadence design tool.

Optical components fabricated in the IME 130nm SOI CMOS process are characterized. Corresponding compact Verilog-A models for Mach-Zehnder modulator (MZM) device are developed. With this approach, electro-optical co-design and hybrid simulation are made possible.

The developed optical models are used for analyzing the system-level specifications of an MZM based optoelectronic transceiver link. Link …

Analog Spiking Neuromorphic Circuits And Systems For Brain- And Nanotechnology-Inspired Cognitive Computing, Xinyu Wu

Boise State University Theses and Dissertations

Human society is now facing grand challenges to satisfy the growing demand for computing power, at the same time, sustain energy consumption. By the end of CMOS technology scaling, innovations are required to tackle the challenges in a radically different way. Inspired by the emerging understanding of the computing occurring in a brain and nanotechnology-enabled biological plausible synaptic plasticity, neuromorphic computing architectures are being investigated. Such a neuromorphic chip that combines CMOS analog spiking neurons and nanoscale resistive random-access memory (RRAM) using as electronics synapses can provide massive neural network parallelism, high density and online learning capability, and hence, paves …

Design, Analysis, And Simulation Of A Jitter Reduction Circuit (Jrc) System At 1ghz, Run Bin Yu

Master's Theses

The clock signal is considered as the “heartbeat” of a digital system yet jitter which is a variation on the arrival time of the clock edge, could undermine the overall performance or even cause failures on the system. Deterministic jitter could be reduced during the designing process however random jitter during operation is somehow less-controllable and unavoidable. Being able to remove jitter on the clock would therefore play a vital role in system performance improvement.

This thesis implements a 1GHz fully feedforward jitter reduction circuit (JRC) which can be used as an on-chip IP core at clock tree terminals to …

Occupancy Estimation In Smart Building Using Hybrid Co2/Light Wireless Sensor Network, Chen Mao, Qian Huang

ASA Multidisciplinary Research Symposium

Smart building, which delivers useful services to residents at lowest cost and maximum comfort, has gained increasing attention in recent years. A variety of emerging information technologies have been adopted in modern buildings, such as wireless sensor networks, internet of things, big data analytics, deep machine learning, etc. Most people agree that a smart building should be energy efficient, and consequently, much more affordable to building owners. Building operation accounts for major portion of energy consumption in the United States. HVAC (heating, ventilating, and air conditioning) equipment is a particularly expensive and energy consuming of building operation. As a result, …

Reward Modulated Spike Timing Dependent Plasticity Based Learning Mechanism In Spiking Neural Networks, Shrihari Sridharan, Gopalakrishnan Srinivasan, Kaushik Roy

The Summer Undergraduate Research Fellowship (SURF) Symposium

Spiking Neural Networks (SNNs) are one of the recent advances in machine learning that aim to further emulate the computations performed in the human brain. The efficiency of such networks stems from the fact that information is encoded as spikes, which is a paradigm shift from the computing model of the traditional neural networks. Spike Timing Dependent Plasticity (STDP), wherein the synaptic weights interconnecting the neurons are modulated based on a pair of pre- and post-synaptic spikes is widely used to achieve synaptic learning. The learning mechanism is extremely sensitive to the parameters governing the neuron dynamics, the extent of …

Asynchronous Data Processing Platforms For Energy Efficiency, Performance, And Scalability, Liang Men

Graduate Theses and Dissertations

The global technology revolution is changing the integrated circuit industry from the one driven by performance to the one driven by energy, scalability and more-balanced design goals. Without clock-related issues, asynchronous circuits enable further design tradeoffs and in operation adaptive adjustments for energy efficiency. This dissertation work presents the design methodology of the asynchronous circuit using NULL Convention Logic (NCL) and multi-threshold CMOS techniques for energy efficiency and throughput optimization in digital signal processing circuits. Parallel homogeneous and heterogeneous platforms implementing adaptive dynamic voltage scaling (DVS) based on the observation of system fullness and workload prediction are developed for balanced …

Design And Analysis Of An Asynchronous Microcontroller, Michael Hinds

Graduate Theses and Dissertations

This dissertation presents the design of the most complex MTNCL circuit to date. A fully functional MTNCL MSP430 microcontroller is designed and benchmarked against an open source synchronous MSP430. The designs are compared in terms of area, active energy, and leakage energy. Techniques to reduce MTNCL pipeline activity and improve MTNCL register file area and power consumption are introduced. The results show the MTNCL design to have superior leakage power characteristics. The area and active energy comparisons highlight the need for better MTNCL logic synthesis techniques.

Compact Modeling Of Sic Insulated Gate Bipolar Transistors, Sonia Perez

Graduate Theses and Dissertations

This thesis presents a unified (n-channel and p-channel) silicon/silicon carbide Insulated Gate Bipolar Transistor (IGBT) compact model in both MAST and Verilog-A formats. Initially, the existing MAST model mobility equations were updated using recently referenced silicon carbide (SiC) data. The updated MAST model was then verified for each device tested. Specifically, the updated MAST model was verified for the following IGBT devices and operation temperatures: n-channel silicon at 25 ˚C and at 125 ˚C; n-channel SiC at 25 ˚C and at 175 ˚C; and p-channel SiC at 150 ˚C and at 250 ˚C. Verification was performed through capacitance, DC output …

Cal Poly Supermileage Electronic Fuel Injection, Alexander Pink

Electrical Engineering

Cal Poly Supermileage is a student-run engineering club that builds prototype gasoline vehicles optimized maximum fuel-efficiency. To power their vehicles, the Supermileage team makes use of single-cylinder, 4-stroke, electronically fuel-injected (EFI) gasoline engines. This report details the development, iterative design & test cycles, and integration of an EFI system for the Supermileage club. This project develops an EFI system that interfaces to the most common types of sensors found in the low-power Supermileage-range of engines, including throttle-position sensors, manifold absolute pressure sensors, gear-tooth hall-effect sensors, variable-reluctance position sensors, engine coolant temperature sensors, intake air temperature sensors, and exhaust oxygen sensors. …

El Capitán: Cal Poly Rose Float Digital Drive System, Gregory Raffi Baghdikian

Computer Engineering

In today’s world of smartphones, self-driving cars, and internet-connected coffee makers, it seems as if computers are contained in everything around us. These “embedded systems” have become critical components of our lives, improving everything about the things they control, from cost, to speed, to simplicity. One area that embedded systems has hardly gained a foothold is in the world of floatbuilding. Most of the floats in the Tournament of Roses Parade, including the one built jointly by Cal Poly San Luis Obispo and Cal Poly Pomona, are technologically very simple, using mostly analog components and rudimentary discrete digital logic to …

A Stroke Therapy Brace Design, Evan Kirkbride

Electrical Engineering

Victims of stroke often have difficulty with rehabilitation. With limited movement on their affected arm, patients often do not want to move much for physical therapy. In this project, we design a robotic brace that helps stroke patients move their arm more effectively in a reaching or pulling motion. By giving patients more movement in their affected arm than they would have otherwise, patients gain more from rehabilitation. The brace also adapts to the patient’s needs, providing more inclination or resistance as needed for their physical therapy. This kind of therapy engages patients rather than relying on their likely dwindled …

Analog Vlsi Circuit Design: Linear Voltage Regulator, Brett Colteaux, Kirstie Fung

Electrical Engineering

The project outlined in this report is the design, layout, and routing of a linear voltage regulator using Cadence VLSI (very-large-scale integration) software. The design specifications for this regulator are as follows: input voltage range of 5V + 1V, load current capabilities of 150mA, and output voltage range of 1.15V to 3.3V. Furthermore, the design of this circuit was broken into three main sub-circuits: an error amplifier, bandgap reference circuitry, and biasing circuitry for the bandgap. Together, these sub-circuits integrated to make the final design.

Research for different topologies for a voltage regulator was done and the Brokaw bandgap reference …

Design Of An Integrated Acceleration Acquisition Subsystem To Satisfy High-Speed And Low-Area Requirements For Cubesats, Ryan J. Rumsey

Master's Theses

Cal Poly San Luis Obispo’s PolySat team is designing the Multipurpose Orbital Spring Ejection System (MOSES) in order to record acceleration data during the launch of CubeSats as well as to provide GPS coordinates to locate the position of CubeSats once they are injected into orbit. This work focuses on the design and development of the acceleration data acquisition (DAQ) subsystem of MOSES. This subsystem is designed around the need for a high-speed sampling system of at least 200 kHz across four channels of data, plus low-area limitations in the MOSES form factor which is roughly half the size of …

Conversion Of Digital Circuits Labs, Caleb N. Taber

Undergraduate Honors Theses

The engineering technology department at ETSU currently lacks a modern method to teach digital circuits. The aim of this thesis is to convert our current digital circuits labs to equivalent labs suited to run on the Basys 3. The Basys has several advantages over the aging NI Elvis boards (and now just breadboards) currently in use. The first advantage is that the Basys gives students a taste of FPGA programming without being overwhelmingly; like the systems currently in place for the digital signal processing class. The Basys is also a more modern system; our current integrated circuit and breadboard system …

Prevention Of Drone Jamming Using Hardware Sandboxing, Joshua Mead

Graduate Theses and Dissertations

In this thesis, we concern ourselves with the security of drone systems under jamming-based attacks. We explore a relatively new concept we previously devised, known as hardware sandboxing, to provide runtime monitoring of boundary signals and isolation through resource virtualization for non-trusted system-on-chip (SoC) components. The focus of this thesis is the synthesis of this design and structure with the anti-jamming, security needs of drone systems. We utilize Field Programmable Gate Array (FPGA) based development and target embedded Linux for our hardware sandbox and drone hardware/software system.

We design and implement our working concept on the Digilent Zybo FPGA, which …

Design Of An Assistive Technology Adaptive Switch Using An Inertial Measurement Unit, Ethan Storm Williams

Graduate Theses and Dissertations

A new assistive technology switch for people with disabilities was developed utilizing an Inertial Measurement Unit (IMU) as the sensor technology. The hardware can be customized through firmware to provide custom switch activations on a person by person basis. The firmware is customized to recognize specific data features in the IMU data which identify the desired switch activation movement performed by the user. In this way, the switch can be adapted to activate based on the movements of the user. During this research, the generic hardware platform, including the IMU sensor technology and Bluetooth communications, was designed and tested. An …

Correcting Current Imbalances In Three-Phase Four-Wire Distribution Systems, Vinson Joseph Jones

Graduate Theses and Dissertations

The objective of this thesis is to present the theory, design, construction, and testing of a proposed solution to unbalanced current loading on three-phase four-wire systems. The Unbalanced Current Static Compensator is the name of the prototype; herein referred to as the UCSC. The purpose of this prototype is to redistribute current between the three phases of a distribution system. Through this redistribution, negative- and zero-sequence currents are eliminated and a balanced system is seen upstream from the point of installation.

The UCSC consists of three separate single-phase H-bridge inverters that all share the same dc-link capacitor. Each of these …

Implementation And Performance Of Factorized Backprojection On Low-Cost Commercial-Off-The-Shelf Hardware, Alec C. Rasmussen

Theses and Dissertations

Traditional Synthetic Aperture Radar (SAR) systems are large, complex, and expensive platforms that require significant resources to operate. The size and cost of the platforms limits the potential uses of SAR to strategic level intelligence gathering or large budget research efforts. The purpose of this thesis is to implement the factorized backprojection SAR image processing algorithm in the C++ programming language and test the code's performance on a low cost, low size, weight, and power (SWAP) computer: a Raspberry Pi Model B. For a comparison of performance, a baseline implementation of filtered backprojection is adapted to C++ from pre-existing MATLAB® …

An Openeaagles Framework Extension For Hardware-In-The-Loop Swarm Simulation, Derek B. Worth

Theses and Dissertations

Unmanned Aerial Vehicle (UAV) swarm applications, algorithms, and control strategies have experienced steady growth and development over the past 15 years. Yet, to this day, most swarm development efforts have gone untested and thus unimplemented. Cost of aircraft systems, government imposed airspace restrictions, and the lack of adequate modeling and simulation tools are some of the major inhibitors to successful swarm implementation. This thesis examines how the OpenEaagles simulation framework can be extended to bridge this gap. This research aims to utilize Hardware-in-the-Loop (HIL) simulation to provide developers a functional capability to develop and test the behaviors of scalable and …

Oceanographic Instrument Simulator, Amy Chen

Master's Theses

The Monterey Bay Aquarium Research Institute (MBARI) established the Free Ocean Carbon Enrichment (FOCE) experiment to study the long-term effects of decreased ocean pH levels by developing in-situ platforms [1]. Deep FOCE (dpFOCE) was the first platform, which was deployed in 950 meters of water in Monterey Bay. After the conclusion of dpFOCE, MBARI developed an open source shallow water FOCE (swFOCE) platform located at around 250 meter of water to facilitate worldwide shallow water experiments on FOCE [1][2]. A shallow water platform can be more ubiquitous than a deep-water platform as shallow water instruments are less expensive (as it …

Comparing Various Hardware/Software Solutions And Conversion Methods For Controller Area Network (Can) Bus Data Collection, Samuel E. Marx, Joe D. Luck, Santosh Pitla, Roger M. Hoy

Department of Agricultural and Biological Systems Engineering: Faculty Publications

Various hardware and software solutions exist for collecting Controller Area Network (CAN) bus data. Digital data accuracy could vary based upon different data logging methods (e.g., hardware/software timing, processor timing, etc.). CAN bus data were collected from agricultural tractors using multiple data acquisition solutions to quantify differences among collection methods and demonstrate potential data accumulation rates. Two types of data were observed for this study. The first, CAN bus frame data, represents data collected for each line of hex data sent from an ECU. One issue with frame data is the resulting large file sizes, therefore a second logging format …