VLSI and Circuits, Embedded and Hardware Systems Commons^™

Retinomorphic Mid-Wave Infrared In-Sensor Processing Engine: Device-To-Architecture Co-Design, Hemalatha Nagaraju

Theses

Conventional frame-based CMOS image sensors acquire full-frame pixel data at discrete time intervals, resulting in substantial spatial redundancy and loss of temporal information between frames. The repeated conversion and transfer of redundant pixel data increases bandwidth and power consumption in machine vision systems. Retinomorphic sensing architectures address these limitations by enabling programmable, analog-domain processing directly at the sensor interface. A compact behavioral model of the PbSe device is developed in HSPICE based on calibrated TCAD simulation data to capture gate-controlled photocurrent modulation under varying illumination and gate bias conditions. Error analysis is performed to quantify the deviation between TCAD-generated photocurrent …

Gen-Acceleration: Pioneering Work For Hardware Accelerator Generation Using Large Language Models, Durga Lakshmi Venkata Deepak Vungarala

Theses

Optimizing computational power is critical in the age of data-intensive applications and Artificial Intelligence (AI)/Machine Learning (ML). While facing challenging bottlenecks, conventional Von-Neumann architecture with implementing such huge tasks looks seemingly impossible. Hardware Accelerators are critical in efficiently deploying these technologies and have been vastly explored in edge devices. This study explores a state-of-the-art hardware accelerator; Gemmini is studied; we leveraged the open-sourced tool. Furthermore, we developed a Hardware Accelerator in the study we compared with the Non-Von-Neumann architecture. Gemmini is renowned for efficient matrix multiplication, but configuring it for specific tasks requires manual effort and expertise. We propose implementing …

Characterization Of Low Power Hfo2 Based Switching Devices For In-Memory Computing, Aseel Zeinati

Theses

Oxide based Resistive Random Access Memory (RRAM) devices are investigated as one of the promising non-volatile memories to be used for in-memory computing that will replace the classical von Neumann architecture and reduce the power consumption. These applications required multilevel cell (MLC) characteristics that can be achieved in RRAM devices. One of the methods to achieve this analog switching behavior is by performing an optimized electrical pulse. The RRAM device structure is basically an insulator between two metals as metal-insulator-metal (MIM) structure. Where one of the primary challenges is to assign an RRAM stack with both low power consumption and …

Design For Signal Integrity In High Frequency, High Density Circuit Boards, Juan Manuel Talavera Martinez

Theses

The electronics market is continually seeking fast and small high performance products. The clock frequency in computer systems is often above 2GHz and new generations of laptops have considerably reduced in size. These features make printed circuit board (PCB) design more difficult than in the past.

This thesis is an investigation of the current design of high speed PCB. The complexity of this type of circuit makes the designer needs an extensive knowledge of the techniques used to generate a reliable signalling, in other words, signal integrity. To achieve this objective, the design community has to overcome several problem related …