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VLSI and Circuits, Embedded and Hardware Systems Commons™
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- Keyword
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- Ambient RF Energy Harvesting (RFEH) (1)
- Boundary Scan Technic; High speed integration circuit; Digital circuit (1)
- CMOS Technology (1)
- Computer software (1)
- Cross-Coupled Differential-Drive (CCDD) Rectifier (1)
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- Data transaction (1)
- Dynamic Range (DR) (1)
- Error Correction Codes; Hardware Design; VHDL; Digital System Design; Hardware Development (1)
- Floating-Point Multiplier; VHDL; FPGA; Pipelined Architecture; Booth Algorithm; Wallace Tree. (1)
- Jawi character (1)
- Litar aritmetik reja; Sains komputer; Sistem nombor reja; pengkodan VHDL; Rajah simulasi (1)
- Microcontroller (1)
- Power Conversion Efficiency (PCE) (1)
- Subthreshold Modelling (1)
- Technology of computers (1)
- VHDL implementation (1)
- VHDL; Built-in self-test (BIST); UART design; Digital circuit testing; Hardware description language (1)
- VHDL; IP Engine; Network; Communication bottlenecks; Hardware (1)
Articles 1 - 9 of 9
Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems
Low-Power Cmos Cross-Coupled Differential-Drive Rectifier For Ambient Radio Frequency Energy Harvesting Systems, Sing Leung Gabriel Chong
Low-Power Cmos Cross-Coupled Differential-Drive Rectifier For Ambient Radio Frequency Energy Harvesting Systems, Sing Leung Gabriel Chong
Student Works (2020-2029)
Wireless Sensor Node (WSN) for the Internet of Things (IoT) and Internet of Everything (IoE) will require harvesting low-power ambient Radio Frequency (RF) energy to achieve self-power capabilities, alleviating the need of batteries. The research title of “Low-Power CMOS Cross-Coupled Differential-Drive Rectifier for Ambient Radio Frequency Energy Harvesting Systems” relates to the design of integrated circuit (IC) rectifiers for low-power ambient RF energy harvesting (RFEH) in complementary-metal-oxide-semiconductor (CMOS) technology. The adoption of CMOS for the rectifier designs is to achieve small physical form factor, low-cost, and system-on-chip (SoC) integration. The rectifier is the main circuit in an ambient RFEH system …
A Vhdl Implementation Of Bist Technique In Uart Design, Mohd. Yamani Idna Idris
A Vhdl Implementation Of Bist Technique In Uart Design, Mohd. Yamani Idna Idris
Student Works (2000-2009)
No abstract provided.
Vhdl Implementation For Jawi Character Recognition, Mustafa Norita Adila
Vhdl Implementation For Jawi Character Recognition, Mustafa Norita Adila
Student Works (2000-2009)
Kewujudan tulisan jawi sejak dahulu lagi telah menghasilkan pelbagai karya penting dalam perkembangan islam. Sebagai satu bahasa pengantara, tulisan jawi dianggap penting dalam bidang penulisan. Tidak terhad hanya kepada buku-buku, dokumen-dokumen dan manuskrip-manuskrip yang ditulis dalam tulisan jawi, malah penggunaanya amat meluas dan meliputi keseluruhan bidang. Menyedari kepentingannya, timbul minat saya untuk mengkaji dengan lebih mendalam bagaimana komputer boleh mengenali dan memahami tulisan ini tanpa menggunakan tenaga manusia berdasarkan kepada beberapa kajian yang sedia ada yang telah dijalankan oleb mereka yang pakar dalam teknologi komputer digital. Secara keseluruhan, kajian ini akan membantu memudahkan lagi pengecaman tulisan tangan jawi yang dilakukan …
Rekabentuk Perkakasan Khas Ecc (Reed-Solomon), Muhamad Mursid Noorizan
Rekabentuk Perkakasan Khas Ecc (Reed-Solomon), Muhamad Mursid Noorizan
Student Works (2000-2009)
Dokumen ini disiapknn bagi menyediakan laporan tentang perjalanan projek perkakasan khas ECC yang dijalankan. Bahagian pertama dokumen ini terdapat pengenalan tentang projek. Bahagian kedua pula menyatakan tentang kajian yang telah dilakukan bagi memilih kod-kod pembetulan yang ingin dibangunkan. Seterusnya pada bahagian tiga, dinyatakan serba sedikit tentang bahasa yang digunakan dalam pembangunan projek iaitu VHDL. Sahagian keempat pula menceritakan tentang senibina-senibina dan rekabentuk-rekabentuk perkakasan khas. Dalam bahagian lima, dokumen menceritakan tentang fasa pembangunan yang telah dijalankan. Bahagian enam dan tujuh pula menceritakan tentang perbincangan dan kesimpulan daripada projek yang telah dijalankan.
Keyboard - Smart Card Reader Controller Using Vhdl, Lani Mohd Zuwairi
Keyboard - Smart Card Reader Controller Using Vhdl, Lani Mohd Zuwairi
Student Works (2000-2009)
As the time fly by the technology of computers has improves and much security is needed in every transaction of data that being done. In this project, designing a microcontroller for keyboard and smart card reader terminal integration is being done. At first stage, the architecture of the controller will analyze and studied. This will need some practice of knowledge in computer organization and architecture, as well as microprocessors architecture designs. Then the architecture is design using hardware prototyping. This is by using the VHSIC Hardware Description Language (VHDL). The codes done using the language then being simulate to get …
Mekanisma Pengujian Alu Menggunakan Teknik Boundary Scan, Abdul Aziz Ahmad Zaki Zamani
Mekanisma Pengujian Alu Menggunakan Teknik Boundary Scan, Abdul Aziz Ahmad Zaki Zamani
Student Works (2000-2009)
ALU testing mechanism using Boundary Scan technique is a project which is develop to be the tester for testing the digital circuit, integrated circuit and computer chip. The goal of this project is to develop a mechanism and as well building an ALU chip so that we will able to test and determine whether the chips are in a good shape and condition. This project contains two parts: one is lo develop an ALU and second is to develop the boundary scan chip. ALU is a unit or a component for a cligital circuit or a integrated circuit which is …
Litar Aritmetik Reja, Abd. Mutalib Leorna Shazerine
Litar Aritmetik Reja, Abd. Mutalib Leorna Shazerine
Student Works (2000-2009)
Projek Ilmiah Tahap Akhir II, iaitu WXES 3182 adalah suatu latihan akademik di dalam penyelidikan, rekabentuk, pembangunan dan komunikasi yang melibatkan prinsip-prinsip sains komputer. Projek WXES 3182 ini merupakan kursus pelengkap bagi pelajar-pelajar tahun akhir untuk mendapatkan penganugerahan Sarjana Muda Sains Komputer. Projek WXES 3182 ini adalah kesinabungan daripada projek WXES 3181 Kajian penyehdikan yang telah dijalankan adalah berkaitan dengan konsep sistem nombor reja dan litar aritmetik reja. Laporan latihan ilmiah tahap akhir II ini, merangkumi pembangunan projek WXES 3181 dan WXES 3182. laporan ini terdiri daripada lapan bahagian dan diantaranya ialah pengenalan kepada projek, kajian literasi, metodologi yang digunakan …
Vhdl Description For Ip Engine, Bathich Zeliall
Vhdl Description For Ip Engine, Bathich Zeliall
Student Works (2000-2009)
Developing hardware support for network layer protocol processing is a very complex and demanding task. However. for optimal performance hardware acceleration can be required. To cope with the situation. this project present a high-level design approach. which targets the development of configurable and reusable components. Therefore it obtains the integration of advanced tools for the development of the IP Engine into the design environment. This process is illustrated based on a TCP/IP header analysis and validation component for which initial performance results are presented. The development of this Engine is embedded in an approach to develop flexible and configurable protocol …
Pendarab Titik Apungan 32bit Bertalian Paip, Noorzaily Mohamed Noor
Pendarab Titik Apungan 32bit Bertalian Paip, Noorzaily Mohamed Noor
Student Works (2000-2009)
Tesis ini menghuraikan sebuah pendarab titik apungan 32bit bertalian paip 18MHz yang direkabentuk menggunakan bahasa perihalan perkakasan YHDL, peralatan sintesis Synopsys FPGA Express dan ·peralatan pemetaan Xilinx Alliance, PTA ini menggunakan 1007 CLB dan 100 10B di mana peranti pemetaan yang digunakan ialah xc4036xl-bg432-2 daripada pustaka XC4000 Xilinx FPGA. Pendarab ini mengandungi tiga tahap talian paip yang belainan fungsi. Tahap pertama melaksanakan penjanaan dedarab dan penambahan dedarab secara carry save dan penambahan eksponen. la menggunakan algoritma Booth tertib kedua dan pepohon Wallace dengan pemampat 4-2. Tahap kcdua pula melakukan penambahan bawaan rambatan akhir, penormalan mantisa dan pembetulan eksponen manakala tahap …