VLSI and Circuits, Embedded and Hardware Systems Commons^™

Design & Analysis Of Mixed-Mode Integrated Circuit For Pulse-Shape Discrimination, Bryan Orabutt

McKelvey School of Engineering Theses & Dissertations

In nuclear science experiments it is usually necessary to determine the type of radiation, its energy and direction with considerable accuracy. The detection of neutrons and discriminating them from gamma rays is particularly difficult. A popular method of doing so is to measure characteristics intrinsic to the pulse shape of each radiation type in order to perform pulse-shape discrimination (PSD).

Historically, PSD capable systems have been designed with two approaches in mind: specialized analog circuitry, or digital signal processing (DSP). In this work we propose a PSD capable circuit topology using techniques from both the analog and DSP domains. We …

Data Processing Electronics For An Ultra-Fast Single-Photon Counting Camera, Jackson Hyde

McKelvey School of Engineering Theses & Dissertations

Localizing photon arrivals with high spatial (megapixel) and temporal (sub-nanosecond) resolution would be transformative for a number of applications, including single-molecule super-resolution fluorescence microscopy. Here, the Data Processing Field Programmable Gate Array (FPGA) is developed as an ultra-fast computational platform built on an FPGA for a microchannel plate (MCP)-photomultiplier tube (PMT) based single-photon counting camera. Each photon is converted by the MCP-PMT into an electron cloud that generates current pulses across a 50×50 cross-strip anode. The Data Processing FPGA executes a massively parallel center-of-gravity coordinate determination algorithm on the digitized current pulses to determine a 2D position and time of …

Investigating Single Precision Floating General Matrix Multiply In Heterogeneous Hardware, Steven Harris

McKelvey School of Engineering Theses & Dissertations

The fundamental operation of matrix multiplication is ubiquitous across a myriad of disciplines. Yet, the identification of new optimizations for matrix multiplication remains relevant for emerging hardware architectures and heterogeneous systems. Frameworks such as OpenCL enable computation orchestration on existing systems, and its availability using the Intel High Level Synthesis compiler allows users to architect new designs for reconfigurable hardware using C/C++. Using the HARPv2 as a vehicle for exploration, we investigate the utility of several of the most notable matrix multiplication optimizations to better understand the performance portability of OpenCL and the implications for such optimizations on this and …

Investigating Read/Write Aggregation To Exploit Power Reduction Opportunities Using Dual Supply Voltages, Gu Yunfei

McKelvey School of Engineering Theses & Dissertations

Power consumption plays an important role in computer system design today. On-chip memory structures such as multi-level cache make up a significant proportion of total power consumption of CPU or Application-Specific Integrated Circuit (AISC) chip, especially for memory-intensive application, such as floating-point computation and machine learning algorithm. Therefore, there is a clear motivation to reduce power consumption of these memory structures that are mostly consisting of Static Random-Access Memory (SRAM) blocks. In this defense, I will present the framework of a novel dual-supply-voltage scheme that uses separate voltage levels for memory read and write operations. By quantitatively analyzing the cache …