Engineering Commons^™

Acuta Enews January 1996, Vol. 25, No. 1

ACUTA Newsletters

In This Issue

From the President

SIUE $1.1 Million Phone Scam

NUI Implements ADSI Technology

Sewanee Campus Hooked up to Info Highway

ACUTA Listserves

From ACUTA Headquarters

Linear Programming With Inequality Constraints Via Entropic Perturbation, Jacob Tsao, Shu-Cherng Fang

Faculty Publications

A dual convex programming approach to solving linear programs with inequality constraints through entropic perturbation is derived. The amount of perturbation required depends on the desired accuracy of the optimum. The dual program contains only non-positivity constraints. An ϵ-optimal solution to the linear program can be obtained effortlessly from the optimal solution of the dual program. Since cross-entropy minimization subject to linear inequality constraints is a special case of the perturbed linear program, the duality result becomes readily applicable. Many standard constrained optimization techniques can be specialized to solve the dual program. Such specializations, made possible by the simplicity of …

Coded Modulation For Satellite Broadcasting, Robert H. Morelos-Zaragoza, Oscar Y. Takeshita, Hideki Imai, Marc P. C. Fossorier, Shu Lin

Faculty Publications

In this paper, three-level block coded 8-PSK modulations, suitable for satellite broadcasting of digital TV signals, are presented. A design principle to achieve unequal error protection is introduced. The coding scheme is designed in such a way that the information bits carrying the basic definition TV signal have a lower error rate than the high definition information bits. The large error coefficients, formally associated with standard mapping by set partitioning, are reduced by considering a nonstandard partition of an 8-PSK signal set. The bits-to-signal mapping induced by this partition allows the use of suboptimal low-complexity soft-decision decoding of binary block …

Laboratory Growth Systems In Biofilm Research, Julian W. T. Wimpenny

Cells and Materials

The huge variety of ecosystems that we collectively refer to as "biofilm" is reflected by the numerous different systems available to grow them in the laboratory. The relationship between in situ systems, microcosms and laboratory models is defined and discussed. The first two represent holistic approaches designed to assess the structure and function of particular biofilms: the last is analytical and reductionist, aiming to isolate specific functions of biofilms in order to understand properties that can apply to biofilm in general. Properties of a model can be completely understood whilst this is unlikely with natural ecosystems because of the possibility …

Initial Biodeterioration Of Silicone Rubber By C. Albicans And C. Aropicalis Strains Isolated From Voice Prostheses, H. C. Van Der Mei, B. Van De Belt-Gritter, F. Dijk, H. J. Busscher

Cells and Materials

Silicone rubber voice prostheses m patients after total laryngectomy become rapidly colonized by a biofilm, consisting of yeasts and bacteria. An especially troublesome feature of these biofilms is the ingrowth into the silicone rubber by colonizing yeasts. Microcolonies of ingrowing yeasts have been frequently observed on explanted voice prostheses after 3-4 months use. Incubation of silicone rubber samples in a modified Robbins device with a culture of Candida tropicalis, isolated from a Groningen button voice prosthesis, while passing the yeasts through a cycle of feasts (7 days) and famine (also 7 days) demonstrated, by electron microscopy, the onset of the …

Effects Of Solidification Conditions And Heat Treatment On The Microstructure And Vickers Hardness Of Pd-Cu-Ga Dental Alloys, William A. Brantley, Zhuo Cai, Stanley G. Vermilyea, Efstratios Papazoglou, John C. Mitchell, Alan B. Carr

Cells and Materials

Two representative Pd-Cu-Ga dental alloys, one with a dendritic as-cast microstructure containing a eutectic interdendritic constituent and the other with an equiaxed fine-grained as-cast microstructure containing a near-surface eutectic constituent, have been subjected to rapid quenching following casting, in addition to the conventional bench cooling recommended by the manufacturers. The quenched alloys were subsequently heat treated at temperatures of 1200°, 1500° and 1800 op that span the range of the firing cycles for dental porcelain. Scanning electron microscopic examination showed that the lamellar eutectic constituents normally present in the microstructures of the as-cast and bench-cooled alloys persisted when the alloys …

Gap Junctional Intercellular Communication In Bone, Henry J. Donahue, Monique A. Vander Molen, Clare E. Yellowley, Zhongyong Li

Cells and Materials

Gap junctional intercellular communication has been demonstrated in bone cells and may contribute to the mechanism by which osteoblasts integrate and amplify extracellular signals, both chemical (hormonal) and biophysical (electrical and mechanical). Connexin 43 (Cx43) is the predominant gap junction protein expressed by bone cells. Experiments with osteoblastic cells in which Cx43 expression was diminished by antisense transfection demonstrate that cell-to-cell coupling in osteoblastic ROS 17/2.8 cells is via gap junctions composed of Cx43. Cellular networks of these coupling deficient clones are dramatically less responsive to parathyroid hormone (PTH) suggesting that coupling contributes to hormonal responsiveness. Furthermore, PTH per se …

An O(N) Algorithm For Stokes And Laplace Interactions Of Particles, Ashok S. Sangani, Guobiao Mo

Biomedical and Chemical Engineering - All Scholarship

A method for computing Laplace and Stokes interactions among N spherical particles arbitrarily placed in a unit cell of a periodic array is described. The method is based on an algorithm by Greengard and Rokhlin [J. Comput. Phys. 73, 325 (1987)] for rapidly summing the Laplace interactions among particles by organizing the particles into a number of different groups of varying sizes. The far-field induced by each group of particles is expressed by a multipole expansion technique into an equivalent field with its singularities at the center of the group. The resulting computational effort increases only linearly with N. The …

A Framework For Integrated Communication And I/O Placement, Rajesh Bordawekar, Alok Choudhary, J Ramanujam

Electrical Engineering and Computer Science - All Scholarship

This paper describes a framework for analyzing dataflow within an out-of-core parallel program. Dataflow properties of FORALL statement are analyzed and a unified I/O and communication placement framework is presented. This placement framework can be applied to many problems, which include eliminating redundant I/O incurred in communication. The framework is validated by applying it for optimizing I/O and communication in out-of-core stencil problems. Experimental performance results on an Intel Paragon show significant reduction in I/O and communication overhead.

Fabrication Of A Three-Phase Double Polysilicon Charge Coupled Devices, Sarah Cohen

Journal of the Microelectronic Engineering Conference

Charge-coupled devices were fabricated using the existing seven level mask design (Scott Kipperman). Previous attempts at RIT (Scott Kipperman, Michael McGranahan) to fabricate working CCD's have not been successful, perhaps due to time constraints and misprocessed lots. Devices were completed using the current CCD process, while overcoming previous process problems. Results include testing of poly1 and poly2 transistors, and an attempt to test a one-dimensional 8-pixel array electrically. Equivalent capacitors were built, the threshold voltages obtained were 6.84V and 6.62V, respectively. The 8-pixel array was shown to be light sensitive, and conduct current as all three phases were pulsed high. …

Calibration Of Process And Electrical Models For Rit Vertical Npn Bipolar Junction Transistors, Lena Zavyalova

Journal of the Microelectronic Engineering Conference

Presented study is based on the need in 2D process and device simulations providing a good estimation of in-line process and electrical parameters for RIT vertical NPN bipolar junction transistors. These involve process and electrical modeling adjustments in order to reproduce vertical dopant profiles and show an appropriate electrical behavior of simulated BJTs Technology Modeling Associates (TMA) software has been implemented to facilitate this task. Theoretical and experimental verification efforts have been performed to examine the validity of the simulation results, and good agreement has been obtained.

A Practical Porous Silicon Device Structure For Increased Electroluminescent Efficiency, D Cardarelli

Journal of the Microelectronic Engineering Conference

This work reports on the results of two innovative designs for efficient silicon-based light emitting devices(LEDs). The two devices demonstrated improvement on the extraction efficiency of photons produced by electroluminescent porous silicon. With the previous structures, the produced luminescence was collected from the surface of the devices through the uses a redesigned top contact along with an etch into the active region of the device. The second type used an edge emitting arrangement. The new surface emitting device showed visible luminescence that was easily seen in a dim ambient. the edge emitting structure exhibited an increase in intensity of between …

Development Of A Polygate Pmos Process Compatible With Micromechanical Sensor Fabrication, Earl P. Schenck

Journal of the Microelectronic Engineering Conference

The objective for this study is to develop a device fabrication process that is compatible with the fabrication process that is compatible with the fabrication of on-chip micromachine sensors. It is desirable for the devices to be easily fabricated and to incorporate the least number of additional fabrication steps in the existing procedure of the micromechanical pressure sensor.

The polysilicon gate PMOS technology was merged into the fabrication of the capacitive pressure sensor with only two additional lithography steps that utilized the same mask. The primary results showed working PMOS transistors with a threshold voltage of -1 V, inverters with …

Formation Of Sidewall Spacers And Titanium Salicide For Rit's Sub-Micron Cmos, S K. Bhaskaran

Journal of the Microelectronic Engineering Conference

Low Temperature Oxide (LTO) sidewall spacers have been successfully fabricated using etchback an technique. The process for forming these features was optimised for repeatibility for RIT's sub-micron CMOS. In addition, a reliable process for forming low resistive self aligning titanium silicide was also developed using these sidewall spacers.

Chemical-Mechanical Polishing Of Copper With A Low K Polymer Interlevel Dielectric, Thomas L. Brown

Journal of the Microelectronic Engineering Conference

Chemical-mechanical polishing (CMP) of copper with a low dielectric constant polymer as interlevel dielectrics (ILD) has been demonstrated as a viable patterning approach for copper interconnect structures. This paper presents a study of the mechanisms involved in copper CMP when used with a low k ILD. A two-step model of copper CMP involves the mechanical abrasion of the copper surface followed by removal of the abraded material from the vicinity of the surface and has been optimized after rigorous CMP experiments with alternative slurries.

Development Of Bonding And Etchback Silicon On Insulator Wafers, Bobby Mozumder

Journal of the Microelectronic Engineering Conference

Bonding and Etchback Silicon on Insulator wafers were successfully developed at the Rochester Institute of Technology's Microelectronics facilities. [100] and [111] wafer pairs were successfully bonded using SOG and Thermal Oxides and etched back using times KOH etch. The results were successfully bonded wafer with a large Silicon layer.

Improvement In Polysilicon Etch Process For The Rit Factory, Thomas F. Flynn Jr

Journal of the Microelectronic Engineering Conference

Investigations of the polysilicon etch process utilized by the RIT factory for CMOS fabrication were conducted. The RIT factory process utilizes a dry polysilicon etch process that employs SF₆ and o₂ chemistry, with flow rates of 42 sccm and 7.5 sccm, at 400 mTorr pressure and 40 watts of RF power in a GEC PlasmaCell. This process was found to suffer from uniformity problems. Stdies were done to attempt to improve the etch uniformity, by varying the chamber pressure. A significant improvement in the uniformity was achieved for a much lower chamber pressure of 175 mTorr under the …

Rapid Thermal Oxidation Process For 100a Si02, Mark Maslow

Journal of the Microelectronic Engineering Conference

An examination of RIT's AG Associates Heatpulse 410 rapid thermal processing system has been conducted to look at the possibilities of an in-control, high quality, 100A oxide growth process. Some of the complications involved with modifying the existing system to have the oxidation capability are discussed. Growth rate curves for various temperatures have been developed through a designed experiment. MOS capacitors have been fabricated using an optimized 100A recipe to characterize the electrical properties of the oxide.

The process for growing 100A oxides was tested for uniformity, repeatability, and oxide quality. Ellipsometry mapping of the wafers showed a 5.8% uniformity …

Effects Of Variations In Rca Clean On Breakdown Characteristics Of Thin Gate Oxides, Bryan Kasprowicz

Journal of the Microelectronic Engineering Conference

Several variations on the order of the RCA clean have been investigated for their effects on oxide charges and interface trap density of thin gate oxides (200 - 250A). Surface Charge Analysis (SCA) will be employed to evaluate charges and traps immediately after oxide growth. Capacitors with aluminum gate were then fabricated to determine the dielectric field breakdown testing on an HP4145 parametric analyzer, the total oxide charge and interface trap density have been obtained from C-V testing using a Keithley simultaneous high frequency / low frequency system.

Surface Charge Analysis (Sca) Of 300 Angstrom Thermally Grown Oxides, Briand D. Handel

Journal of the Microelectronic Engineering Conference

As the microelectronic industry progresses toward smaller devices, a decrease in the thickness of gate oxides accompanies them. High quality cannot be sacrificed as a result of this shrinkage. It is believed that oxide quality can be related to oxide charge density. Total oxide charge is related to a shift in Vt for transistors and believed to be related to oxide breakdown strength.

A surface charge analyzer on loan from the SemiTest Corp. was used to quantify oxide charge densities after thermal oxidation of 300 A oxides under various processing conditions. Variations to the base process included the temperature at …

Role Of Hydrogen At The Si/Sio2 Interface On Mos Cv Characteristics, Rahul Sachdev

Journal of the Microelectronic Engineering Conference

In this study an attempt has been made to investigate the effect of intentional doping of hydrogen near the Si/SiO₂ interface by ion implantation. MOS capacitors were fabricated with a composite stacked dielectric of thermally grown SiO^₂ and LPCVD nitride with and without H-implantation. Poly gate capacitors fabricated on both N and P type silicon wafers showed no significant change with hydrogen implant. Effect of hydrogen was distinct in aluminum gate structures.

Inorganic Arc For Use In Microlithography, David J. Stern

Journal of the Microelectronic Engineering Conference

In this study silicon nitride has been seen to be an effective anti-reflective coating for use at wavelengths from 190 to 436mm. The report discusses effects of the film such as index of refraction, extinction coefficient, thickness, and stoichiometric composition for the application of ARC in microlithography.

Investigation Of New Positive And Negative Electron Beam Resists For Microlithography, Huy M. Cao

Journal of the Microelectronic Engineering Conference

The primary objective of this investigation was to obtain maximum electron beam resist contrast (gamma), maximum sensitivity, minimum thickness loss, and maximum plasma etch resistance for 10 KeV electron beam exposure process. This is to be achieved while maintaining a robust design. This study also compares the etch resistivity and etch rate of different electron beam resist materials to O2, Cl2, and SF6 containing plasma conditions. Measurements of the resist thickness loss yield the results of resist sensitivity and gamma for various development conditions

The Effects Of Contrast Enhancement Material Over An Image Reversal Resist System, Richard W. Nutter Iv

Journal of the Microelectronic Engineering Conference

As computer chips get smaller and the number of devices on them increases, the requirements for lithography reduction becomes more significant. One way to improve resolution and contrast of sub-micron features is to use an Image Reversal (IR) resist system. Further improvement can be obtained using a Contrast Enhancement Layer (CEL). The CEL provides a contact mask for the underlying resist system. The CEL allowed for the IR resist to produce better defined lines and spaces. Resolving 1 um lines was possible. However, the 1 um spaces were not. Overall, the contrast enhance material did improve resolution and contrast of …

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Threaded-Nail Fasteners - Research And Standardization Needs, B L. Wills, S G. Winistorfer, D A. Bender, David Pollock

Faculty Publications - Biomedical, Mechanical, and Civil Engineering

Threaded nail fasteners are commonly used in agricultural and commercial post-frame structures, yet there has been insufficient research to fully understand the effect of threads on withdrawal and lateral load resistance. The objective of this article is to review technical information on threaded nail fasteners and to identify problems facing manufacturers, designers, and users of threaded nail fasteners for engineering applications. Recommendations are given concerning research and standardization needs.

Seismic Performance Of Confined Sill Plate Connections, Joseph M. Bracci, Rebecca F. Stromatt, David Pollock

Faculty Publications - Biomedical, Mechanical, and Civil Engineering

In the aftermath of the 1994 Northridge earthquake, extensive field investigations revealed damage in wood frame construction in the form of splitting of the 2 X 4 or 2 X 6 wood sill plates along the line of anchor bolts that typically connect shear walls to the masonry or concrete foundation. Due to the severity of such brittle failures, the city of Los Angeles has recently restricted the use of 2X dimension lumber in sill plates and requires the use of 3X dimension lumber. This paper presents an experimental investigation of the performance of 2X dimension lumber sill plate connections …

Development Of A Tl-3 F-Shape Temporary Concrete Median Barrier, Ronald K. Faller, John R. Rohde, Barry T. Rosson, Richard P. Smith, Kenneth H. Addink

Mid-America Transportation Center: Final Reports and Technical Briefs

A temporary concrete median barrier (CMB) was designed and tested for compliance under the Test Level 3 (TL-3) guidelines specified in the Recommended Procedures for the Safety Performance Evaluation of Highway Features, National Cooperative Highway Research Program (NCHRP) Report No. 350. The barrier is built to the new metric standards and has a traditional pin and loop configuration for interconnection. The objective of this research project was to develop and evaluate a standardized, temporary concrete barrier design while addressing the concerns for safety, economy, structural integrity, constructability, ease of installation, and maintenance. The resulting F-shape barrier segment is 3,800-mm …