Digital Circuits Commons^™

Caddy: A 2005 Roborodentia Entry With Vision And Path Planning Abilities, Taylor Braun-Jones

Computer Engineering

Roborodentia is an autonomous robotics competition held each year during Cal Poly’s Open House. For the 2005 competition, robot entries needed to navigate a maze searching for three randomly placed golf balls, collect them, and then deposit the balls in the “nest” at the end of the maze. A newly added aspect for the 2005 competition included two bonus balls that were placed on a platform behind the wall in two predetermined corners of the maze.

Caddy is a robot that was entered into the 2005 Roborodentia competition. Caddy included a vision system that allowed searching for balls down untraveled …

Wireless Networks-On-Chips: Architecture, Wireless Channel, And Devices, David W. Matolak, Avinash Kodi, Savas Kaya, Dominic Ditomaso, Soumyasanta Laha, William Rayess

Faculty Publications

Wireless networks-on-chips (WINoCs) hold substantial promise for enhancing multicore integrated circuit performance, by augmenting conventional wired interconnects. As the number of cores per IC grows, intercore communication requirements will also grow, and WINoCs can be used to both save power and reduce latency. In this article, we briefly describe some of the key challenges with WINoC implementation, and also describe our example design, iWISE, which is a scalable wireless interconnect design. We show that the integration of wireless interconnects with wired interconnects in NoCs can reduce overall network power by 34 percent while achieving a speedup of 2.54 on real …

Design And Simulation Of Interconnected H-Bridge Inverter, Samuel Muehleck

Computer Engineering

In this project, the research, design and simulation of an interconnected H-bridge single-phase inverter was explored. The inverter design was divided into three separate sections. First, a VHDL programmed CPLD was used to generate control signals for the transistors of the inverter circuit. Second, power electronics was used to create an inverter circuit to change a DC input to a 60 Hz AC output. Lastly, additional circuits were used to link the generated control signals to the MOSFET transistors of the inverter circuit. The operation of the three components was then validated with computer simulations. Results of computer simulation demonstrate …

Riley The Cat, Nicholas Zankich

Computer Engineering

There are many toys that exist that are comfort objects. Generally these are toys that are soft such as blankets, stuffed animals, and pillows. Robotic toys also exist such as games, interactive books, and instruments. There exists a crossover market that includes Furbys, Tomagachi pets, and Fur Real Friends. While being very popular, I believe that this crossover isn’t perfect, and that there is a lot of room for improvement. Riley (Figure 1) was created to make something that is both completely a robot and a comfort object.

Iphone Breathalyzer: Point Oh Wait!, Gurpal Bhoot

Electrical Engineering

This final year project combines hardware and software components to create an alcohol breathalyzer that is compatible with the iPhone. The final design of the circuit and the iPhone application is original and combines multiple components to create the final product. Most of those components are seen in a simplified version of a breathalyzer, while the added components take care of the interface to the iPhone.

Bluemote!, Philip Kaye

Computer Engineering

In today’s society, our mobile phones are an extremely useful device when we are on the go and away from our homes; however, when we return home, our smart phone becomes just a communication tool again. Home automation is inevitable, and it will find its way into every house. The first person to commercialize it to the point where it is as easy to set-up and as affordable as a home router will end up breaking this slow trend. The key to this success is the smart phone; this should end up being the most expensive piece of hardware for …

Measurement And Modeling Of Passive Surface Mount Devices On Fr4 Substrates, Rahulkumar Sadanand Koche

Dissertations and Theses

Passive components like resistors, capacitors and inductors are used in every electronic system. These are the very basic components which affect the system performance at higher frequencies and it is necessary to understand and model the behavior of these components in a very accurate manner. This work focuses on utilizing Printed Circuit Board (PCB) test boards, or fixtures, made of FR4 for characterizing Surface Mount Device (SMD) components. Agilent's Advanced Design System (ADS) microwave circuit simulation software was used for designing the microstrip transmission lines as well as for generating the layout for manufacturing of the PCB. SMD resistors, capacitors …

Critical Information Technology On Fpgas Through Unique Device Specific Keys, Miles E. Mcgee

Theses and Dissertations

Field Programmable Gate Arrays (FPGAs) are being used for military and other sensitive applications, the threat of an adversary attacking these devices is an ever present danger. While having the ability to be reconfigured is helpful for development, it also poses the risk of its hardware design being cloned. Static random access memory (SRAM) FPGA's are the most common type of FPGA used in industry. Every time an SRAM-FPGA is powered up, its configuration must be downloaded. If an adversary is able to obtain that configuration, they can clone sensitive designs to other FPGAs. A technique that can be used …

Full Custom Vlsi Design Of On-Line Stability Checkers, Chris Y. Lee

Master's Theses

A stability checker is a clocked storage element, much like a flip-flop, which detects unstable and late signals in the pipeline of a digital system. The On-line stability checker operates concurrently with its associated circuit-under-test (CUT). This thesis describes the full custom very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course at Cal Poly.

A method for concurrent fault testing called On-line Stability Checking …

Detection Of Breathing And Infant Sleep Apnea, Brian Berg

Computer Engineering

Sleep apnea is a condition where people pause while breathing in their sleep; this can be of great concern for infants and premature babies. Current monitoring systems either require physical attachment to a user or may be unreliable. This project is meant to develop a device that can accurately detect breathing through sound and issue appropriate warnings upon its cessation. The device produced is meant to be a standalone device and thus was developed as an embedded systems project on a Xilinx Spartan 6 FPGA.

Programmable Household Led Light Fixture, Jordan Locano

Electrical Engineering

This report details the development and construction of a LED light fixture to be used for household lighting. This document details background information, design ideas, project specifications, production, assembly, testing, and conclusions involved with this project. The goals of this project is to design and build a cost-effective replacement for traditional room lighting that can perform better and last longer than traditional methods.

Project 308: Augmented Reality Mario Kart, Joseph Abad, David Allender, Joryl Calizo, Ryan Gaspar, Gavin Lee

Computer Engineering

Mario Kart is a popular go-kart racing game developed by Nintendo. The premise of the game is simple: drive a go-kart along a racetrack and reach the finish line before the other players. What makes this game unique, however, is the inclusion of weapons, traps, and other projectiles that a player can use to gain an advantage in the race. We have taken on the challenge of not only recreating this amazing game, but using the art of Augmented Reality to fully immerse the player in the full experience. Rather than play the game on a television screen with a …

Discrete Alarm Clock, Travis Moore, Collin Barth

Electrical Engineering

The standard alarm clock, as used daily by millions worldwide, has clear room for modification and improvement.  This paper documents an implementation that rectifies many of these flaws.  Improvements include adjustable snooze length, an IR remote for ease of use, and an RF headset for discrete alarm use or potential incorporation into a device much like a hearing aid.  The processes involved in creating a digital alarm clock, as well as the obstacles met in the implementation of the enhanced design, are detailed within.

An Expressive Vocal Midi Controller, Brady Hurlburt

Electrical Engineering Undergraduate Honors Theses

The choice of controller often characterizes the performance obtained from an electronic instrument. Controllers exist that allow electronic musicians to mimic the expressive qualities of keyboard, wind, string, and percussion instruments, but vocalists have been largely neglected. To fill this need, a realtime software vocal MIDI controller named Grove is developed and demonstrated. Grove's pitch and time analyses are shown to be accurate, and it has mappable control signals that go beyond the capabilities of previous audio-to-MIDI converters to facilitate an expressive performance. Grove's source code is available under the GNU GPL v3 license.

Worse-Than-Rayleigh Fading: Experimental Results And Theoretical Models, David W. Matolak, Jeff Frolik

Faculty Publications

This article is motivated by the recent recognition that channel fading for new wireless applications is not always well described by traditional models used for mobile communication systems. In particular, fading data collected for vehicleto- vehicle and wireless sensor network applications has motivated new models for conditions in which channel fading statistics can be worse than Rayleigh. We review the use of statistical channel models, describe our example applications, and provide both measured and modeling results for these severe fading conditions.

Relocatable Field Programmable Gate Array Bitstreams For Fault Tolerance, David P. Montminy, Rusty O. Baldwin, Paul D. Williams

AFIT Patents

A Field Programmable Gate Array (FPGA) circuit capable of operating through at least one fault. The FPGA circuit includes a configuration memory and an embedded microprocessor. The embedded microprocessor having access to the configuration memory, static modules, at least one relocatable module, and at least one spare module. The relocatable module being relocatable from a first target area to a second target area. The relocatable module being relocatable by manipulating a partial bitstream with the embedded microprocessor. The microprocessor calculating a plurality of bitstream changes, to relocate the at least one relocatable module using at least triple modular redundancy (TMR).

Development Of A Cubesat Payload To Model Particle Dampening In Space: Design And Implementation Of Software For Cp7, Daniel Walker

Computer Engineering

The California Polytechnic State University CubeSat student research & development group, PolySat, is currently in a mature development stage of a single unit CubeSat designated CP7. The CP7 mission implements a scientific payload designed to characterize particle dampers in microgravity conditions. When subjected to vibration, the momentum exchanges and frictional forces of the particles create a damping effect that can be optimized to suit a number of applications over a broad frequency and amplitude range. In space based applications, particle dampers would serve as a robust and simple device to eliminate jitter in optical assemblies and other sensitive instrumentation. This …

Multi-Threshold Cmos Circuit Design Methodology From 2d To 3d, Ross Josiah Thian

Graduate Theses and Dissertations

A new and exciting approach in digital IC design in order to accommodate the Moore's law is 3D chip stacking. Chip stacking offers more transistors per chip, reduced wire lengths, and increased memory access bandwidths. This thesis demonstrates that traditional 2D design flow can be adapted for 3D chip stacking. 3D chip stacking has a serious drawback: heat generation. Die-on-die architecture reduces exposed surface area for heat dissipation. In order to reduce heat generation, a low power technique named Multi-Threshold CMOS (MTCMOS) was incorporated in this work. MTCMOS required designing a power management unit (to control when and which gates …

Asynchronous Mips Processors: Educational Simulations, Robert L. Webb

Master's Theses

The system clock has been omnipresent in most mainstream chip designs. While simplifying many design problems the clock has caused the problems of clock skew, high power consumption, electromagnetic interference, and worst-case performance. In recent years, as the timing constraints of synchronous designs have been squeezed ever tighter, the efficiencies of asynchronous designs have become more attractive. By removing the clock, these issues can be mitigated. How- ever, asynchronous designs are generally more complex and difficult to debug. In this paper I discuss the advantages of asynchronous processors and the specifics of some asynchronous designs, outline the roadblocks to asynchronous …

Deterministic, Efficient Variation Of Circuit Components To Improve Resistance To Reverse Engineering, Daniel F. Koranek

Theses and Dissertations

This research proposes two alternative methods for generating semantically equivalent circuit variants which leave the circuit's internal structure pseudo-randomly determined. Component fusion deterministically selects subcircuits using a component identification algorithm and replaces them using a deterministic algorithm that generates canonical logic forms. Component encryption seeks to alter the semantics of individual circuit components using an encoding function, but preserves the overall circuit semantics by decoding signal values later in the circuit. Experiments were conducted to examine the performance of component fusion and component encryption against representative trials of subcircuit selection-and-replacement and Boundary Blurring, two previously defined methods for circuit obfuscation. …

Performance Evaluation Of A Field Programmable Gate Array-Based System For Detecting And Tracking Peer-To-Peer Protocols On A Gigabit Ethernet Network, Brennon D. Thomas

Theses and Dissertations

Recent years have seen a massive increase in illegal, suspicious, and malicious traffic traversing government and military computer networks. Some examples include illegal file distribution and disclosure of sensitive information using the BitTorrent file sharing protocol, criminals and terrorists using Voice over Internet Protocol (VoIP) technologies to communicate, and foreign entities exfiltrating sensitive data from government, military, and Department of Defense contractor networks. As a result of these growing threats, the TRacking and Analysis for Peer-to-Peer (TRAPP) system was developed in 2008 to detect BitTorrent and VoIP traffic of interest. The TRAPP system, designed on a Xilinx Virtex-II Pro Field …

5 Ghz Band Vehicle-To-Vehicle Channels: Models For Multiple Values Of Channel Bandwidth, Qiong Wu, David W. Matolak, Indranil Sen

Faculty Publications

In Sen and Matolak's earlier paper, 5-GHz-band vehicle-to-vehicle (V2V) channel models were presented for channel bandwidths of 5 and 10 MHz. In this paper, we provide additional tapped delay line models for bandwidths of 1, 20, 33.33, and 50 MHz based upon the data used in Sen and Matolak's paper. We provide tables of channel parameters for five types of V2V channel classes and also include example tap correlation coefficients. Root-mean-square delay spread values are summarized, as are values of bandwidth for which the channel frequency correlation takes values of 0.7 and 0.5. As with the results from Sen and …

Pretty Lights, Nicholas (Nick) Delmas, Matthew (Matt) Maniaci

Computer Engineering

Digital media players often include a visualization component that allows a user to watch a visualization synchronized to their music or videos. This project uses the visualization plugin API of an existing media playback program (WinAmp) but it displays its visuals using physical LED lights. Instead of outputting visuals to the computer screen, data is sent over USB to a micro controller that runs the LED lights. This project aims to give users a more visceral visual experience than traditional visualizations on the computer screen.

High Power Microwave (Hpm) And Ionizing Radiation Effects On Cmos Devices, Nicholas A. Estep

Theses and Dissertations

Integrated circuits (ICs) are inherently complicated and made worse by increasing transistor quantity and density. This trend potentially enhances concomitant effects of high energy radiation and local or impressed electromagnetic interference (EMI). The reduced margin for signal error may counter any gain in radiation hardness from smaller device dimensions. Isolated EMI and ionizing radiation studies on circuits have been conducted extensively over the past 30 years. However, little focus has been placed on the combined effects. To investigate the effect of combined EMI and ionizing radiation, two complementary metal oxide semiconductor (CMOS) inverter technologies (CD4069 and SN74AUC1G04) were analyzed for …

Virtual Wired Transmission Scheme - A Novel Technique For Efficient Mobile Adhoc Networks, Manikya Vinay Rali

Electrical & Computer Engineering Theses & Dissertations

This thesis proposes a method called virtual wired transmission scheme for ad hoc networks. The scheme is an efficient method to improve network performance parameters such as energy efficiency, capacity, interference, network throughput, etc. Performance parameters improvement can be done at different layers of the network architecture for mobile ad hoc networks. However most of the research efforts are concentrated on Physical, MAC and Network layers. In this thesis, a MAC protocol with a major MAC layer modification is proposed in combination with the usage of directional antennas, developing a novel method called virtual wired transmission scheme. In virtual wired …

Synthesis Minimizations And Mesh Algorithm Selection: An Extension Of The Ultrasonic 3d Camera, Taylor Johnson

Renée Crown University Honors Thesis Projects - All

Statement of Purpose

The purpose of this Capstone project was to perform synthesis minimizations and optimal mesh algorithm selection for some of the digital components of a prototype Ultrasonic 3D Camera, the subject of my group senior design project for computer engineering. Both of the high-level design tasks that I performed were unnecessary for the scope of the senior design class, whose focus was simply to perform a proof-of-concept or create a basic, functioning prototype. The steps I took in performing synthesis optimizations and mesh algorithm selection went beyond the scope of the senior project, by doing the polishing that …

Chip To Chip Optical Interconnection Using Mems Mirrors, Tod V. Laurvick

Theses and Dissertations

This experiment explores the use of MEMS mirrors to direct subsurface optical signals to another device and reception of those signals for use in chip to chip communications. Devices were built in PolyMUMPs to control horizontal and vertical beam direction and tilting in the outgoing signal and MEMS beam splitters for the incoming signal. Several elements of the outgoing beam path were successful and those which needed improvement indicate a high probability of success with limited trials needed and currently successful design elements could still be improved within the scope of PolyMUMPs. The incoming beam path elements were not successful …

Selfish Wavelength Assignment In Multifiber Optical Networks, Evangelos Bampas, Aris Pagourtzis, George Pierrakos, Katerina Potika

Faculty Publications, Computer Science

No abstract provided.

Evaluation Of A Field Programmable Gate Array Circuit Reconfiguration System, Jason L. Ives

Theses and Dissertations

This research implements a circuit reconfiguration system (CRS) to reconfigure a field programmable gate array (FPGA) in response to a faulty configurable logic block (CLB). It is assumed that the location of the fault is known and the CLB is moved according to one of four replacement methods: column left, column right, row up, and row down. Partial reconfiguration of the FPGA is done through the Joint Test Action Group (JTAG) port to produce the desired logic block movement. The time required to accomplish the reconfiguration is measured for each method in both clear and congested areas of the FPGA. …

Field-Programmable Analog Arrays: A Floating-Gate Approach, Tyson S. Hall

Faculty Works

Field-programmable analog arrays (FPAAs) provide a method for rapidly pro- totyping analog systems. Currently available commercial and academic FPAAs are typically based on operational amplifiers (or other similar analog primitives) with only a few computational elements per chip. While their specific architectures vary, their small sizes and often restrictive interconnect designs leave current FPAAs limited in functionality, flexibility, and usefulness. Recent advances in the area of floating-gate transistors have led to an analog technology that is very small, accurately programmable, and extremely low in power consumption. By leveraging the advantages of floating-gate devices, a large-scale FPAA is designed that dramatically …