Digital Circuits Commons^™

Design And Test Of Asynchronous Systems Using The Link And Joint Model, Ebelechukwu Esimai

Dissertations and Theses

Asynchronous circuits offer numerous advantages, including low energy consumption and good composability and scalability. However, they remain meagerly adopted in the mainstream semiconductor industry. One reason is the limited number of design tools available to help designers navigate design complexity, particularly the myriad of asynchronous implementation styles.

This dissertation focuses on managing the myriad of asynchronous implementation styles by utilizing a circuit-neutral model, called Links and Joints, and embedding this Link-Joint approach into a design flow. Although years of past work have already laid the groundwork, the work in this dissertation identifies and addresses key missing pieces.

First, the …

Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla

Dissertations and Theses

Many modern computer systems are distributed over space. Well-known examples are the Internet of Things and IBM's TrueNorth for deep learning applications. At the Asynchronous Research Center (ARC) at Portland State University we build distributed hardware systems using self-timed computation and delay-insensitive communication. Where appropriate, self-timed hardware operations can reduce average and peak power, energy, latency, and electromagnetic interference. Alternatively, self-timed operations can increase throughput, tolerance to delay variations, scalability, and manufacturability.

The design of complex hardware systems requires design automation and support for test, debug, and product characterization.

This thesis focuses on design compilation and test support for dataflow …

Analysis Of Parameter Tuning On Energy Efficiency In Asynchronous Circuits, Justin Thomas Roark

Graduate Theses and Dissertations

Power and energy consumption are the primary concern of the digital integrated circuit (IC) industry. Asynchronous logic, in the past several years, has increased in popularity due to its low power nature. This thesis analyzes a collection of array multipliers with different parameters to compare two asynchronous design paradigms, NULL Convention Logic (NCL) and Multi-Threshold NULL Convention Logic (MTNCL). Several commercially available pieces of software and custom scripts are used to analyze the asynchronous circuits and their components to provide the energy consumption estimation on various parts of each circuit. The analysis of the software results revealed that MTNCL circuits …

Cad Tool Design For Ncl And Mtncl Asynchronous Circuits, Vijay Mani Pillai

Graduate Theses and Dissertations

This thesis presents an implementation of a method developed to readily convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty compared to the all low-Vt implementation, and has negligible area overhead. The proposed tool utilizes industry-standard CAD tools. This research also presents an Automated Gate-Level Pipelining with Bit-Wise Completion (AGLPBW) method to maximize throughput of delay-insensitive full-word pipelined NCL circuits. These methods have been integrated into the Mentor Graphics and …