Digital Circuits Commons^™

A Novel Design-For-Test Flow Using Librelane, Mohamed E. Gaber

Theses and Dissertations

Design-for-testing is a crucial element of application-specific integrated circuit design, yet, in the nascent open-source electronic design automation scene, the solutions for it are sorely limited. Design-for-test-enabled chips allow defects to be caught early on in the manufacturing process, avoiding incurring huge costs if hardware with defective chips is shipped to equipment manufacturers or, worse, end-users. Yet, the current open-source solutions rely on a brute-force utility that does not scale and negatively impacts the design by holding design-for-testing features as co-equal with the design’s regular operation, and a nominally layout-aware solution that does not holistically integrate into a larger flow. …

A Study On Quantization And Hardware Cost Tradeoffs In A 5g Nr Ldpc Decoder On Fpga, Giancarlo Acosta

Master's Theses

The fixed-point implementation of a 5G New Radio LDPC decoder forces a tradeoff between precision and hardware cost, governed by the variable node word length W_L, the check node message width W_R, and the normalized min-sum correction factor α. This thesis characterizes how these three parameters affect both error correction performance and FPGA resource utilization for an LDPC decoder on an established LDPC decoder architecture. A bit-accurate MATLAB core model records bit error rate (BER) and frame error rate (FER) while a verified HDL Coder model generates synthesizable VHDL for Vivado synthesis, and both are swept …

Reproducing And Evaluating Charger Surfing: Robustness Of Smartphone Charging-Line Side-Channels, Colby M. Watts

Master's Theses

Smartphones are frequently connected to external, untrusted charging hardware, creating opportunities for side-channel attacks that do not require malware or direct access to device data. Charger Surfing, a recently proposed charging-line power analysis side-channel attack, reported high accuracy in inferring touchscreen input from voltage measurements collected from a smartphone’s charging cable; however, the reproducibility and robustness of these results under different conditions remain unclear. This thesis presents an independent replication and evaluation of Charger Surfing, including the development of an end-to-end data collection pipeline consisting of a modified charging cable, oscilloscope-based recordings, custom Android app, automated trace processing, and convolutional …

Polysaber: A Custom Reactive Lightsaber Soundboard, Pedro B. Medeiros

Computer Engineering

The PolySaber project was developed as a custom reactive lightsaber control system built as a fully custom PCB design. The purpose of the project was to create a lower-cost and more customizable alternative to commercially available lightsaber soundboards while simultaneously providing hands-on experience in PCB design, embedded systems development, and hardware integration. Commercial lightsaber soundboards are expensive, proprietary, and difficult for hobbyists to customize. The PolySaber project addresses this by creating a modifiable hardware platform built around the ESP32 microcontroller. The system supports programmable firmware, RGB NeoPixel blade control, motion sensing, reactive swing and clash effects, onboard audio amplification, and …

Improving Human Visual Search: Enhancing Lung Cancer Nodule Detection In Medical Images, Christopher Khajira

Masters Theses

Human visual search involves the identification of relevant signals within information-rich environments, which is a fundamental problem in visual perception. While detection accuracy and response time are commonly used to evaluate performance in visual search, these measures do not reveal the underlying cognitive and computational structure that produces observable behavior. A key challenge lies in distinguishing between competing processing architectures, particularly in complex visual domains where different models can produce similar behavioral outcomes. This study addresses this challenge by developing a computational experimental framework for analyzing visual search behavior using System Factorial Technology (SFT). The experimental framework integrates naturalistic medical …

Exploration Of Real-Time Power Electronic Simulation On Amd Npu, Shouyu Du

All Theses

The rapid electrification of the automotive and data center sectors has created a critical demand for high-fidelity, real-time simulation of complex power electronic systems. While Hardware- in-the-Loop (HIL) simulation on Field-Programmable Gate Arrays (FPGAs) is the current industry standard, it presents significant challenges regarding development complexity and memory limita- tions. This dissertation investigates the feasibility of utilizing Neural Processing Units (NPUs)— specifically the AMD AI Engine (AIE) XDNA2 architecture—as a novel platform for real-time, deterministic circuit simulation. This study establishes a comprehensive automated modeling framework based on graph theory and Massarini’s method to derive linear state-space representations for arbitrary circuit …

Design And Verification Of The Multi-Slit Solar Explorer Camera Field Programmable Gate Arrays, Jordan M. Johnson

All Graduate Reports and Creative Projects, Fall 2023 to Present

The Multi-Slit Solar Explorer, or MUSE, is a NASA mission that will take images of the Sun to study solar flares and the solar corona. The mission will provide insight into the mechanisms behind space weather. The mission consists of two cameras: the Spectrograph (SG), and the Context Imager (CI). The Utah State University Space Dynamics Laboratory is providing both cameras for the mission.

This report describes a part of the design and verification process for a central component on these cameras known as the Field Programmable Gate Arrays (FPGAs). These FPGAs are programmed to acquire, handle, and send images …

Developing A Framework For Microchip Design Recovery, Eric Diep

Graduate Theses and Dissertations (2019 - present)

Due to the increase in diverse chip production over the past decade, reverse engineering has become a difficult and daunting task. This research develops a methodology for microchip design recovery, seeking to validate and reproduce prior approaches to physical reverse engineering using low-cost tools and techniques. We used mechanical hardware abrasion tools and techniques to delayer and capture silicon integrated chip (IC) layout. We focused on the Mifare Classic EVl microchip, commonly implemented in public transit/transportation cards, to extract information for design recovery. The research explores limitations and advantages of mechanical abrasion and optical microscopy in context to modem chip …

Developing A Multi-Band Gnss Remote Sensing Station To Measure Precipitable Water Vapor For Flash Flood Nowcasting, Madison Gleydura

Doctoral Dissertations and Master's Theses

Flash flood nowcasting in Central and Southern Appalachia is particularly challenging due to steep terrain, narrow valleys, highly localized rainfall patterns, and limited measurement coverage. Traditional remote sensing methods, such as Doppler radar and microwave radiometry, suffer from reduced resolution at long range and signal blockage by mountains. GNSS-meteorology offers an established alternative for measuring precipitable water vapor and is currently integrated into several numerical weather models. Recent research demonstrates that commercial-grade GNSS receivers can produce tropospheric products comparable to those from geodetic-grade equipment. The gaps in mountain coverage can be addressed by developing a low-cost, self-contained embedded system that …

A Capability Maturity Model For Artificial Intelligence Integration In Supply Chain Management, Lordt Becklines

Dissertations

Artificial Intelligence (AI) is transforming Supply Chain Management (SCM), yet many organizations struggle to assess their readiness for AI adoption and to understand how AI capabilities develop across maturity stages. This dissertation addresses this gap by developing a Capability Maturity Model (CMM) for AI integration in SCM, grounded in Organizational Information Processing Theory (OIPT), the Resource-Based View, and related capability frameworks. The model provides a structured approach for evaluating an organization's information-processing requirements, resource configurations, and alignment needed for effective AI-enabled supply chain operations.

Using a design science research approach, the AI-SCM CMM and its associated assessment instrument were derived …

Flexible Fault-Tolerant Multi-Die Fpga-Based Architectures For Varying Space Environments, Yosof Ali Seif El Din Ali Maklad

Theses and Dissertations

It is well-known fact that spacecraft’s electronic components operate in an extreme harsh and varying space environments, beside changing orbit or passing through Van Allan Belts during orbital course results of radiation levels change. This thesis focuses on SRAM-based FPGA systems on-board of such spacecrafts, that are commonly utilized in space applications’ critical applications due to their capabilities and flexibility to reconfigure, since these systems are vulnerable to frequent negative impacts of ionizing radiation, thus inducing soft and hard errors leading to disastrous failures that could jeopardize the entire spacecraft. The soft errors’ effects are frequent yet can be mitigated, …

Statistical Monitoring Of Hard Faults In Digital Systems, Dany Akshay Deep Isukapalli

Electrical Engineering Theses and Dissertations

Achieving a high test coverage is crucial for helping to ensure that integrated circuits are working correctly and are non-defective. Although scan-based structural tests are used throughout the industry, high-level functional tests may be needed to detect some defects— especially those that are environmentally sensitive. Unfortunately, the character of functional test makes it difficult to obtain high coverage, and it is even hard to estimate coverage because fault simulation times of large circuits are long. As a result, some method is required for predicting the ability of a functional test that has not been fault simulated to detect defects. In …

How’S It Growing? Tools For Observing Snow And Sea Ice In A Changing Arctic Ocean, Ian Alexander Raphael

Dartmouth College Ph.D Dissertations

September Arctic sea ice extent has diminished by roughly 50% in the 45 years since satellite observations began. The Arctic Ocean may experience ice-free summers within the next decade, with implications for habitat, resource extraction, geopolitics, and local and global climate change. To predict how Arctic sea ice will change in the future, we need to understand its behavior in the present. In situ sea ice mass balance measurements (snow accumulation, ice growth, snow and ice surface melt, and bottom melt) are essential for studying the processes driving rapid changes in the ice pack, and for validating remote sensing measurements …

Open Source Asic Design Curriculum, Francisco Wilken

Master's Theses

The ever-growing importance of Application-Specific Integrated Circuits (ASICs) in a high-compute world necessitates that college graduates entering the workforce are well prepared to design them. This thesis details the design of novel ASIC curriculum, using open source tools to teach at the undergraduate level. By moving to a higher level of abstraction than classical transistor-focused coursework, chip design material can be made accessible earlier in an undergraduate degree. Additionally, open source tools provide a powerful, free, and portable platform for students to create their own designs, solving assignments focused on industry readiness. Finally, this thesis studies the results and challenges …

Design Considerations Of A Gpu, Nicholas M. Devilliers

Electrical Engineering and Computer Science Undergraduate Honors Theses

With the current era of AI technology, the era of single instruction multiple data has become an increasingly viable solution to accelerate training. The problem is that while software to use GPUs and other hardware accelerators, designing GPUs and ASIC devices has become increasingly more expensive and there aren’t great examples of generic GPUs that anyone can use and modify. In this thesis, there are four design considerations that will be discussed and how they affect the result of a generic GPU. The four considerations that were talked about in the thesis are, word width, arithmetic type, number of stages, …

Design And Implementation Of Uvm-Based Verification Framework For Deep Learning Accelerators, Randa Ahmed Hussein Aboudeif

Theses and Dissertations

Recent advancements in deep learning (DL) have made hardware accelerators, known as deep learning accelerators (DLAs), a preferred solution for numerous high-performance computing (HPC) applications, including speech recognition, computer vision, and image classification. DLAs are composed of hundreds of parallel processing engines to speed up computations and can gain access to pre-trained networks from the cloud or through on-chip memory to implement the DNN inference process. DLA verification is becoming an important and challenging phase. The verification process is required to handle the complex DLA design. Moreover, the reliability of DLAs is critical for assessment as they are involved in …

Trace Flight Computer, Zachary Stratton, Vandad Mossavand Varkaneh, Nicholas Ely

Williams Honors College, Honors Research Projects

In the world of collegiate rocketry, there are currently no commercial-off-the-shelf flight computers capable of being fitted to liquid engine rockets with thrust vectoring control. Currently, amateur rocketeers utilize unreliable Arduino-based systems or expensive drone computers. The objective of this project is to design a flight computer capable of data collection and filtering, telemetry transmission, and real-time controls of critical safety systems using readily available commercial-off-the-shelf components to allow rocketeers to complete their designs within a reasonable budget. The system will collect data from two IMUs, a barometric altimeter, and a magnetometer, then filter the collected data using custom Kalman …

Autonomous Landscape Exploration Rover Using Imaging Surface Navigation (Alexis), Noah Jones, Dominic Salupo

Williams Honors College, Honors Research Projects

The objective is to develop a small-form-factor rover prototype that can be used to prove out a novel traversal method for use on extraterrestrial surfaces. The novel traversal method being proposed is LIDAR/CV-enhanced navigation, provided by a detachable flight vehicle that can communicate with the rover. On planets with thin atmospheres, cold gas thrusters or similar may be needed, but for the scope of this project more traditional flight/propulsion methods will be used.

Design And Test Of Asynchronous Systems Using The Link And Joint Model, Ebelechukwu Esimai

Dissertations and Theses

Asynchronous circuits offer numerous advantages, including low energy consumption and good composability and scalability. However, they remain meagerly adopted in the mainstream semiconductor industry. One reason is the limited number of design tools available to help designers navigate design complexity, particularly the myriad of asynchronous implementation styles.

This dissertation focuses on managing the myriad of asynchronous implementation styles by utilizing a circuit-neutral model, called Links and Joints, and embedding this Link-Joint approach into a design flow. Although years of past work have already laid the groundwork, the work in this dissertation identifies and addresses key missing pieces.

First, the …

Enhancing Cybersecurity In Wireless Sensor Networks: Machine Learning, Blockchain And Future Perspectives, Ilemona Solomon Atawodi

Dissertations

Security in the Industrial Internet of Things encounters various security issues but the main issues can be broken down into three core issues: Availability, Integrity, and Confidentiality. Security challenges generally tend to be caused by a failure of the system in one of these areas or cause a failure in one of these areas. Therefore researching scalable solutions to these security issues is prudent to explore methods that could be applied to large-scale industrial IIoT with tens to hundreds of devices as well as small-scale systems on a tiny factory floor comprising of just a few devices. In our research, …

Towards A Wearable Device For Measuring Impedance Plethysmography Of The Radial Artery, Pritom Chowdhury

Dartmouth College Master’s Theses

Recent advancements in bioimpedance technology have demonstrated significant promise in the application of cardiac health monitoring. This research explores the design and development of a forearm-based wearable bioimpedance device for non-invasive measurement of heart rate and respiratory rate at an accuracy level comparable to medical-grade monitors. It utilizes a tetrapolar electrode configuration to analyze bioimpedance changes in the radial artery due to blood flow.

An ongoing aspect of this work involves the preliminary development of an embedded framework intended to integrate signal generation, acquisition, and processing within the device to achieve compact and efficient system design, anticipated to contribute to …

A Novel Processor Architecture Implementing The Stacked Error Diffusion Algorithm And Its Zynq-Based Realization, Qishi Hu

Theses and Dissertations--Electrical and Computer Engineering

Digital halftoning reproduces continuous-tone images using patterns of black and white dots, while multitoning extends this concept by incorporating inks with intermediate intensities. These techniques are extensively utilized in the printing industry to accommodate the limited range of inks available in printers. Stacked error diffusion is a high-quality multitoning algorithm that adheres to the blue-noise dithering standard. This thesis research studies the potential parallelism inherent in the algorithm and introduces the design of a novel processor architecture optimized for efficient execution. The architecture is realized on an FPGA development board featuring a Zynq SoC. Additionally, the hardware prototype can also …

Gen-Acceleration: Pioneering Work For Hardware Accelerator Generation Using Large Language Models, Durga Lakshmi Venkata Deepak Vungarala

Theses

Optimizing computational power is critical in the age of data-intensive applications and Artificial Intelligence (AI)/Machine Learning (ML). While facing challenging bottlenecks, conventional Von-Neumann architecture with implementing such huge tasks looks seemingly impossible. Hardware Accelerators are critical in efficiently deploying these technologies and have been vastly explored in edge devices. This study explores a state-of-the-art hardware accelerator; Gemmini is studied; we leveraged the open-sourced tool. Furthermore, we developed a Hardware Accelerator in the study we compared with the Non-Von-Neumann architecture. Gemmini is renowned for efficient matrix multiplication, but configuring it for specific tasks requires manual effort and expertise. We propose implementing …

Electronic Note-String Detector, Gavin Garcia-Rossi, Tommy Smail

Electrical Engineering

As the virtual space has become a dominant part of everyone’s day-to-day lives, many normal face-to-face interactions and services have not yet been facilitated by adapting technology. One of these prevailing areas is music lessons. Over Zoom meetings, or other virtual platforms, it is tremendously challenging to teach students. These challenges include recognizing student mistakes audibly and visually, and being able to give confident feedback on the incorrect notes played by learning musicians. Without having to delve into improving the complex systems that would be required to improve audio, video, and connection quality of these connections, we have another solution …

Accelerating Machine Learning Inference For Satellite Component Feature Extraction Using Fpgas., Andrew Ekblad

Theses and Dissertations

Running computer vision algorithms requires complex devices with lots of computing power, these types of devices are not well suited for space deployment. The harsh radiation environment and limited power budgets have hindered the ability of running advanced computer vision algorithms in space. This problem makes running an on-orbit servicing detection algorithm very difficult. This work proposes using a low powered FPGA to accelerate the computer vision algorithms that enable satellite component feature extraction. This work uses AMD/Xilinx’s Zynq SoC and DPU IP to run model inference. Experiments in this work centered around improving model post processing by creating implementations …

Remote Side-Channel Disassembly On Field-Programmable Gate Arrays, Brandon R. Baggett

Graduate Theses and Dissertations (2019 - present)

Over the last two decades, side-channel vulnerabilities have shown to be a major threat to embedded devices. Most side-channel research has developed our understanding of the vulnerabilities to cryptographic devices due to their implementation and how we can protect them. However, side-channel leakage can yield useful information about many other processes that run on the device. One promising area that has received little attention is the side-channel leakage due to the execution of assembly instructions. There has been some work in this area that has demonstrated the idea’s potential, but so far, this research has assumed the adversary has physical …

Unveiling Pain: Wearables For Objective Pain Measurement, Hanqing Tang

Masters Theses

">">Pain perception is a subjective experience that differs significantly among individuals, often leading to inconsistencies in assessment and management. A critical issue within this context is the gender bias in pain evaluation, which contributes to unequal treatment and perpetuates gender inequality within the healthcare system. This thesis presents an in-depth investigation of the problem and proposes the development of a wearable device for objective pain assessment. Physiological parameters — Electrocardiography (ECG) can be collected from cardiac sound signals auscultated by fabrics via nanometre-scale vibrations. Machine learning methods can accurately classify heart rate and acute pain intensity of participants. …

Digital Simulations Of Memristors Towards Integration With Reconfigurable Computing, Ivris Raymond

Computer Science and Computer Engineering Undergraduate Honors Theses

The end of Moore’s Law has been predicted for decades. Demand for increased parallel computational performance has been increased by improvements in machine learning. This past decade has demonstrated the ever-increasing creativity and effort necessary to extract scaling improvements in CMOS fabrication processes. However, CMOS scaling is nearing its fundamental physical limits. A viable path for increasing performance is to break the von Neumann bottleneck. In-memory computing using emerging memory technologies (e.g. ReRam, STT, MRAM) offers a potential path beyond the end of Moore’s Law. However, there is currently very little support from industry tools for designers wishing to incorporate …

Towards Multipronged On-Chip Memory And Data Protection From Verification To Design And Test, Senwen Kan, Jennifer Dworak

Computer Science and Engineering Theses and Dissertations

Modern System on Chips (SoCs) generally include embedded memories, and these memories may be vulnerable to malicious attacks such as hardware trojan horses (HTHs), test access port exploitation, and malicious software. This dissertation contributes verification as well as design obfuscation solutions aimed at design level detection of memory HTH circuits as well as obfuscation to prevent HTH triggering for embedded memory during functional operation. For malicious attack vectors stemming from test/debug interfaces, this dissertation presents novel solutions that enhance design verification and securitization of an IJTAG based test access interface. Such solutions can enhance SoC protection by preventing memory test …

Applying Hls To Fpga Data Preprocessing In The Advanced Particle-Astrophysics Telescope, Meagan Konst

McKelvey School of Engineering Graduate Student Theses & Dissertations

The Advanced Particle-astrophysics Telescope (APT) and its preliminary iteration the Antarctic Demonstrator for APT (ADAPT) are highly collaborative projects that seek to capture gamma-ray emissions. Along with dark matter and ultra-heavy cosmic ray nuclei measurements, APT will provide sub-degree localization and polarization measurements for gamma-ray transients. This will allow for devices on Earth to point to the direction from which the gamma-ray transients originated in order to collect additional data. The data collection process is as follows. A scintillation occurs and is detected by the wavelength-shifting fibers. This signal is then read by an ASIC and stored in an ADC …