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Full-Text Articles in Digital Circuits

Chatgpt As Metamorphosis Designer For The Future Of Artificial Intelligence (Ai): A Conceptual Investigation, Amarjit Kumar Singh (Library Assistant), Dr. Pankaj Mathur (Deputy Librarian) Mar 2023

Chatgpt As Metamorphosis Designer For The Future Of Artificial Intelligence (Ai): A Conceptual Investigation, Amarjit Kumar Singh (Library Assistant), Dr. Pankaj Mathur (Deputy Librarian)

Library Philosophy and Practice (e-journal)

Abstract

Purpose: The purpose of this research paper is to explore ChatGPT’s potential as an innovative designer tool for the future development of artificial intelligence. Specifically, this conceptual investigation aims to analyze ChatGPT’s capabilities as a tool for designing and developing near about human intelligent systems for futuristic used and developed in the field of Artificial Intelligence (AI). Also with the helps of this paper, researchers are analyzed the strengths and weaknesses of ChatGPT as a tool, and identify possible areas for improvement in its development and implementation. This investigation focused on the various features and functions of ChatGPT that …


Improving Noise Immunity And Efficiency Using High-Precision Iterative Codes, Sherzod Shukhratovich Atadjanov, Aziza Ahmadjanovna Tursunova Dec 2021

Improving Noise Immunity And Efficiency Using High-Precision Iterative Codes, Sherzod Shukhratovich Atadjanov, Aziza Ahmadjanovna Tursunova

Bulletin of TUIT: Management and Communication Technologies

The article discusses the issues of ensuring noise immunity in digital broadcasting systems, shows the importance of the transition to the optimal code and the need to use it in the field of noiseless coding in various areas of telecommunication transmission and reception of digital signals. The previous algorithms and error-correcting coding methods based on the Gray code, which are used in multi-level digital broadcast modulation schemes to minimize the intensity of bit errors, are highlighted. A model of error-correcting coding by the Gray method and methods for estimating the probability of error for the Gray code are presented. Based …


Malicious Hardware & Its Effects On Industry, Gustavo Perez May 2021

Malicious Hardware & Its Effects On Industry, Gustavo Perez

Computer Science and Computer Engineering Undergraduate Honors Theses

In recent years advancements have been made in computer hardware security to circumnavigate the threat of malicious hardware. Threats come in several forms during the development and overall life cycle of computer hardware and I aim to highlight those key points. I will illustrate the various ways in which attackers exploit flaws in a chip design, or how malicious parties take advantage of the many steps required to design and fabricate hardware. Due to these exploits, the industry and consumers have suffered damages in the form of financial loss, physical harm, breaches of personal data, and a multitude of other …


A Morphable Fpga Soft Processor Using Llvm Infrastructure Targeting Low-Power Application-Specific Embedded Systems, Ehsan Ali Jan 2020

A Morphable Fpga Soft Processor Using Llvm Infrastructure Targeting Low-Power Application-Specific Embedded Systems, Ehsan Ali

Chulalongkorn University Theses and Dissertations (Chula ETD)

The reconfigurable computing (RC) aims to combine the flexibility of General-Purpose Processor (GPP) with performance of Application Specific Integrated Circuits (ASIC). There are several architectures proposed since RC's inception in 1960s, but all have failed to become mainstream. The main factor preventing RC to become common practice is its requirement for implementers of algorithms (programmers) to be familiar with hardware design. In RC, a hardened processor cooperates with a dynamic reconfigurable Hardware Accelerator (HA) which is implemented on Field-Programmable Gate Array (FPGA). The HA implements crucial software kernel on hardware to increase performance and its design demands digital circuit expertise. …


Prototyping A Capacitive Sensing Device For Gesture Recognition, Chenglong Lin May 2019

Prototyping A Capacitive Sensing Device For Gesture Recognition, Chenglong Lin

Computer Science and Computer Engineering Undergraduate Honors Theses

Capacitive sensing is a technology that can detect proximity and touch. It can also be utilized to measure position and acceleration of gesture motions. This technology has many applications, such as replacing mechanical buttons in a gaming device interface, detecting respiration rate without direct contact with the skin, and providing gesture sensing capability for rehabilitation devices. In this thesis, an approach to prototype a capacitive gesture sensing device using the Eagle PCB design software is demonstrated. In addition, this paper tested and evaluated the resulting prototype device, validating the effectiveness of the approach.


Investigating The Effect Of Detecting And Mitigating A Ring Oscillator-Based Hardware Trojan, Lakshmi Ramakrishnan Oct 2018

Investigating The Effect Of Detecting And Mitigating A Ring Oscillator-Based Hardware Trojan, Lakshmi Ramakrishnan

Electrical Engineering Theses and Dissertations

The outsourcing of the manufacturing process of integrated circuits to fabrications plants all over the world has exposed these chips to several security threats, especially at the hardware level. There have been instances of malicious circuitry, such as backdoors, being added to circuits without the knowledge of the chip designers or vendors. Such threats could be immensely powerful and dangerous against confidentiality, among other vulnerabilities.

Defense mechanisms against such attacks have been probed and defense techniques have been developed. But with the passage of time, attack techniques have improved immensely as well. From directly observing the inputs or outputs, adversaries …


Multiferroic Tunnel Junctions And Ferroelectric Control Of Magnetic State At Interface, Y. W. Yin, M. Raju, W. J. Hu, John D. Burton, Y.-M. Kim, A. Y. Borisevich, S. J. Pennycook, S. M. Yang, T. W. Noh, Alexei Gruverman, X. G. Li, Z. D. Zhang, Evgeny Y. Tsymbal, Qi Li Jan 2015

Multiferroic Tunnel Junctions And Ferroelectric Control Of Magnetic State At Interface, Y. W. Yin, M. Raju, W. J. Hu, John D. Burton, Y.-M. Kim, A. Y. Borisevich, S. J. Pennycook, S. M. Yang, T. W. Noh, Alexei Gruverman, X. G. Li, Z. D. Zhang, Evgeny Y. Tsymbal, Qi Li

Alexei Gruverman Publications

As semiconductor devices reach ever smaller dimensions, the challenge of power dissipation and quantum effect place a serious limit on the future device scaling. Recently, a multiferroic tunnel junction (MFTJ) with a ferroelectric barrier sandwiched between two ferromagnetic electrodes has drawn enormous interest due to its potential applications not only in multi-level data storage but also in electric field controlled spintronics and nanoferronics. Here, we present our investigations on four-level resistance states, giant tunneling electroresistance (TER) due to interfacial magnetoelectric coupling, and ferroelectric control of spin polarized tunneling in MFTJs. Coexistence of large tunneling magnetoresistance and TER has been observed …


Mos Current Mode Logic (Mcml) Analysis For Quiet Digital Circuitry And Creation Of A Standard Cell Library For Reducing The Development Time Of Mixed Signal Chips, David Marusiak Jun 2014

Mos Current Mode Logic (Mcml) Analysis For Quiet Digital Circuitry And Creation Of A Standard Cell Library For Reducing The Development Time Of Mixed Signal Chips, David Marusiak

Master's Theses

Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with …


Full Custom Vlsi Design Of On-Line Stability Checkers, Chris Y. Lee Aug 2011

Full Custom Vlsi Design Of On-Line Stability Checkers, Chris Y. Lee

Master's Theses

A stability checker is a clocked storage element, much like a flip-flop, which detects unstable and late signals in the pipeline of a digital system. The On-line stability checker operates concurrently with its associated circuit-under-test (CUT). This thesis describes the full custom very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course at Cal Poly.

A method for concurrent fault testing called On-line Stability Checking …


Programmable Household Led Light Fixture, Jordan Locano Jun 2011

Programmable Household Led Light Fixture, Jordan Locano

Electrical Engineering

This report details the development and construction of a LED light fixture to be used for household lighting. This document details background information, design ideas, project specifications, production, assembly, testing, and conclusions involved with this project. The goals of this project is to design and build a cost-effective replacement for traditional room lighting that can perform better and last longer than traditional methods.


Project 308: Augmented Reality Mario Kart, Joseph Abad, David Allender, Joryl Calizo, Ryan Gaspar, Gavin Lee Jun 2011

Project 308: Augmented Reality Mario Kart, Joseph Abad, David Allender, Joryl Calizo, Ryan Gaspar, Gavin Lee

Computer Engineering

Mario Kart is a popular go-kart racing game developed by Nintendo. The premise of the game is simple: drive a go-kart along a racetrack and reach the finish line before the other players. What makes this game unique, however, is the inclusion of weapons, traps, and other projectiles that a player can use to gain an advantage in the race. We have taken on the challenge of not only recreating this amazing game, but using the art of Augmented Reality to fully immerse the player in the full experience. Rather than play the game on a television screen with a …


High Power Microwave (Hpm) And Ionizing Radiation Effects On Cmos Devices, Nicholas A. Estep Mar 2010

High Power Microwave (Hpm) And Ionizing Radiation Effects On Cmos Devices, Nicholas A. Estep

Theses and Dissertations

Integrated circuits (ICs) are inherently complicated and made worse by increasing transistor quantity and density. This trend potentially enhances concomitant effects of high energy radiation and local or impressed electromagnetic interference (EMI). The reduced margin for signal error may counter any gain in radiation hardness from smaller device dimensions. Isolated EMI and ionizing radiation studies on circuits have been conducted extensively over the past 30 years. However, little focus has been placed on the combined effects. To investigate the effect of combined EMI and ionizing radiation, two complementary metal oxide semiconductor (CMOS) inverter technologies (CD4069 and SN74AUC1G04) were analyzed for …


Hybrid Wafer Scale Microcircuit Integration -- [ 5008213 ], Edward S. Kolesar Jr. Apr 1991

Hybrid Wafer Scale Microcircuit Integration -- [ 5008213 ], Edward S. Kolesar Jr.

AFIT Patents

A wafer scale integration arrangement wherein integrated circuit die of varying size, fabrication processes, and function are commonly mounted in the same host wafer using a filled epoxy material of special characteristics. The mounting epoxy material also serves as a substrate for the die interconnecting conductors in regions adjacent the mounted die. The described assembly also includes a newly available photosensitive polyimide material as a planarization and passivation covering for the die and hose wafer and as a mounting surface for an interconnecting metal conductor array. Multiple levels of interconnection metal. Fabrication processes for the die to host wafer attachment …


Hybrid Wafer Scale Microcircuit Integration -- [ 4989063 ], Edward S. Kolesar Jr. Jan 1991

Hybrid Wafer Scale Microcircuit Integration -- [ 4989063 ], Edward S. Kolesar Jr.

AFIT Patents

A wafer scale integration arrangement wherein integrated circuit die of varying size, fabrication processes, and function are commonly mounted in the same host wafer using a filled epoxy material of special characteristics. The mounting epoxy material also serves as a substrate for the die interconnecting conductors in regions adjacent the mounted die. The described assembly also includes a newly available photosensitive polyimide material as a planarization and passivation covering for the die and host wafer and as a mounting surface for an interconnecting metal conductor array. Multiple levels of interconnection metal. Fabrication processes for the die to host wafer attachment …