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Full-Text Articles in Digital Circuits
A Novel Design-For-Test Flow Using Librelane, Mohamed E. Gaber
A Novel Design-For-Test Flow Using Librelane, Mohamed E. Gaber
Theses and Dissertations
Design-for-testing is a crucial element of application-specific integrated circuit design, yet, in the nascent open-source electronic design automation scene, the solutions for it are sorely limited. Design-for-test-enabled chips allow defects to be caught early on in the manufacturing process, avoiding incurring huge costs if hardware with defective chips is shipped to equipment manufacturers or, worse, end-users. Yet, the current open-source solutions rely on a brute-force utility that does not scale and negatively impacts the design by holding design-for-testing features as co-equal with the design’s regular operation, and a nominally layout-aware solution that does not holistically integrate into a larger flow. …
Flexible Fault-Tolerant Multi-Die Fpga-Based Architectures For Varying Space Environments, Yosof Ali Seif El Din Ali Maklad
Flexible Fault-Tolerant Multi-Die Fpga-Based Architectures For Varying Space Environments, Yosof Ali Seif El Din Ali Maklad
Theses and Dissertations
It is well-known fact that spacecraft’s electronic components operate in an extreme harsh and varying space environments, beside changing orbit or passing through Van Allan Belts during orbital course results of radiation levels change. This thesis focuses on SRAM-based FPGA systems on-board of such spacecrafts, that are commonly utilized in space applications’ critical applications due to their capabilities and flexibility to reconfigure, since these systems are vulnerable to frequent negative impacts of ionizing radiation, thus inducing soft and hard errors leading to disastrous failures that could jeopardize the entire spacecraft. The soft errors’ effects are frequent yet can be mitigated, …
Design And Implementation Of Uvm-Based Verification Framework For Deep Learning Accelerators, Randa Ahmed Hussein Aboudeif
Design And Implementation Of Uvm-Based Verification Framework For Deep Learning Accelerators, Randa Ahmed Hussein Aboudeif
Theses and Dissertations
Recent advancements in deep learning (DL) have made hardware accelerators, known as deep learning accelerators (DLAs), a preferred solution for numerous high-performance computing (HPC) applications, including speech recognition, computer vision, and image classification. DLAs are composed of hundreds of parallel processing engines to speed up computations and can gain access to pre-trained networks from the cloud or through on-chip memory to implement the DNN inference process. DLA verification is becoming an important and challenging phase. The verification process is required to handle the complex DLA design. Moreover, the reliability of DLAs is critical for assessment as they are involved in …