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Digital Circuits Commons

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Portland State University

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Articles 1 - 11 of 11

Full-Text Articles in Digital Circuits

Design And Test Of Asynchronous Systems Using The Link And Joint Model, Ebelechukwu Esimai May 2024

Design And Test Of Asynchronous Systems Using The Link And Joint Model, Ebelechukwu Esimai

Dissertations and Theses

Asynchronous circuits offer numerous advantages, including low energy consumption and good composability and scalability. However, they remain meagerly adopted in the mainstream semiconductor industry. One reason is the limited number of design tools available to help designers navigate design complexity, particularly the myriad of asynchronous implementation styles.

This dissertation focuses on managing the myriad of asynchronous implementation styles by utilizing a circuit-neutral model, called Links and Joints, and embedding this Link-Joint approach into a design flow. Although years of past work have already laid the groundwork, the work in this dissertation identifies and addresses key missing pieces.

First, the …


Facilitating Mixed Self-Timed Circuits, Alexandra R. Hanson May 2020

Facilitating Mixed Self-Timed Circuits, Alexandra R. Hanson

University Honors Theses

Designers constrain the ordering of computation events in self-timed circuits to ensure the correct behavior of the circuits. Different circuit families utilize different constraints that, when families are combined, may be more difficult to guarantee in combination without inserting delay to postpone necessary events. By analyzing established constraints of different circuit families like Click and GasP, we are able to identify the small changes necessary to either 1) avoid constraints entirely; or 2) decrease the likelihood of necessary delay insertion. Because delay insertion can be tricky for novice designers and because the likelihood of its requirement increases when mixing different …


Automating Knife-Edge Method Of Thz Beam Characterization, Christopher Charles Faber May 2018

Automating Knife-Edge Method Of Thz Beam Characterization, Christopher Charles Faber

Maseeh Summer Undergraduate Research Experience

The goal of this project is to create a time and cost-effective solution for THz beam profiling.

The knife edge method of beam characterization is a technique to verify the intensity profile of a beam involving traveling a blade orthogonal to the beam path and measuring transmission in successive steps. We use a vector network analyzer (VNA) to measure S21 transmission from a THz source. Manual implementation of this method was time-consuming and inefficient.

Project hardware includes an Arduino, a motor shield, and a ball screw linear rail with stepper motor actuator. Software was created in LabView and data is …


Laser-Scribed Graphene Micro-Supercapacitors, Kimi D. Owens May 2018

Laser-Scribed Graphene Micro-Supercapacitors, Kimi D. Owens

Maseeh Summer Undergraduate Research Experience

M. F. El-Kady and R. B. Kaner, “Scalable fabrication of high-power graphene micro-supercapacitors for flexible and on-chip energy storage,” Nature Communications, vol. 4, p. 1475, Feb. 2013.

Supercapacitors are electrical components that have higher energy density than regular capacitors. Currently, they are large and bulky which makes it hard to be implemented into smaller electronic devices or on-chip. In Scalable Fabrication of High-power Graphene Micro-supercapacitors for Flexible and On-chip Energy Storage, El-Kady and Kaner developed an inexpensive and reliable method for scaling down supercapacitors to be approximately 7.53 x 5.35 mm. To make the laser-scribed graphene (LSG) micro-supercapacitors, an aqueous …


Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla Jan 2018

Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla

Dissertations and Theses

Many modern computer systems are distributed over space. Well-known examples are the Internet of Things and IBM's TrueNorth for deep learning applications. At the Asynchronous Research Center (ARC) at Portland State University we build distributed hardware systems using self-timed computation and delay-insensitive communication. Where appropriate, self-timed hardware operations can reduce average and peak power, energy, latency, and electromagnetic interference. Alternatively, self-timed operations can increase throughput, tolerance to delay variations, scalability, and manufacturability.

The design of complex hardware systems requires design automation and support for test, debug, and product characterization.

This thesis focuses on design compilation and test support for dataflow …


Formal Modeling And Verification Of Delay-Insensitive Circuits, Hoon Park Dec 2015

Formal Modeling And Verification Of Delay-Insensitive Circuits, Hoon Park

Dissertations and Theses

Einstein's relativity theory tells us that the notion of simultaneity can only be approximated for events distributed over space. As a result, the use of asynchronous techniques is unavoidable in systems larger than a certain physical size. Traditional design techniques that use global clocks face this barrier of scale already within the space of a modern microprocessor chip. The most common response by the chip industry for overcoming this barrier is to use Globally Asynchronous Locally Synchronous (GALS) design techniques. The circuits investigated in this thesis can be viewed as examples of GALS design. To make such designs trustworthy it …


Self-Timed Dram Data Interface, Rajesh Nerkar Sep 2013

Self-Timed Dram Data Interface, Rajesh Nerkar

Dissertations and Theses

A DRAM communicates with a processing unit via two interfaces: a data interface and a command interface. In today's DRAMs, also known as synchronous DRAMs (SDRAMs), both interfaces use a clock to communicate with the processing unit. The clock times the communication between the processing unit and the SDRAM on both the data interface and the command interface.

We propose a self-timed DRAM. The self-timed DRAM introduces more flexibility into the DRAM interface by eliminating the clock. The command interface and the data interface each communicate with the processing unit using a handshake protocol rather than a clock.

This thesis …


Measurement And Modeling Of Passive Surface Mount Devices On Fr4 Substrates, Rahulkumar Sadanand Koche Jan 2012

Measurement And Modeling Of Passive Surface Mount Devices On Fr4 Substrates, Rahulkumar Sadanand Koche

Dissertations and Theses

Passive components like resistors, capacitors and inductors are used in every electronic system. These are the very basic components which affect the system performance at higher frequencies and it is necessary to understand and model the behavior of these components in a very accurate manner. This work focuses on utilizing Printed Circuit Board (PCB) test boards, or fixtures, made of FR4 for characterizing Surface Mount Device (SMD) components. Agilent's Advanced Design System (ADS) microwave circuit simulation software was used for designing the microstrip transmission lines as well as for generating the layout for manufacturing of the PCB. SMD resistors, capacitors …


Implementation And Performance Of Error Correction Codes For High-Speed Computer Networks, Jochen Spengler Sep 1999

Implementation And Performance Of Error Correction Codes For High-Speed Computer Networks, Jochen Spengler

Dissertations and Theses

During the transmission of data there is always a possibility that errors occur and some pieces are modified. If the receiver detects an error it either sends a request for retransmission or, like in networks using Ethernet, it does not send an acknowledgment for the erroneous frame. In this case the sender waits a certain time and retransmits the frame. With the development of faster computer networking hardware and the need for more real-time applications, these errors have become a major concern. Long retransmission latencies and the need for large memories for buffering drive the development of more reliable network …


Investigation Of Solution Space Of Trees And Dags For Realization Of Combinational Logic In At 6000 Series Fpgas, Philip Ho Nov 1993

Investigation Of Solution Space Of Trees And Dags For Realization Of Combinational Logic In At 6000 Series Fpgas, Philip Ho

Dissertations and Theses

Various tree and Directed Acyclic Graph structures have been used for representation and manipulation of switching functions. Among these structures the Binary Decision Diagrams have been the most widely used in logic synthesis. A BDD is a binary tree graph that represents the recursive execution of Shannon's expansion. A FDD is a directed function graph that represents the recursive execution of Reed Muller expansion.

A family of decision diagrams for representation of Boolean function is introduced in this thesis. This family of Kronecker Functional Decision Diagrams (KFDD) includes the Binary Decision Diagrams (BDD) and Functional Decision Diagrams (FDD) as subsets. …


Design Of A Microprocessor Controlled Telecommunication System, George J. Maroutsos Dec 1976

Design Of A Microprocessor Controlled Telecommunication System, George J. Maroutsos

Dissertations and Theses

Recent advancements in Large Scale Integration Technology have made available devices, such as microprocessors, analog gates and "three state" logic, that provide the designer with a wide range of possibilities in the design of telecommunication systems. A microprocessor and analog gates are utilized in this design to demonstrate the feasibility of implementing a flexible Telecommunication System. The microprocessor is programmed to control, through software, the system functions. The feasibility of systems highly adaptable to the needs of individual subscribers is thus demonstrated.