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Articles 25231 - 25260 of 25611

Full-Text Articles in Computer Engineering

Doctor Of Science In Computer Information Systems 1992-1993 Catalog, Nova Southeastern University Jan 1992

Doctor Of Science In Computer Information Systems 1992-1993 Catalog, Nova Southeastern University

College of Engineering and Computing Course Catalogs

No abstract provided.

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Doctoral Program In Computing Technology Specialization In Computer Education, Information Sciences, Training And Learning 1992-1993 Catalog, Nova Southeastern University Jan 1992

Doctoral Program In Computing Technology Specialization In Computer Education, Information Sciences, Training And Learning 1992-1993 Catalog, Nova Southeastern University

College of Engineering and Computing Course Catalogs

No abstract provided.

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Doctor Of Education Specialization In Computing And Information Technology 1992-1993, Nova Southeastern University Jan 1992

Doctor Of Education Specialization In Computing And Information Technology 1992-1993, Nova Southeastern University

College of Engineering and Computing Course Catalogs

No abstract provided.

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Center For Computer And Information Sciences--Doctor Of Science In Computer Information Systems 1992-93, Nova Southeastern University Jan 1992

Center For Computer And Information Sciences--Doctor Of Science In Computer Information Systems 1992-93, Nova Southeastern University

College of Engineering and Computing Course Catalogs

No abstract provided.

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Smimd - A Synchronous Multiple Instruction Multiple Data Computer Architecture, Cathy C. Roberts Jan 1992

Smimd - A Synchronous Multiple Instruction Multiple Data Computer Architecture, Cathy C. Roberts

Computer Science Theses & Dissertations

This thesis assesses the feasibility of utilizing a hypercube interconnect topology to link a heterogeneous processor array in a very long instruction word (VLIW) computer architecture. The research focused upon the selection of a suitable arrangement of processors for the computer and the subsequent demonstration of the architecture's capability to handle simple loop iterations. Previous attempts at VLIW computer design are summarized, the new SMIMD architecture is presented, and suggestions for future research are given. The thesis concludes with results of the initial performance evaluations of the architecture design.

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Logic Programming In Digital Circuit Design, Joseph W. Eicher Dec 1991

Logic Programming In Digital Circuit Design, Joseph W. Eicher

Theses and Dissertations

The design of large, complex digital circuitry requires highly skilled engineers. Much of the time spent by these engineers in the design phase involves tasks that are repetitive, tedious, and slow. If these repetitive tasks are automated, the engineer can spend more time managing the design process and produce a better-quality design in less time. Logic programming can be used to automate design tasks, even those that require a high degree of skill. This thesis investigates several aspects of the digital circuit design process that involve pattern-matching paradigms suitable for encoding in the logic programming language Prolog.

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Frequency Domain Speech Coding, Shane Switzer Dec 1991

Frequency Domain Speech Coding, Shane Switzer

Theses and Dissertations

The major goal of this research was to investigate speech coding techniques in an attempt to achieve high quality speech transmittable at 4800 bits per second. The approach taken to achieve this goal was to code the frequency domain representation of speech. Speech was represented by a sparse set of frequency components. Four frequency selections schemes were implemented, and the resulting frequency coefficients (magnitude and phase) were coded in an efficient manner for transmission. Specific techniques involved in the speech coder included: (1) a recurrent neural architecture to make a periodic/noiselike decision, (2) the use of variable length windows for …

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Formal Verification Of Digital Logic, Stuart L. Labovitz Dec 1991

Formal Verification Of Digital Logic, Stuart L. Labovitz

Theses and Dissertations

The most widely used technique for checking the correctness of digital circuits designs is simulation. As the complexity of digital circuits has continued to grow, however, circuit designers have become unable to perform complete simulations of their integrated circuits. Formal hardware verification provides an alternative approach, performing a series of mathematical proofs in order to show that the construction of the circuit from its submodules will result in the intended overall circuit behavior. Papers by Barrow in 1983 and 1984 discuss a PROLOG-based hierarchical formal circuit verification system named VERIFY. AFIT VERIFY, a simple, experimental reverse-engineered version of Barrow's VERIFY …

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Requirements Analysis For A Hardware, Discrete-Event, Simulation Engine Accelerator, Paul J. Taylor Jr. Dec 1991

Requirements Analysis For A Hardware, Discrete-Event, Simulation Engine Accelerator, Paul J. Taylor Jr.

Theses and Dissertations

An analysis of a general Discrete Event Simulation (DES), executing on the distributed architecture of an eight mode Intel PSC/2 hypercube, was performed. The most time consuming portions of the general DES algorithm were determined to be the functions associated with message passing of required simulation data between processing nodes of the hypercube architecture. A behavioral description, using the IEEE standard VHSIC Hardware Description and Design Language (VHDL), for a general DES hardware accelerator is presented. The behavioral description specifies the operational requirements for a DES coprocessor to augment the hypercube's execution of DES simulations. The DES coprocessor design implements …

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Implementation Of An Object-Oriented Flight Simulator D.C. Electrical System On A Hypercube Architecture, Guy R. Booth Dec 1991

Implementation Of An Object-Oriented Flight Simulator D.C. Electrical System On A Hypercube Architecture, Guy R. Booth

Theses and Dissertations

The Software Engineering Institute developed an Object-Oriented Paradigm for Flight Simulators based on the concept of mapping the behavior of physical objects from an aircraft into an object-oriented software architecture. This mapping is a semi-formal method that maps objects to a hierarchy that has three logical layers: objects, systems, and executives. The paradigm was developed with the idea of implementing the derived simulation design on a parallel or distributed computer architecture, but no explicity design features are provided for implementing the design on a parallel computer. This research addresses the issue of determining what extensions (if any) are required to …

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Parallel Implementation Of Vhdl Simulations On The Intel Ipsc/2 Hypercube, Ronald C. Comeau Dec 1991

Parallel Implementation Of Vhdl Simulations On The Intel Ipsc/2 Hypercube, Ronald C. Comeau

Theses and Dissertations

VHDL models are executed sequentially in current commercial simulators. As chip designs grow larger and more complex, simulations must run faster. One approach to increasing simulation speed is through parallel processors. This research transforms the behavioral and structural models created by Intermetrics' sequential VHDL simulator into models for parallel execution. The models are simulated on an Intel iPSC/2 hypercube with synchronization of the nodes being achieved by utilizing the Chandy Misra paradigm for discrete-event simulations. Three eight-bit adders, the ripple carry, the carry save, and the carry-lookahead, are each run through the parallel simulator. Simulation time is cut in at …

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Electrically Erasable Programmable Integrated Circuits For Replacement Of Obsolete Ttl Logic, Joseph V. Breen Dec 1991

Electrically Erasable Programmable Integrated Circuits For Replacement Of Obsolete Ttl Logic, Joseph V. Breen

Theses and Dissertations

Two microcircuits with electrically erasable programmable logic arrays, which use Fowler-Nordheim (F-N) tunneling for both programming and erasing, were designed to demonstrate the use of programmable logic for obsolete TTL logic replacement. Each microcircuit was fabricated in the Orbit 2-micron double-poly low noise analog CMOS process through MOSIS. Software to generate VHDL structural models from a pin list was developed and the logic of both designs was verified by simulation using the Zycad VHDL simulator. The first microcircuit included a simple programmable logic circuit and test cells that allowed measurement of the programming characteristics of the floating gate transistors. Test …

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Speech Recognition Using Multiple Features And Multiple Recognizers, Thomas F. Rathbun Dec 1991

Speech Recognition Using Multiple Features And Multiple Recognizers, Thomas F. Rathbun

Theses and Dissertations

The purpose of this thesis is to demonstrate the feasibility of using multiple features and multiple recognizers to perform isolated word recognition. This is accomplished by performing multiple independent recognition tests and fusing the results together to get a single recognition result. The speech data is recorded and each word is extracted into a separate file. Eight features are calculated for each word. The features are calculated on 512 sample time slices and produce 16 component vector output. The three recognizers use the eight features to produce a total of 24 error distance lists. These lists are then fused together …

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Resource Integration Using A Large Knowledge Base In Carnot, Christine Collet, Michael N. Huhns, Wei-Min Shen Dec 1991

Resource Integration Using A Large Knowledge Base In Carnot, Christine Collet, Michael N. Huhns, Wei-Min Shen

Faculty Publications

A method for integrating separately developed information resources that overcomes incompatibilities in syntax and semantics and permits the resources to be accessed and modified coherently is described. The method provides logical connectivity among the information resources via a semantic service layer that automates the maintenance of data integrity and provides an approximation of global data integration across systems. This layer is a fundamental part of the Carnot architecture, which provides tools for interoperability across global enterprises.

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The Application Of Statistical Estimation Techniques To Terrain Modeling, Donald P. Duckett Jr. Dec 1991

The Application Of Statistical Estimation Techniques To Terrain Modeling, Donald P. Duckett Jr.

Theses and Dissertations

This thesis researches methods of generating accurate and realistic polygonal terrain models by reducing gridded sampled terrain elevation data such as DMA DTED. The terrain models generated should be applicable for use in flight simulators and other systems. Existing methods of terrain modeling are discussed, and limitations of these systems are presented. The geostatistical estimation technique known as kriging is presented as a method estimating terrain elevations at locations not provided in DMA DTED or other gridded terrain elevation data. Kriging is an optimal interpolation method based on statistical analysis of the data. It also provides a measure of accuracy, …

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A Standardized Software Reliability Measurement Methodology, Joseph J. Stanko Dec 1991

A Standardized Software Reliability Measurement Methodology, Joseph J. Stanko

Theses and Dissertations

Current Air Force practice is to perform Operational Test and Evaluation (OT and E) for each new weapons system. In support of this, Headquarters Air Force Operational Test and Evaluation Center (HQ AFOTEC) is responsible for measuring both suitability and effectiveness. While suitability is adequately measured, the current effort only addresses hardware effectiveness, or at best, system effectiveness. Since tools and metrics are in place for software suitability assessments related to OT and E (for example, software maintainability), there should be some effective way of measuring the operational effectiveness of software. Currently, HQ AFOTEC/LG5 has a data collection tool for …

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Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 7, Number 8, November 1991, College Of Engineering And Computer Science, Wright State University Nov 1991

Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 7, Number 8, November 1991, College Of Engineering And Computer Science, Wright State University

BITs and PCs Newsletter

A ten page newsletter created by the Wright State University College of Engineering and Computer Science that addresses the current affairs of the college.

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Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 7, Number 7, October 1991, College Of Engineering And Computer Science, Wright State University Oct 1991

Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 7, Number 7, October 1991, College Of Engineering And Computer Science, Wright State University

BITs and PCs Newsletter

A ten page newsletter created by the Wright State University College of Engineering and Computer Science that addresses the current affairs of the college.

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Center For Computer And Information Sciences Master Of Science In Computer Computer Science Fall Courses 1991, Nova Southeastern University Oct 1991

Center For Computer And Information Sciences Master Of Science In Computer Computer Science Fall Courses 1991, Nova Southeastern University

College of Engineering and Computing Course Catalogs

No abstract provided.

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Dna Mapping Algorithms: Clone Sequencing, Judith H. Lewis, Will Gillett Oct 1991

Dna Mapping Algorithms: Clone Sequencing, Judith H. Lewis, Will Gillett

All Computer Science and Engineering Research

The DNA restriction mapping problem can be abstracted to the Shortest Common Matching String problem by viewing the restriction fragment lengths as symbols and the clones as bags. The Shortest Common Matching String problem can be decomposed into the Bag Sequencing problem and the Symbol Sequencing problem. All three of these problems have bene shown to be NP-hard. Rhee has proposed a family of greedy algorithms to compute polynomial time approximations to the Bag Sequencing problem, which produced surprisingly good performance results on abstracted data. In the test data generated by Rhee for pragmatic analysis, the symbols in bags represented …

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Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 7, Number 6, September 1991, College Of Engineering And Computer Science, Wright State University Sep 1991

Wright State University College Of Engineering And Computer Science Bits And Pcs Newsletter, Volume 7, Number 6, September 1991, College Of Engineering And Computer Science, Wright State University

BITs and PCs Newsletter

An eight page newsletter created by the Wright State University College of Engineering and Computer Science that addresses the current affairs of the college.

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Converting Binary Thresholds Networks Into Equivalent Symmetric Networks, Gadi Pinkas Jul 1991

Converting Binary Thresholds Networks Into Equivalent Symmetric Networks, Gadi Pinkas

All Computer Science and Engineering Research

We give algorithms to convert any network of binary threshold units (that does not oscillate) into an equivalent network with symmetric weight matrix (like Hopfield networks [Hopfield 82] or Boltzmann machines [Hinton, Sejnowski 88]). The motivation for the transformation is dual: a) to demonstrate the expressive power of symmetric networks; i.e. binary threshold networks (that do not oscillate) are subsumed in the energy minimization paradigm; 2) to use network modules (developed for the spreading activation paradigm for example), within the energy minimization paradigm. Thus optimization [Tank, Hopfield 88] and approximation of hard problems can be combined with efficient modules, that …

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Composition, Superposition, And Encapsulation In The Formal Specification Of Distributed Systems, Kenneth J. Goldman Jul 1991

Composition, Superposition, And Encapsulation In The Formal Specification Of Distributed Systems, Kenneth J. Goldman

All Computer Science and Engineering Research

Composition, superposition, and encapsulation are important techniques that work well together for designing large distributed software systems. Composition is a symmetric operator that allows system components to communicate with each other across module boundaries. Superposition is an asymmetric relationship that allows one system component to observe the state of another. Encapsulation is the ability to define the reason about the behavior of a module in terms of a well-defined boundary between that module and its environment, while hiding the internal operations of that module. In this paper, the I/O automation model of Lynch and Tuttle is extended to permit superposition …

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The Spectrum Simulation System: A Formal Approach To Distributed Algorithm Development Tools, Kenneth J. Goldman Jul 1991

The Spectrum Simulation System: A Formal Approach To Distributed Algorithm Development Tools, Kenneth J. Goldman

All Computer Science and Engineering Research

We present the Spectrum Simulation System, a new research tool for the design and study of distributed algorithms. Based on the formal Input/Output Automation model of Lynch and Tuttle, Spectrum allows one to express distributed algorithms as collections of I/O automata and simulate them directly in terms of the semantics of that model. This permits integration of algorithm specification, design, debugging, analysis, and proof of correctness within a single formal framework that is natural for describing distributed algorithms. Spectrum provides a language for expressing algorithms as I/O automata, a simulator for generating algorithm executions, and a graphics interface for constructing …

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An Access Protection Solution For Heavy Load Unfairness In Dqdb, Lakshmana N. Kumar, Andreas D. Bovopoulos Jul 1991

An Access Protection Solution For Heavy Load Unfairness In Dqdb, Lakshmana N. Kumar, Andreas D. Bovopoulos

All Computer Science and Engineering Research

This paper discusses the unfairness issue arising in a 802.6 DQDB network at high loads-- when the traffic demand to a bus exceeds the capacity of that bus. As per the 802.6 protocol, at heavy loads, the end nodes along a bus experience longer delays than the other nodes. The origin and remedy of this heavy load unfairness is discussed. An access control scheme is proposed as a solution. The comparison of the proposed scheme with 802.6 protocol is presented. The simulation results and performance characteristics are discussed under several types of loads. With symmetric load conditions under the proposed …

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Center For Computer And Information Sciences Master Of Science In Computer Science Summer Courses 1991, Nova Southeastern University Jul 1991

Center For Computer And Information Sciences Master Of Science In Computer Science Summer Courses 1991, Nova Southeastern University

College of Engineering and Computing Course Catalogs

No abstract provided.

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Center For Computer And Information Sciences Master Of Science In Computer Information Systems Summer Courses 1991, Nova Southeastern University Jul 1991

Center For Computer And Information Sciences Master Of Science In Computer Information Systems Summer Courses 1991, Nova Southeastern University

College of Engineering and Computing Course Catalogs

No abstract provided.

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Rapid Display Of Radiographic Images, Jerome R. Cox Jr., Stephen M. Moore, Robert A. Whitman, G. James Blaine, R. Gilbert Jost, L. Magnus Karlsson, Thomas L. Monsees, Gregory L. Hansen, Timothy C. David Jul 1991

Rapid Display Of Radiographic Images, Jerome R. Cox Jr., Stephen M. Moore, Robert A. Whitman, G. James Blaine, R. Gilbert Jost, L. Magnus Karlsson, Thomas L. Monsees, Gregory L. Hansen, Timothy C. David

All Computer Science and Engineering Research

The requirements for the rapid display of radiographic images exceed the capabilities of widely available display, computer and communication technologies. Computed radiography captures data with a resolution of about four megapixels. Large format displays are available that can present over four megapixels. One megapixel displays are practical for use in combination with large format displays and in areas where the viewing task does not require primary diagnosis. This paper describes an electronic radiology system that approximates the highest quality systems, but through the use of several interesting techniques allows the possibility of its widespread installation throughout hospitals. The techniques uses …

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A Prolog System For Converting Vhdl-Based Models To Generalized Extraction System (Ges) Rules, Michael A. Dukes, Frank M. Brown, Joanne E. Degroat Jun 1991

A Prolog System For Converting Vhdl-Based Models To Generalized Extraction System (Ges) Rules, Michael A. Dukes, Frank M. Brown, Joanne E. Degroat

AFIT Documents

With the advent of VHDL accurate documentation of hardware designs is a practical reality. In the past, schematics were typically used for documentation of hardware designs. However, these schematics would usually become obsolete as the hardware design was being constructed. Deviations in the hardware design would sometimes not be reflected in the schematics. For design groups, failure to update schematics could lead to different parts of a hardware design becoming incompatible. A system to ensure compliance of hardware with its VHDL documentation is presented in this paper. The system, vhdl2ges, is meant to help guide the development of hardware by …

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Dna Mapping Algorithms: Abstract Data Types - Concepts And Implementation, Will Gillett, Liz Hanks Jun 1991

Dna Mapping Algorithms: Abstract Data Types - Concepts And Implementation, Will Gillett, Liz Hanks

All Computer Science and Engineering Research

The conceptual aspects of and the implementation details of a set of self-identifying abstract data types (ADT) are described. Each of the ADTs constitutes a specific class of object, upon which a set of well-defined access functions is available. The intent of these ADTs is to supply a paradigm in which a class of object is available for manipulation, but in which the underlying implementation is hidden from the application programmer. Specific ADTs are the described in some detail. The tagged architecture used to achieve the self-identifying property of the ADTs is presented, and a set of required system-backbone access …

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