Computer Engineering Commons^™

Protocol-Aware Enforcement-Point Postcards And Collector Feedback For Ot/Ics Forensic Readiness And Closed-Loop Defense, Haden Fowler

Electrical Engineering and Computer Science Undergraduate Honors Theses

In this work, we apply P4-programmable switches to Operational Technology (OT) and Industrial Control System (ICS) traffic with the objective of turning enforcement decisions into structured forensic evidence that can also support fast, scoped feedback. OT investigations often rely on later correlation of endpoint logs, passive packet traces, and historian data, but those sources can be incomplete, hard to align in time, and missing the decision made at the enforcement point. We address this gap by implementing a P4-based enforcement switch that parses Modbus/TCP write traffic, applies protocol-aware policy checks, and exports protocolaware postcards to a collector. The collector stores …

Automated Circuit Design Algorithm And Implementation For Asynchronous Reset (Ares) Physically Unclonable Functions, Andrew Michael Felder

Graduate Theses and Dissertations

Technology is increasingly interwoven in all aspects of society as it solves new problems, creates new possibilities, and enables new conveniences. With its unceasing evolution, environments handling protected information such as military, finance, and medicine demand ever-evolving threat mitigation. Combating attackers’ abilities to spoof devices, uncover cryptographic keys, and bypass security features is a never-ending task which drives technological advancement to improve existing capabilities and develop entirely new methodologies. In this dissertation work, the hybrid Asynchronous RESet Physically Unclonable Function (ARES PUF) is evaluated at the circuit to determine its merits as a PUF. As part of this evaluation, results …

Design And Evaluation Of A Single-Gate Multi-Threshold Null Convention Logic Architecture For Area Efficiency, John Edward Swaim

Graduate Theses and Dissertations

Asynchronous circuit design paradigms, such as NULL convention logic (NCL) and Multi-Threshold NCL (MTNCL), offer increased energy efficiency over synchronous equivalents and robust pipelines with minimal timing analysis. However, their dependency on dual-rail signal encoding causes significant overhead compared to single-rail equivalents. Previous single-gate and single-rail NCL paradigms have sought to reduce circuit area, but most compromise their quasi-delay-insensitivity and correct-by-construction nature with logic gate and system-level design choices. This thesis presents Single-Gate MTNCL (SG-MTNCL), a register controlled, single-gate, and dual-rail asynchronous architecture to improve the area efficiency of MTNCL without compromising the reliability of previous paradigms. The benefits of …

Faster Than The Speed Of Bram: In-Memory Computing For Next Generation Fpgas On The Edge, Nathaniel Joseph Fredricks

Graduate Theses and Dissertations

Traditional computer systems are hitting the Memory Wall as machine learning applications are bottlenecked by the bandwidth between separate memory and compute units. Current FPGA architectures are able to bypass this bottleneck with block RAMs (BRAMs) that provide on-chip, in-fabric storage. However, their potential as the foundation of computing components is often overlooked; machine learning accelerators implemented on FPGAs face additional delays when transferring data between memory and compute units. These penalties arise from BRAM bandwidth limitations and movement of data through the reconfigurable fabric. To support FPGA-based accelerators on the edge and break the Memory Wall, reconfigurable architectures must …

Asynchronous Polymorphic Logic Locking, Kelby Haulmark

Graduate Theses and Dissertations

This work presents Asynchronous Polymorphic Logic Locking (APLL), a logic locking methodology that integrates polymorphic logic within the Multi-Threshold NULL Convention Logic (MTNCL) paradigm. APLL achieves Boolean satisfiability-attack resilience through a fault-based logic stripping approach followed by logic restoration, while leveraging the analog, dual-functionality of polymorphic gates to impede reverse engineering and removal attacks. In contrast to comparable SAT-resistant logic locking techniques, APLL provides inherent resistance to reverse engineering, reducing the viability of a broad class of attacks that rely on access to the locked netlist. A complete automated design flow is developed, enabling the transformation of combinational circuits into …

Uav-Based Sensor Integration For In-Situ Lake Water Quality Monitoring, Alec R. Campbell

Biological and Agricultural Engineering Undergraduate Honors Theses

Surface water monitoring is often constrained by limited spatial and temporal coverage due to the labor-intensive nature of traditional sampling methods, particularly in environments that are difficult to access or pose safety risks. Unmanned aerial vehicles (UAVs) offer a promising solution by enabling more frequent, spatially distributed, and cost-effective data collection. This study presented the design, development, and field evaluation of a UAV-based system for real-time, in-situ water quality monitoring. The system integrated multiple sensors, including oxidation-reduction potential (ORP), RGB spectrometry, pH, electrical conductivity (EC), dissolved oxygen (DO), and a multispectral spectrometer within a UAV platform.

Field testing was conducted …

Rapid Prototyping Of Low-Cost Sensor Systems Towards A Platform For Upper Limb Posture Estimation, Russell Rathbun

Electrical Engineering and Computer Science Undergraduate Honors Theses

Physical therapy requires patients to perform repeated actions to achieve meaningful results in rehabilitation. This thesis explores production methods and various sensor systems by utilizing rapid prototyping, inertial measurement units (IMUs), and capacitive sensor arrays (CSAs). CSAs can be made from a wide ar- ray of materials and techniques including 3d printing and laser ablation–to rapidly create CSAs that can be custom fit to enable proximity, force, and touch detection. IMU and CSA systems individually are able to track upper limb movements, ges- tures, and positions. This combination of sensors enables accurate upper limb pos- ture estimation of patients. This …

Fpga-Based Overlay Accelerators With Massive Parallel Processing Units To Accelerate Deep Neural Networks, Ehsan Kabir

Graduate Theses and Dissertations

Deep neural networks (DNNs) are widely used in applications such as classification, prediction, and regression. Various DNN architectures, such as convolutional neural networks (CNN), multilayer perceptrons (MLP), long short-term memory (LSTM), recurrent neural networks (RNN), and transformers, have become leading machine learning techniques in these applications. They require significant computational resources and have substantial memory demands due to intensive matrix-matrix multiplications and complex data flows. Hence, efficient utilization of on-chip computational and memory resources is essential to maximize parallelism and minimize latency. Designing an optimal tiling scheme that aligns effectively with the architecture is also necessary. Modern FPGAs are equipped …

Ddos Detection And Mitigation Using Multiple Programmable Switches For Industrial Network Security, Seth Howard

Electrical Engineering and Computer Science Undergraduate Honors Theses

Given the exponential growth in our infrastructure’s reliance on digital systems and large interconnected networks to operate, cybersecurity efforts have not been able to keep up with vulnerabilities attackers can exploit. Specifically, their reliance on industrial network protocols in Supervisory Control and Data Acquisition (SCADA) systems. These protocols are great in terms of the functionality they provide, but are severely lacking in terms of security, leaving the networks vulnerable to cyberattacks. One of the more common protocols, Distributed Network Protocol 3 (DNP3), is particularly vulnerable to Denial-of-Service type attacks. In this work we explore the use of P4-based programmable networks …

Vision-Based Multimodal Frameworks For Human Behavioral Analysis: Applications In Group Activity Understanding And Public Health, Naga Venkata Sai Raviteja Chappa

Graduate Theses and Dissertations

Group Activity Recognition (GAR) has emerged as a crucial problem in computer vision, with wide-ranging applications in sports analysis, video surveillance, and social scene understanding. Unlike traditional action recognition focused on individuals, GAR requires understanding complex spatiotemporal relationships between multiple actors, their interactions, and the broader context in which these activities occur. This complexity introduces unique challenges, including the need for accurate actor localization, modeling of inter-actor dependencies, and understanding of temporal evolution in group behaviors. While recent advances have shown promise, existing approaches often rely heavily on extensive annotations such as ground-truth bounding boxes and action labels, creating significant …

Design And Implementation Of Asynchronous Communication In Multi-Chiplet Systems: A Comparative Study Of Pseudo-Crossbar And Bus Architectures, Matthew Clemence

Graduate Theses and Dissertations

System-on-Chip (SoC) complexity continues to present challenges in global clock distribution and power management. The Globally Asynchronous Locally Synchronous (GALS) approach addresses these issues by enabling asynchronous communication between locally synchronous chiplets. This thesis details the design and implementation of two GALS architectures employing asynchronous handshaking protocols through Multi-Threshold CMOS NULL Convention Logic (MTNCL). The first architecture, a pseudo-crossbar, uses arbiters and multiplexers/demultiplexers (MUX/DEMUX) for prioritized and dynamic communication between chiplets. The second, a bus-based approach, employs D-latches to manage communication sequentially with predetermined interrupts. This research explores the detailed implementation, functional distinctions, scalability, and integration trade-offs inherent to each …

Computer Vision In Soccer: Yolov11 Analytics Engine For Quantifying Game Strategy, Connor S. Maurer

Data Science Undergraduate Honors Theses

Single-shot object detection capabilities significantly reduce computational overhead for real-time computer vision in sports analytics at 60 FPS. YOLO11’s lightweight CNN gives promising accuracy while meeting the low-latency demand of dynamic soccer matches. As data-driven approaches take over the sport of soccer, efficient player tracking systems become critical for informing coach’s strategies. I prototype the ETL (Extract, Transform, Load) process of data collected from a single- shot detection program and evaluate its viability for estimating player fatigue. YOLO11 detects players, the ball, and other characteristics, with the output transformed by homography to estimate the positions in the real world. These …

Design Considerations Of A Gpu, Nicholas M. Devilliers

Electrical Engineering and Computer Science Undergraduate Honors Theses

With the current era of AI technology, the era of single instruction multiple data has become an increasingly viable solution to accelerate training. The problem is that while software to use GPUs and other hardware accelerators, designing GPUs and ASIC devices has become increasingly more expensive and there aren’t great examples of generic GPUs that anyone can use and modify. In this thesis, there are four design considerations that will be discussed and how they affect the result of a generic GPU. The four considerations that were talked about in the thesis are, word width, arithmetic type, number of stages, …

Towards A Configurable Platform For The Design And Evaluation Of P4 Network Systems And Applications, Joseph B. Wilkin

Electrical Engineering and Computer Science Undergraduate Honors Theses

Due to the difficulties of running experiments on production networks, researchers often use platforms such as network emulators and testbeds to test their applications before applying them to the real world. There exists a need for a networking platform of this sort designed specifically for running P4 code and for evaluating P4-based experiments. In this work, we design and develop such a platform for use within our lab group based on the Mininet network emulator and its corresponding graphical user interface, MiniEdit. We have successfully integrated the BMv2 software switch into MiniEdit to allow users to build topologies for running …

Exploration Of Polymorphic Gate-Based Watermarking In Asynchronous Circuits, Stephanie Stock

Graduate Theses and Dissertations

With the increasing demand for new state-of-the-art integrated circuits (ICs), intellectual property (IP) reuse has become more commonplace to both accelerate the design process and lessen the non-recurring engineering costs of a design. Reuseable IP poses significant security risks, not only to the creator of the IP, but also to the consumer purchasing the IP. For an IP vendor, this risk can come from illegal distribution, cloning, or overuse. For the purchaser, counterfeit IPs may be purchased from an unvetted vendor, leading to a substandard design, malfunctions, IP infringement, or security vulnerabilities. Hardware watermarking is a method to protect designers …

Facial Chick Sexing: An Automated Chick Sexing System From Chick Facial Image, Marta Veganzones Rodriguez, Thinh Phan, Arthur F.A. Fernandes, Vivian Breen, Jesus Arango, Michael T. Kidd, Ngan Le

Computer Science and Computer Engineering Faculty Publications and Presentations

Chick sexing, the process of determining the gender of day-old chicks, is a critical task in the poultry industry due to the distinct roles that each gender plays in production. While effective traditional methods achieve high accuracy, color, and wing feather sexing is exclusive to specific breeds, and vent sexing is invasive and requires trained experts. To address these challenges, we propose a novel approach inspired by facial gender classification techniques in humans: facial chick sexing. This new method does not require expert knowledge and aims to reduce training time while enhancing animal welfare by minimizing chick manipulation. We develop …

Universal Shape Replication Via Self-Assembly With Signal-Passing Tiles, Andrew Alseth, Daniel Hader, Matthew J. Patitz

Computer Science and Computer Engineering Faculty Publications and Presentations

In this paper, we investigate shape-assembling power of a tile-based model of self-assembly called the Signal-Passing Tile Assembly Model (STAM). In this model, the glues that bind tiles together can be turned on and off by the binding actions of other glues via “signals”. Specifically, the problem we investigate is “shape replication” wherein, given a set of input assemblies of arbitrary shape, a system must construct an arbitrary number of assemblies with the same shapes and, with the exception of size-bounded junk assemblies that result from the process, no others. We provide the first fully universal shape replication result, namely …

An Empirical Study On The Capability Of Large Language Models In Learning Causality, Joseph Bergin

Electrical Engineering and Computer Science Undergraduate Honors Theses

Large language models (LLMs), including Google’s Gemini, OpenAI’s GPT series, and Meta’s Llama, have driven remarkable advancements in artificial intelligence, achieving complex, human-like performance across many fields. These transformer-based models are skilled at processing and generating many types of textual information, enabling them to perform a variety of tasks. However, an important question remains about their actual capacity to grasp causal relationships—whether these models can truly differentiate between causal directions or simply respond based on learned patterns. This thesis tests this ability by evaluating LLMs on tasks created to test their understanding of causal, anti-causal, and third-party reasoning. We conduct …

Leveraging P4 Programmable-Hardware Switches For In-Network Pmu Packet Recovery, Evan Michael Bonar

Electrical Engineering and Computer Science Undergraduate Honors Theses

Phasor Measurement Unit (PMU) systems are essential for real-time power grid monitor- ing but often face data loss due to network delays, equipment malfunctions, or transmis- sion errors. Traditional centralized recovery solutions introduce significant latency and scalability challenges. This thesis presents a P4-based in-network recovery mechanism that embeds detection and recovery directly into the data plane of P4-enabled programmable switches, significantly reducing recovery time and infrastructure complexity. Using the Aurora 610 switch, the system detects missing packets via sequence number analysis and recovers magnitudes with an efficient register-based algorithm.

Evaluation demonstrates high accuracy and low latency, achieving a mean absolute …

Causal Discovery In Time Series Data Using Deep Learning Techniques, Saima Zahin Farhana Absar

Graduate Theses and Dissertations

Causal structure learning from observational data has been an active field of research over the past decades. In the literature, different algorithms and models have been proposed, such as constrained-based methods and score-based methods including the emerging deep learning-based methods. However, most of the approaches apply to static and non-dynamic data only. In many applications, the data is temporal. For example, monitoring systems, weather surveillance systems, and stock data, to name but a few. Incorporating temporal information is an important extension of the causal discovery field. With the growth of observational data these days, the discovery of causal relationships from …

Quantum Visual Feature Encoding Revisited, Xuan-Bac Nguyen, Hoang-Quan Nguyen, Hugh Churchill, Samee U. Khan, Khoa Luu

Computer Science and Computer Engineering Faculty Publications and Presentations

Although quantum machine learning has been introduced for a while, its applications in computer vision are still limited. This paper, therefore, revisits the quantum visual encoding strategies, the initial step in quantum machine learning. Investigating the root cause, we uncover that the existing quantum encoding design fails to ensure information preservation of the visual features after the encoding process, thus complicating the learning process of the quantum machine learning models. In particular, the problem, termed the “Quantum Information Gap” (QIG), leads to an information gap between classical and corresponding quantum features. We provide theoretical proof and practical examples with visualization …

An Automated Design Flow From Synchronous Rtl To Optimized Layout Using Commercial Eda Tools For Multi-Threshold Null Convention Logic Circuits, Cole Harrington Sherrill

Graduate Theses and Dissertations

This work presents the first automated design flow from synchronous RTL to highly optimized layout for Multi-Threshold NULL Convention Logic (MTNCL) circuits. The developed synthesis flow overcomes many of the drawbacks of existing attempts and leverages the advanced optimization features provided by modern synthesis tools. The remaining timing race conditions native to the MTNCL architecture have been identified and thoroughly explored. Two sets of novel timing constraints were devised: the first responds to these race conditions, yielding highly reliable MTNCL circuits; the second directly targets the critical paths within MTNCL circuits, allowing the designer to optimize the target circuit for …

Bridging Human And Machine Intelligence: Reverse-Engineering Radiologist Intentions For Clinical Trust And Adoption, Akash Awasthi, Ngan Le, Zhigang Deng, Rishi Agrawal, Carol C. Hu, Hien Van Nguyen

Computer Science and Computer Engineering Faculty Publications and Presentations

In the rapidly evolving landscape of medical imaging, the integration of artificial intelligence (AI) with clinical expertise offers unprecedented opportunities to enhance diagnostic precision and accuracy. Yet, the "black box" nature of AI models often limits their integration into clinical practice, where transparency and interpretability are important. This paper presents a novel system leveraging the Large Multimodal Model (LMM) to bridge the gap between AI predictions and the cognitive processes of radiologists. This system consists of two core modules, Temporally Grounded Intention Detection (TGID) and Region Extraction (RE). The TGID module predicts the radiologist's intentions by analyzing eye gaze fixation …

Self-Replication Via Tile Self-Assembly, Andrew Alseth, Daniel Hader, Matthew J. Patitz

Computer Science and Computer Engineering Faculty Publications and Presentations

In this paper we present a model containing modifications to the Signal-passing Tile Assembly Model (STAM), a tile-based self-assembly model whose tiles are capable of activating and deactivating glues based on the binding of other glues. These modifications consist of an extension to 3D, the ability of tiles to form “flexible” bonds that allow bound tiles to rotate relative to each other, and allowing tiles of multiple shapes within the same system. We call this new model the STAM*, and we present a series of constructions within it that are capable of self-replicating behavior. Namely, the input seed assemblies to …

Remodel-Fpga: Reconfigurable Memory-Centric Array Processor Architecture For Deep-Learning Acceleration On Fpga, Md Arafat Kabir

Graduate Theses and Dissertations

Deep-Learning has become a dominant computing paradigm across a broad range of application domains. Different architectures of Deep-Networks like CNN, MLP, and RNN have emerged as the prominent machine-learning approaches for today’s application domains. These architectures are heavily data-dependent, requiring frequent access to memory. As a result, these applications suffer the most from the memory bottleneck of the von Neumann architectures. There is an imminent need for memory-centric architectures for deep-learning and big-data analytic applications that are memory intensive. Modern Field Programmable Gate Arrays (FPGAs) are ideal programmable substrates for creating customized Processor in/near Memory (PIM) accelerators. Modern FPGAs contain …

Learning From Oversampling: A Systematic Exploitation Of Oversampling To Address Data Scarcity Issues In Deep Learning- Based Magnetic Resonance Image Reconstruction, Ibsa Kumara Jalata, Reeshad Khan, Ukash Nakarmi

Computer Science and Computer Engineering Faculty Publications and Presentations

Data acquisitions in Magnetic Resonance Imaging (MRI) are inherently slow due to sequential acquisition protocol. Image reconstruction from under-sampled data is posed as an inverse problem in traditional model-based learning paradigms. Recent data-centric learning frameworks such as deep learning (DL) frameworks are data hungry, and demand a large, labeled training data sets. To address the lack of large training datasets, in MRI reconstructions, researchers approach the problem in two ways: (1) unsupervised method where the model is trained without the presence of fully sampled data. (2) using a method that efficiently use the limited dataset for training purpose. In this …

The Impacts Of Dimensionality, Diffusion, And Directedness On Intrinsic Cross-Model Simulation In Tile-Based Self-Assembly, Daniel Hader, Matthew J. Patitz

Computer Science and Computer Engineering Faculty Publications and Presentations

Motivated by applications in DNA-nanotechnology, theoretical investigations in algorithmic tile-assembly have blossomed into a mature theory. In addition to computational universality, the abstract Tile Assembly Model (aTAM) was shown to be intrinsically universal (FOCS 2012), a strong notion of completeness where a single tile set is capable of simulating the full dynamics of all systems within the model; however, this construction fundamentally required non-deterministic tile attachments. This was confirmed necessary when it was shown that the class of directed aTAM systems, those where all possible sequences of tile attachments result in the same terminal assembly, is not intrinsically universal (FOCS …

Development And Simulation Of A Damage Assessment And Recovery Method For Critical Database Systems, Anthony Pham

Computer Science and Computer Engineering Undergraduate Honors Theses

With how much the world relies on technology and the critical database infrastructure that supports it, the infrastructures require efficient methods to detect and resolve suspicious database transactions, whether malicious or not. This paper focuses on an algorithm that detects and resolves malicious transactions in a database. The process begins with identifying suspicious transactions based on common patterns. When a transaction is flagged, the algorithm segments groups of suspicious transactions in separate log files, separating them for easy access. Within these segments, any dependent transactions that use data affected by the suspicious transactions will be stored there. After the transaction …

Investigating Autonomous Ground Vehicles For Weed Elimination, Abraham Mitchell

Computer Science and Computer Engineering Undergraduate Honors Theses

The management of weeds in crop fields is a continuous agricultural problem. The use of herbicides is the most common solution, but herbicidal resistance decreases effectiveness, and the use of herbicides has been found to have severe adverse effects on human health and the environment. The use of autonomous drone systems for weed elimination is an emerging solution, but challenges in GPS-based localization and navigation can impact the effectiveness of these systems. The goal of this thesis is to evaluate techniques for minimizing localization errors of drones as they attempt to eliminate weeds. A simulation environment was created to model …

Towards Side-Channel Infrastructure For Software Implementations Of Pqc Algorithms, Tristen Teague

Graduate Theses and Dissertations

Post-Quantum Cryptography (PQC) is a new class of asymmetric cryptography algorithms that are supposed to be secure against both classical computers and quantum computers through Shor’s algorithm. Since PQC algorithms are currently being standardized, they will replace older standardized asymmetric algorithms (such as RSA) and will be deployed within the digital infrastructure. Before implementations of the PQC algorithms are placed into the infrastructure, they must undergo evaluation of both performance and security. One such security issue that needs large investigation before deployment are side-channels. Side-channel attacks (SCA) are a method of gathering information from the implementation, such as power-consumption and …