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Integrating Emerging Cryptographic Engineering Research And Security Education, Mehran Mozaffari Kermani, Reza Azarderakhsh 2015 Rochester Institute of Technology

Integrating Emerging Cryptographic Engineering Research And Security Education, Mehran Mozaffari Kermani, Reza Azarderakhsh

Articles

Unlike traditional embedded systems such as secure smart cards, emerging secure deeply embedded systems, e.g., implantable and wearable medical devices, have larger “attack surface”. A security breach in such systems which are embedded deeply in human bodies or objects would be life-threatening, for which adopting traditional solutions might not be practical due to tight constraints of these often-battery-powered systems. Unfortunately, although emerging cryptographic engineering research mechanisms have started solving this critical problem, university education (at both graduate and undergraduate level) lags comparably. One of the pivotal reasons for such a lag is the multi-disciplinary nature of the emerging security bottlenecks …


Technology Mapping, Design For Testability, And Circuit Optimizations For Null Convention Logic Based Architectures, Farhad Alibeygi Parsan 2014 University of Arkansas, Fayetteville

Technology Mapping, Design For Testability, And Circuit Optimizations For Null Convention Logic Based Architectures, Farhad Alibeygi Parsan

Graduate Theses and Dissertations

Delay-insensitive asynchronous circuits have been the target of a renewed research effort because of the advantages they offer over traditional synchronous circuits. Minimal timing analysis, inherent robustness against power-supply, temperature, and process variations, reduced energy consumption, less noise and EMI emission, and easy design reuse are some of the benefits of these circuits. NULL Convention Logic (NCL) is one of the mainstream asynchronous logic design paradigms that has been shown to be a promising method for designing delay-insensitive asynchronous circuits.

This dissertation investigates new areas in NCL design and test and is made of three sections. The first section discusses …


Design Of A High Performance Silicon Carbide Cmos Operational Amplifier, Shaila Amin Bhuyan 2014 University of Arkansas, Fayetteville

Design Of A High Performance Silicon Carbide Cmos Operational Amplifier, Shaila Amin Bhuyan

Graduate Theses and Dissertations

This thesis presents the design, simulation, layout and test results of a silicon carbide (SiC) CMOS two-stage operational amplifier (op amp) with NMOS input stage. The circuit has been designed to provide a stable open-loop voltage gain (60 dB), unity-gain bandwidth (around 5 MHz) and maintain a high CMRR and PSRR within a useful input common mode range over process corners and a wide temperature range (25 °C - 300 °C). Between the two stages a Miller compensation topology is placed to improve the phase margin (around 45°). Due to the comparatively high threshold voltage values of transistors in SiC, …


A Phase-Locked Loop In High-Temperature Silicon Carbide And General Design Methods For Silicon Carbide Integrated Circuits, Paul Shepherd 2014 University of Arkansas, Fayetteville

A Phase-Locked Loop In High-Temperature Silicon Carbide And General Design Methods For Silicon Carbide Integrated Circuits, Paul Shepherd

Graduate Theses and Dissertations

Silicon carbide (SiC) has long been considered for integrated circuits (ICs). It offers several advantages, including wider temperature range, larger critical electric field, and greater radiation immunity with respect to Silicon (Si). At the same time, it suffers from challenges in fabrication consistency and lower transconductance which the designer must overcome. One of the recent SiC IC processes developed is the Raytheon High-Temperature Silicon Carbide (HTSiC) complementary MOSFET process. This process is one of the first to offer P channel MOSFETs and, as a result, a greater variety of circuits can be built in it.

The behavior of SiC MOSFETs …


Design, Simulation And Implementation Of Three-Phase Bidirectional Dc-Dc Dual Active Bridge Converter Using Sic Mosfets, Tariq Aldawsari 2014 University of Arkansas, Fayetteville

Design, Simulation And Implementation Of Three-Phase Bidirectional Dc-Dc Dual Active Bridge Converter Using Sic Mosfets, Tariq Aldawsari

Graduate Theses and Dissertations

The use of SiC-based martials in fabricating power semiconductor devices has shown more interest than conventional silicon-based. Its promising abilities to improve the performance of power electronic systems made it a valuable choice in building high power DC-DC converters. This thesis presents the design and implementation of a three-phase bidirectional DC-DC Dual Active Bridge using SiC MOSFETs. The proposed circuit is first built in Matlab for simulation analysis. Then a phase shift modulation controller is designed in Simulink to test the simulation circuit. The controls are then integrated through an FPGA to test the prototype. Simulations and experimental results are …


Low-Power Analog Processing, Daniel J. White 2014 University of Nebraska-Lincoln

Low-Power Analog Processing, Daniel J. White

Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research

This dissertation presents the analog harmonic transform (AHT) and a first implementation in an integrated circuit. The transform is designed for a regular and simple hardware structure. It provides coefficients relating to an input signal's spectrum. These coefficients also have a simple relationship to the signal's Fouri\'er series coefficients.

The AHT is defined in its ideal form and evaluated for two example signal classification applications. Both military vehicle and bearing fault classification tasks are presented which validate the ability of a neural network to use the AHT coefficients to correctly classify the input signals. Because any real use of the …


Efficient Fpga Architectures For Separable Filters And Logarithmic Multipliers And Automation Of Fish Feature Extraction Using Gabor Filters, Arjun Kumar Joginipelly 2014 LSU New Orleans

Efficient Fpga Architectures For Separable Filters And Logarithmic Multipliers And Automation Of Fish Feature Extraction Using Gabor Filters, Arjun Kumar Joginipelly

LSU New Orleans Theses and Dissertations

Convolution and multiplication operations in the filtering process can be optimized by minimizing the resource utilization using Field Programmable Gate Arrays (FPGA) and separable filter kernels. An FPGA architecture for separable convolution is proposed to achieve reduction of on-chip resource utilization and external memory bandwidth for a given processing rate of the convolution unit.

Multiplication in integer number system can be optimized in terms of resources, operation time and power consumption by converting to logarithmic domain. To achieve this, a method altering the filter weights is proposed and implemented for error reduction. The results obtained depict significant error reduction when …


Idpal – A Partially-Adiabatic Energy-Efficient Logic Family: Theory And Applications To Secure Computing, Mihail T. Cutitaru 2014 Old Dominion University

Idpal – A Partially-Adiabatic Energy-Efficient Logic Family: Theory And Applications To Secure Computing, Mihail T. Cutitaru

Electrical & Computer Engineering Theses & Dissertations

Low-power circuits and issues associated with them have gained a significant amount of attention in recent years due to the boom in portable electronic devices. Historically, low-power operation relied heavily on technology scaling and reduced operating voltage, however this trend has been slowing down recently due to the increased power density on chips. This dissertation introduces a new very-low power partially-adiabatic logic family called Input-Decoupled Partially-Adiabatic Logic (IDPAL) with applications in low-power circuits. Experimental results show that IDPAL reduces energy usage by 79% compared to equivalent CMOS implementations and by 25% when compared to the best adiabatic implementation. Experiments ranging …


Road Profile Sensor: A Detection Method For Active Suspension Systems, Matthew Edel 2014 Seattle Pacific University

Road Profile Sensor: A Detection Method For Active Suspension Systems, Matthew Edel

Honors Projects

Abstract—Active suspension systems adjust the suspension components of an automobile to adapt to bumps or potholes that are encountered in the road as the vehicle is driving. These systems have the potential to improve safety, performance, and ride comfort in automobiles. An integral part of active suspension systems is a device to detect irregularities in the road. Current detection systems that are available lack either in precision, resolution, or speed. A senior design project, Dynamic Automatic Adjusting Suspension (DAAS), at Seattle Pacific University expressed a need for a high-performance road scanner that could be paired with their suspension system. The …


Low Voltage Cmos Sar Adc Design, Ryan Hunt 2014 California Polytechnic State University - San Luis Obispo

Low Voltage Cmos Sar Adc Design, Ryan Hunt

Electrical Engineering

This project centers on the design of a single ended 10-bit successive approximation register analog to digital converter (SAR ADC for short) that easily interfaces to a micro-controller, such as an Arduino. With micro-controller interfacing in mind, the universal data transfer technique of SPI proved an easy way to communicate between the ADC and the micro-controller. The ADC has a range of 1V (highest code value) to 0V (lowest code value) and operates from a single voltage rail value of 1.8V. Typical SPI clock speeds run on the order of 2MHz and with a 10-bit ADC this means a sampling …


Real Time Swim Instructor, Konrad Antoniuk 2014 California Polytechnic State University - San Luis Obispo

Real Time Swim Instructor, Konrad Antoniuk

Electrical Engineering

Both competitive and recreational swimmers want an efficient swim stroke but often lack consistent feedback with technical insight. Competitive swimmers rely on coaches for instruction but have to stop swimming to listen. The Real Time Swim Instructor project provides live feedback to a swimmer so they can feel their stroke correction while they’re swimming. The developing swimmer feels the difference between correct and incorrect form instantaneously.

The project takes on the responsibility of measuring the moving body, accurately determining stroke improvement, functioning under water, and providing recognizable feedback. Additionally, the user can review their swim from data stored in memory. …


Bike Safe: An Automatic Turn Signal System, Betty He Chan, Ricardo Alberto Duran 2014 California Polytechnic State University - San Luis Obispo

Bike Safe: An Automatic Turn Signal System, Betty He Chan, Ricardo Alberto Duran

Electrical Engineering

Bicycles are vehicles that do not require a license to operate and share the road with cars, motorcycles, and other fast moving vehicles. An improper lane change from a bicyclist, such as one without any warning, can lead to great injury or death (especially after sundown). Bike Safe addresses this safety concern by providing a low-cost device that mimics the warning system motorists’ use every day. The system consists of a red brake light and amber turning signal lights that mounts to the rear of the bike, as well as a white headlamp that mounts to the front handlebars. The …


Ad-Hoc Hid: Modular Wireless Human Interface Device, Joseph A. Mazzanti 2014 California Polytechnic State University - San Luis Obispo

Ad-Hoc Hid: Modular Wireless Human Interface Device, Joseph A. Mazzanti

Electrical Engineering

Ad-Hoc HID is a modular, reprogrammable Human Interface Device. This device is intended to function as a keyboard, gamepad, or mouse, according to the user's needs. The final project is intended to be switch agnostic, making the final product adaptable to the user’s needs.


Mos Current Mode Logic (Mcml) Analysis For Quiet Digital Circuitry And Creation Of A Standard Cell Library For Reducing The Development Time Of Mixed Signal Chips, David Marusiak 2014 California Polytechnic State University, San Luis Obispo

Mos Current Mode Logic (Mcml) Analysis For Quiet Digital Circuitry And Creation Of A Standard Cell Library For Reducing The Development Time Of Mixed Signal Chips, David Marusiak

Master's Theses

Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with …


Continuous Hand-Tool Leveling Device, Shaun Villa Koide 2014 California Polytechnic State University - San Luis Obispo

Continuous Hand-Tool Leveling Device, Shaun Villa Koide

Electrical Engineering

To produce clean and precise cuts, hand-tools (e.g. knives and saws) must maintain a consistent angle of orientation during the entire cutting process. The Continuous Hand-Tool Leveling Device mounts on the desired hand-tool and the user inputs the desired angle of the cutting plane. The device utilizes a microcontroller unit (MCU) and accelerometer to implement real-time angle measurement. When using a hand-tool, the device uses an LED that indicates that the hand-tool’s angle deviates from the user-set desired angle, which prevents any potential mistakes from occurring due to user error. The device easily mounts on many common cutting tools. Additionally, …


High-Speed Mobile Networks For Modern Farming And Agricultural Systems, Santos Najar 2014 California Polytechnic State University, San Luis Obispo

High-Speed Mobile Networks For Modern Farming And Agricultural Systems, Santos Najar

Master's Theses

ABSTRACT

High-Speed Mobile Networks for Modern Farming and Agricultural Systems

J.Santos Najar-Ramirez

High-speed mobile networks are necessary for agriculture to inventory individual plant health, maximize yield and minimize the resources applied. More specifically, real-time information on individual plant status is critical to decisions regarding the management of resources reserved and expended. This necessity can be met by the availability of environmental sensors (such as humidity, temperature, and pH) whose data is kept on storage servers connected to static and mobile local area networks. These static and mobile local area networks are connected to cellular, core and satellite networks. For …


Developing A Tool For Generation Of Operational Amplifier Models From Datasheet Parameters, Benjamin Riley Sissons 2014 University of Arkansas, Fayetteville

Developing A Tool For Generation Of Operational Amplifier Models From Datasheet Parameters, Benjamin Riley Sissons

Electrical Engineering Undergraduate Honors Theses

Due to their flexibility and usefulness operational amplifiers are a very common circuit component that has been in use for over fifty years. Because of their widespread use in circuits there has always been a need for simulation models of the op amp. The purpose of this thesis is to demonstrate the design a tool for use with the modeling software ModLyng that takes several parameters from the datasheet of an op amp and generates a model that can be exported to several popular hardware description languages including Verilog-A and Verilog-AMS. The tool was designed as a plugin for ModLyng …


High-Speed Delta-Sigma Data Converters For Next-Generation Wireless Communication, Sakkarapani Balagopal 2014 Boise State University

High-Speed Delta-Sigma Data Converters For Next-Generation Wireless Communication, Sakkarapani Balagopal

Boise State University Theses and Dissertations

In recent years, Continuous-time Delta-Sigma(CT-ΔΣ) analog-to-digital converters (ADCs) have been extensively investigated for their use in wireless receivers to achieve conversion bandwidths greater than 15 MHz and higher resolution of 10 to 14 bits. This dissertation investigates the current state-of-the-art high-speed single-bit and multi-bit Continuous-time Delta-Sigma modulator (CT-ΔΣM) designs and their limitations due to circuit non-idealities in achieving the performance required for next-generation wireless standards. Also, we presented complete architectural and circuit details of a high-speed single-bit and multi-bit CT-ΔΣM operating at a sampling rate of 1.25 GSps and 640 MSps respectively (the highest reported sampling rate in a 0.13 …


Imu Based Tracking And Stabilization System, Aaron Barton 2014 California Polytechnic State University - San Luis Obispo

Imu Based Tracking And Stabilization System, Aaron Barton

Electrical Engineering

The objective of this project is to develop a system that can track a user selected point in space given displacement, vibration and rotation of the device. Stabilization systems are used in various forms over the years, with the military amongst the foremost adopters. More recently, with the increasing popularity of quad-copters for RC hobbyists, and small cameras capable of take high quality video during recreational sports such as skiing or mountain biking, the need has emerged for a cheaper, more accessible version of stabilization systems for use in photography. Additionally, while some devices do exist for hobbyists can take …


Digital Display With Integrated Computing Circuit, Ronald S. Cok, John W. Harmer, Michael E. Miller 2014 Air Force Institute of Technology

Digital Display With Integrated Computing Circuit, Ronald S. Cok, John W. Harmer, Michael E. Miller

AFIT Patents

A digital display device includes a display substrate; an array of pixels formed on the display substrate; an array of driving circuits located on the display substrate, each driving circuit electrically connected to one or more pixels for controlling a pixel current provided to each pixel; an array of computing circuits located on the display substrate, each computing circuit including circuits for signal or image processing and for communicating with neighboring computing circuits; a plurality of electrical conductors formed on the display substrate and connected to each of the driving circuits and digital computing circuits, wherein each computing circuit is …


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