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Project Pradio, Trigg T. La Tour 2017 University of Arkansas, Fayetteville

Project Pradio, Trigg T. La Tour

Computer Science and Computer Engineering Undergraduate Honors Theses

This paper examines the design and manufacturing of a device that allows two or more users to share a wireless audio stream. Effectively, this allows a group of people to listen to the same audio in a synchronized manner. The product was unable to be completed in the allotted time. Regardless, significant progress was made and valuable insight into the circuit board design process was gained.


Design Of A Folded Cascode Operational Amplifier In A 1.2 Micron Silicon-Carbide Cmos Process, Kyle Addington 2017 University of Arkansas, Fayetteville

Design Of A Folded Cascode Operational Amplifier In A 1.2 Micron Silicon-Carbide Cmos Process, Kyle Addington

Electrical Engineering Undergraduate Honors Theses

This thesis covers the design of a Folded Cascode CMOS Operational Amplifier (Op-Amp) in Raytheon’s 1.2-micron Silicon Carbide (SiC) process. The use of silicon-carbide as a material for integrated circuits (ICs) is gaining popularity due to its ability to function at high temperatures outside the range of typical silicon ICs. The goal of this design was to create an operational amplifier suitable for use in a high temperature analog-to-digital converter application. The amplifier has been designed to have a DC gain of 50dB, a phase margin of 50 degrees, and a bandwidth of 2 MHz. The circuit’s application includes input …


Short-Circuit Protection For Low-Voltage Dc Distribution Systems Based On Solid-State Circuit Breakers, Sharthak Munasib 2017 University of Arkansas, Fayetteville

Short-Circuit Protection For Low-Voltage Dc Distribution Systems Based On Solid-State Circuit Breakers, Sharthak Munasib

Graduate Theses and Dissertations

Proper short-circuit protection in dc distribution systems has provided an austere challenge to researchers as the development of commercially-viable equipment providing fast operation, coordination and reliability still continues. The objective of this thesis is to analyze issues associated with short-circuit protection of low-voltage dc (LVDC) distribution systems and propose a short-circuit protection methodology based on solid-state circuit breakers (SSCBs) that provides fault-current limiting (FCL). Simulation results for a simplified notional 1-kVdc distribution system, performed in MATLAB/SIMULINKTM, would be presented to illustrate that SSCB solutions based on reverse-blocking integrated gate-commutated thyristors (RB-IGCT) are feasible for low-voltage dc distribution systems but requires …


Silicon Germanium Bicmos Comparator Designed For Use In An Extreme Environment Analog To Digital Converter, Benjamin Riley Sissons 2017 University of Arkansas, Fayetteville

Silicon Germanium Bicmos Comparator Designed For Use In An Extreme Environment Analog To Digital Converter, Benjamin Riley Sissons

Graduate Theses and Dissertations

This thesis demonstrates the process of creating a radiation hardened and extreme temperature operating comparator from start to finish in the 90 nm SiGe 9HP process node. This includes the entire design flow from examining comparator topologies, to designing the initial comparator circuits, to simulating the comparator over a temperature range of -196°C to 125°C, and finally the testing of the fabricated circuit. To verify the circuit would work at low temperatures, several new device models were created that could be used for simulations at -196°C. In addition to its properties as a standalone comparator, the circuit was also used …


Design And Test Of A Gate Driver With Variable Drive And Self-Test Capability Implemented In A Silicon Carbide Cmos Process, Matthew Barlow 2017 University of Arkansas, Fayetteville

Design And Test Of A Gate Driver With Variable Drive And Self-Test Capability Implemented In A Silicon Carbide Cmos Process, Matthew Barlow

Graduate Theses and Dissertations

Discrete silicon carbide (SiC) power devices have long demonstrated abilities that outpace those of standard silicon (Si) parts. The improved physical characteristics allow for faster switching, lower on-resistance, and temperature performance. The capabilities unleashed by these devices allow for higher efficiency switch-mode converters as well as the advance of power electronics into new high-temperature regimes previously unimaginable with silicon devices. While SiC power devices have reached a relative level of maturity, recent work has pushed the temperature boundaries of control electronics further with silicon carbide integrated circuits.

The primary requirement to ensure rapid switching of power MOSFETs was a gate …


Hexarray: A Novel Self-Reconfigurable Hardware System, Fady Hussein 2017 Boise State University

Hexarray: A Novel Self-Reconfigurable Hardware System, Fady Hussein

Boise State University Theses and Dissertations

Evolvable hardware (EHW) is a powerful autonomous system for adapting and finding solutions within a changing environment. EHW consists of two main components: a reconfigurable hardware core and an evolutionary algorithm. The majority of prior research focuses on improving either the reconfigurable hardware or the evolutionary algorithm in place, but not both. Thus, current implementations suffer from being application oriented and having slow reconfiguration times, low efficiencies, and less routing flexibility. In this work, a novel evolvable hardware platform is proposed that combines a novel reconfigurable hardware core and a novel evolutionary algorithm.

The proposed reconfigurable hardware core is a …


The Effect Of Power Supply Ramp Time On Sram Puf's, Abdelrahman T. Elshafiey Mr. 2017 University of New Mexico - Main Campus

The Effect Of Power Supply Ramp Time On Sram Puf's, Abdelrahman T. Elshafiey Mr.

Electrical and Computer Engineering ETDs

Physical unclonable functions (PUFs) are security primitives that exploit the device mismatches. PUFs are a promising solution for hardware cryptography and key storage. They are used in many security applications including identification, authentication and key generation. SRAM is one of the popular implementations of PUFs. SRAM PUFs offer the advantage, over other PUF constructions, of reusing resources (memories) that already exist in many designs.

In this thesis, for the first time, it is demonstrated that the start-up value of an SRAM PUF could be different depending on the SRAM power supply rising time. An analytical model has been developed to …


Securing Database Users From The Threat Of Sql Injection Attacks, Nisharg Shah 2017 Southern Methodist University

Securing Database Users From The Threat Of Sql Injection Attacks, Nisharg Shah

Electrical Engineering Theses and Dissertations

In the 21st century, there has been a significant rise in dependency on the Internet for daily activities. Web applications such as online banking, web-based emails, social networking, and many more services have become an instant means of communication. These web applications and the data to which they have access are often targeted using malicious attacks, including SQL (Structured Query Language) Injection Attacks (from now on referenced as SQLIAs), which may cause serious damage. In particular, attackers use SQLIAs to target interactive web applications that incorporate database services. In a SQLIA, an attacker can insert malicious SQL code as …


Quadded Gasp: A Fault Tolerant Asynchronous Design, Kristopher S. Scheiblauer 2017 Portland State University

Quadded Gasp: A Fault Tolerant Asynchronous Design, Kristopher S. Scheiblauer

Dissertations and Theses

As device scaling continues, process variability and defect densities are becoming increasingly challenging for circuit designers to contend with. Variability reduces timing margins, making it difficult and time consuming to meet design specifications. Defects can cause degraded performance or incorrect operation resulting in circuit failure. Consequently test times are lengthened and production yields are reduced.

This work assess the combination of two concepts, self-timed asynchronous design and fault tolerance, as a possible solution to both variability and defects. Asynchronous design is not as sensitive to variability as synchronous, while fault tolerance allows continued functional operation in the presence of defects. …


Substrate Integrated E-Plane Horn Antenna And Antenna Array, Zhewei Gu 2017 Minnesota State University, Mankato

Substrate Integrated E-Plane Horn Antenna And Antenna Array, Zhewei Gu

All Graduate Theses, Dissertations, and Other Capstone Projects

In this paper, a novel SMA fed substrate integrated E-plane horn antenna and antenna array are proposed. The substrate integrated E-plane waveguide (SIEW) is not only able to integrate conventional waveguide circuits on printed circuit boards (PCB), but also especially falls into all E-plane circuits which substrate integrated waveguide (SIW) technique fails to. Essential copper strips are sandwiched in the middle by two PCBs to support longitudinal current in the E-plane fed through an SIEW-to-SMA transition. Copper plated holes aligned along the wave propagation direction are drilled through the substrate and copper strips, so that vertical current in the H-plane …


Stringless Guitar, Kue Z. Yang, Anthony Batey, Dominic Mercorelli, Nathaniel Hawk 2017 University of Akron

Stringless Guitar, Kue Z. Yang, Anthony Batey, Dominic Mercorelli, Nathaniel Hawk

Williams Honors College, Honors Research Projects

The aim of this project is to improve the design of a typical guitar by designing a digital stringless guitar. Due to the nonlinearities inherent in a guitar, it would be difficult to reproduce guitar tones by summing harmonic components; therefore, digital samples of guitar tones were taken in order to preserve these unique and wonderfully sounding tones. These digital samples were stored in the guitar and used to produce its tones when played. The digital guitar includes fingerboard position sensors as well as strum sensors for each string. The fingerboard position sensors detect the player’s fingers at discrete positions. …


A Hierarchical Architectural Framework For Securing Unmanned Aerial Systems, Matthew Leccadito 2017 Virginia Commonwealth University

A Hierarchical Architectural Framework For Securing Unmanned Aerial Systems, Matthew Leccadito

Theses and Dissertations

Unmanned Aerial Systems (UAS) are becoming more widely used in the new era of evolving technology; increasing performance while decreasing size, weight, and cost. A UAS equipped with a Flight Control System (FCS) that can be used to fly semi- or fully-autonomous is a prime example of a Cyber Physical and Safety Critical system. Current Cyber-Physical defenses against malicious attacks are structured around security standards for best practices involving the development of protocols and the digital software implementation. Thus far, few attempts have been made to embed security into the architecture of the system considering security as a holistic problem. …


Design Automation For Carbon Nanotube Circuits Considering Performance And Security Optimization, Lin Liu 2017 Michigan Technological University

Design Automation For Carbon Nanotube Circuits Considering Performance And Security Optimization, Lin Liu

Dissertations, Master's Theses and Master's Reports

As prevailing copper interconnect technology advances to its fundamental physical limit, interconnect delay due to ever-increasing wire resistivity has greatly limited the circuit miniaturization. Carbon nanotube (CNT) interconnects have emerged as promising replacement materials for copper interconnects due to their superior conductivity. Buffer insertion for CNT interconnects is capable of improving circuit timing of signal nets with limited buffer deployment. However, due to the imperfection of fabricating long straight CNT, there exist significant unidimensional-spatially correlated variations on the critical CNT geometric parameters such as the diameter and density, which will affect the circuit performance.

This dissertation develops a novel timing …


Data Logging System For A Synthetic Aperture Radar Unit, Nicholas J. Testin, Philip Davis, Ian Dorell, Alexander Gillespie 2016 Kennesaw State University

Data Logging System For A Synthetic Aperture Radar Unit, Nicholas J. Testin, Philip Davis, Ian Dorell, Alexander Gillespie

KSU Journey Honors College Capstones and Theses

A small, existing radar unit lacked the ability to automatically store the data it was receiving, which made its use clunky and cumbersome. A system was constructed to allow an on-board microprocessor to track distance traveled, and automatically store the data output from the radar unit to a portable memory unit for later data processing. Distance traveled is determined using a specially designed mobile cart, which electronically converts the rotation of a wheel into an electrical signal while also providing stability for taking accurate radar measurements. The output data from the radar unit is stored as a properly-formatted sound file …


Accumulator Volume Sensor Final Project Report, Chris Naughton, Kinwei Yu, Michael George 2016 California Polytechnic State University, San Luis Obispo

Accumulator Volume Sensor Final Project Report, Chris Naughton, Kinwei Yu, Michael George

Mechanical Engineering

Accumulator Volume Sensing Team has developed two sensor designs aimed at detecting the position of the piston within a 4024 accumulator. The two designs include the use of a Renishaw LMA10 magnetic encoder and a SpectraSymbol HotPot linear potentiometer. The magnetic encoder solution drastically increases the accuracy of sensing the piston position compared to the current solutions of both a string-pot and linear variable differential transformer while costing slightly less. The linear potentiometer seeks to provide a solution that drastically decreases the cost compared to the present sensing methods. Both designs call for a modification to one half of the …


Si-Based Germanium-Tin (Gesn) Emitters For Short-Wave Infrared Optoelectronics, Seyed Amir Ghetmiri 2016 University of Arkansas, Fayetteville

Si-Based Germanium-Tin (Gesn) Emitters For Short-Wave Infrared Optoelectronics, Seyed Amir Ghetmiri

Graduate Theses and Dissertations

Conventional integrated electronics have reached a physical limit, and their efficiency has been influenced by the generated heat in the high-density electronic packages. Integrated photonic circuits based on the highly developed Si complementary-metal-oxide-semiconductor (CMOS) infrastructure was proposed as a viable solution; however, Si-based emitters are the most challenging component for the monolithic integrated photonic circuits. The indirect bandgap of silicon and germanium is a bottleneck for the further development of photonic and optoelectronic integrated circuits.

The Ge1-xSnx alloy, a group IV material system compatible with Si CMOS technology, was suggested as a desirable material that theoretically exhibits a direct bandgap …


Active Contact Lens - Low Power Backscattering Sensor-To-Antenna Integration Circuitry, Caleb B. Porter 2016 California Polytechnic State University, San Luis Obispo

Active Contact Lens - Low Power Backscattering Sensor-To-Antenna Integration Circuitry, Caleb B. Porter

Electrical Engineering

The Active Contact Lens measures the cornea-scleral radius of the wearer’s eye, which correlates to intraocular pressure (IOP), Glaucoma’s primary indicator. IOP varies throughout the day, and is drastically different from person to person, so constantly measuring it over a period of a few days can provide individualized tracking of the disease’s development and will help doctors develop personalized treatment schedules to treat the disease more precisely.

The Active Contact Lens sensor measures strain, based on the cornea-scleral radius, and reports the results wirelessly, to allow monitoring of an individual’s IOP over time. The lens is powered similarly to a …


Design, Analysis, And Simulation Of A Jitter Reduction Circuit (Jrc) System At 1ghz, Run Bin Yu 2016 California Polytechnic State University, San Luis Obispo

Design, Analysis, And Simulation Of A Jitter Reduction Circuit (Jrc) System At 1ghz, Run Bin Yu

Master's Theses

The clock signal is considered as the “heartbeat” of a digital system yet jitter which is a variation on the arrival time of the clock edge, could undermine the overall performance or even cause failures on the system. Deterministic jitter could be reduced during the designing process however random jitter during operation is somehow less-controllable and unavoidable. Being able to remove jitter on the clock would therefore play a vital role in system performance improvement.

This thesis implements a 1GHz fully feedforward jitter reduction circuit (JRC) which can be used as an on-chip IP core at clock tree terminals to …


Analog Spiking Neuromorphic Circuits And Systems For Brain- And Nanotechnology-Inspired Cognitive Computing, Xinyu Wu 2016 Boise State University

Analog Spiking Neuromorphic Circuits And Systems For Brain- And Nanotechnology-Inspired Cognitive Computing, Xinyu Wu

Boise State University Theses and Dissertations

Human society is now facing grand challenges to satisfy the growing demand for computing power, at the same time, sustain energy consumption. By the end of CMOS technology scaling, innovations are required to tackle the challenges in a radically different way. Inspired by the emerging understanding of the computing occurring in a brain and nanotechnology-enabled biological plausible synaptic plasticity, neuromorphic computing architectures are being investigated. Such a neuromorphic chip that combines CMOS analog spiking neurons and nanoscale resistive random-access memory (RRAM) using as electronics synapses can provide massive neural network parallelism, high density and online learning capability, and hence, paves …


Integrated Circuit Design For Hybrid Optoelectronic Interconnects, Kehan Zhu 2016 Boise State University

Integrated Circuit Design For Hybrid Optoelectronic Interconnects, Kehan Zhu

Boise State University Theses and Dissertations

This dissertation focuses on high-speed circuit design for the integration of hybrid optoelectronic interconnects. It bridges the gap between electronic circuit design and optical device design by seamlessly incorporating the compact Verilog-A model for optical components into the SPICE-like simulation environment, such as the Cadence design tool.

Optical components fabricated in the IME 130nm SOI CMOS process are characterized. Corresponding compact Verilog-A models for Mach-Zehnder modulator (MZM) device are developed. With this approach, electro-optical co-design and hybrid simulation are made possible.

The developed optical models are used for analyzing the system-level specifications of an MZM based optoelectronic transceiver link. Link …


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