VLSI and Circuits, Embedded and Hardware Systems Commons^™

Synchronization Limits Of Chaotic Circuits, C. M. Church, Stephen R. Addison

Journal of the Arkansas Academy of Science

Through system modeling with electronic circuits, two circuits were constructed that exhibit chaos over a wide ranges of initial conditions. The two circuits were one that modeled an algebraically simple “jerk” function and a resistor-inductor-diode (RLD) circuit where the diode was reverse-biased on the positive voltage cycle of the alternating current source. Using simulation data from other experiments, the waveforms, bifurcation plots, and phase space plots of the concrete circuit were verified. Identical circuits were then built containing variable components and coupled to their original, matching circuits. The variable components were used to observe a wide range of conditions to …

Proposed Middleware Solution For Resource-Constrained Distributed Embedded Networks, Jason T. Rexroat

Theses and Dissertations--Electrical and Computer Engineering

The explosion in processing power of embedded systems has enabled distributed embedded networks to perform more complicated tasks. Middleware are sets of encapsulations of common and network/operating system-specific functionality into generic, reusable frameworks to manage such distributed networks. This thesis will survey and categorize popular middleware implementations into three adapted layers: host-infrastructure, distribution, and common services. This thesis will then apply a quantitative approach to grading and proposing a single middleware solution from all layers for two target platforms: CubeSats and autonomous unmanned aerial vehicles (UAVs). CubeSats are 10x10x10cm nanosatellites that are popular university-level space missions, and impose power and …

Humidity Sensor Circuit Using Real Time Operating System (Freertos) Kernel, Bojie Chen

Theses and Dissertations--Electrical and Computer Engineering

A humidity sensor can be used to measure the moisture content of the environment. The physical change of the sensor expresses as the change of electrical property like capacitance, resistance, voltage, current, frequency, etc. In order to process these analog signals digitally, microprocessor is involved in the measurement. This thesis presents design of a circuit to measure low moisture levels. The 16-bit RISC mixed signal microcontroller MSP430F249 from Texas Instruments will be used. The circuit has good performance at extremely low humidity levels.

Meanwhile, a small real time operating system kernel FreeRTOS, a market leading RTOS from Real Time Engineer …

Cmos Smart Camera With Focal Plane Neighborhood-Parallel Image Processing, Joseph A. Schmitz

Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research

A neighbhorhood-based smart camera architecture is designed and implemented in a 0.13 μm CMOS technology. Each 8 × 8 region of pixels contains a small processor with local memory, which are tiled to form a full-resolution camera. Each processor operates in parallel, enabling high-speed image processing suitable for tracking and recognition tasks. The architecture features the programming flexibility of designs us- ing chip-level and row-level processors while preserving the scalability of pixel-parallel processing elements. The neighborhood processors are implemented physically be- tween the pixel photodiodes, creating multiple design challenges that are discussed in detail.

Advisors: Sina Balkir and Michael W. …

Physical Design Of A Smart Camera With Integrated Digital Pixel Sensors Using A 0.13Μm 8-Layer Metal Cmos Process, Mahir K. Gharzai

Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research

The design of cameras has historically kept imagery and computational circuitry isolated in an attempt to maximize image quality by improving pixel pitch and routing density. Although this technique has worked in creating high density arrays of pixels for large resolution imagers, it has never been able to achieve high framerate computational operations.

A radical approach is introduced to solve this dilemma by creating compact, low- power pixel elements with built-in analog-to-digital converters that directly interface with digital logic. These pixels are capable of integrating alongside logic cells and to create an array of pixels inside the processor that can …

A Reconfigurable Digital-To-Analog Converter With Supply Invariant Linearity, Nicholas J. Chiolino

Graduate Theses and Dissertations

A novel reconfigurable digital-to-analog converter (DAC) with supply independent linearity is presented. The process agnostic converter achieves wide supply range operation and re-configurability by being charge based. This converter consists of a 7-bit parallel digital input control core and an analog "summing" core utilizing charging capacitors with an operational transconductance amplifier in a voltage-follower configuration. This topology is highly configurable to allow for optimization across process voltages, step sizes and low power operation. The specification of the DAC is (1) supply independence (2) low power operation (3) operation up to 200 kHz and (4) conversion control through a DAC enable …

Max Operation In Statistical Static Timing Analysis On The Non-Gaussian Variation Sources For Vlsi Circuits, Abu M. Baker

UNLV Theses, Dissertations, Professional Papers, and Capstones

As CMOS technology continues to scale down, process variation introduces significant uncertainty in power and performance to VLSI circuits and significantly affects their reliability. If this uncertainty is not properly handled, it may become the bottleneck of CMOS technology improvement. As a result, deterministic analysis is no longer conservative and may result in either overestimation or underestimation of the circuit delay. As we know that Static-Timing Analysis (STA) is a deterministic way of computing the delay imposed by the circuits design and layout. It is based on a predetermined set of possible events of process variations, also called corners of …

Vehicular Motion Sensor: Developing A Wide-Range Motion Sensing Alarm System, Joshua Isaacson

Senior Honors Theses

Vehicular safety has become a serious concern in recent years. Many drivers have difficulty backing out of parking spaces, especially when large trucks and sport utility vehicles block the peripheral view from smaller vehicles. This can lead to accidents and pedestrian injuries when drivers are unable to see or do not pay careful attention to their surroundings.

Vehicular motion sensor systems can alert drivers of approaching obstacles when attempting to back out of parking spaces with limited visibility. This thesis aims to explain the limitations of current systems and the research conducted by the author to develop a prototype for …

An Ant-Based Sensor Measurement Data Gathering System, Bolun Zhang, Dimitrios Peroulis

The Summer Undergraduate Research Fellowship (SURF) Symposium

Large-scale industries involved with a great amount of sensor measurements in their work are facing many challenges in data collection. Sensors are not on the same network; therefore each measurement has to be managed separately. Gathering all the measurement data to one terminal could be difficult. Once a measurement is obtained, it takes significant amount of time to process the data.The approaches our group takes here is to build a giant ANT wireless network that holds all the sensors’ measurements. To be more specific, every sensor has an ANT chip set up on its side. Each ANT chip is as …

Characterization Of The 5 Ghz Elevator Shaft Channel, Ruoyu Sun, David W. Matolak

Faculty Publications

In this paper we provide channel characterization results for the elevator shaft channel in the 5-GHz band, based upon measurements conducted in four buildings. This channel is of interest for several applications, including WiFi and public safety. Although several authors have provided elevator shaft channel characteristics for lower-frequency bands (255-MHz, 900-MHz, 1.9-GHz), to our knowledge this is the first work that addresses the 5-GHz band. Moreover, prior work has not thoroughly addressed channel characteristics when the elevator car is in motion, whereas here we provide measurement and modeling results for this dynamic condition. Our measurements were of power delay profiles, …

Analysis Of Parameter Tuning On Energy Efficiency In Asynchronous Circuits, Justin Thomas Roark

Graduate Theses and Dissertations

Power and energy consumption are the primary concern of the digital integrated circuit (IC) industry. Asynchronous logic, in the past several years, has increased in popularity due to its low power nature. This thesis analyzes a collection of array multipliers with different parameters to compare two asynchronous design paradigms, NULL Convention Logic (NCL) and Multi-Threshold NULL Convention Logic (MTNCL). Several commercially available pieces of software and custom scripts are used to analyze the asynchronous circuits and their components to provide the energy consumption estimation on various parts of each circuit. The analysis of the software results revealed that MTNCL circuits …

Cad Tool Design For Ncl And Mtncl Asynchronous Circuits, Vijay Mani Pillai

Graduate Theses and Dissertations

This thesis presents an implementation of a method developed to readily convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty compared to the all low-Vt implementation, and has negligible area overhead. The proposed tool utilizes industry-standard CAD tools. This research also presents an Automated Gate-Level Pipelining with Bit-Wise Completion (AGLPBW) method to maximize throughput of delay-insensitive full-word pipelined NCL circuits. These methods have been integrated into the Mentor Graphics and …

Data Driven Feed Forward Adaptive Testing, Chaitrali Santosh Chandorkar

Dissertations and Theses

Test cost is a critical component in the overall cost of the product. Test cost varies in direct proportion with test time. This thesis introduces a data driven feed forward adaptive technique for reducing test time at wafer sort while maintaining the product defect level. Test data from first insertion of wafer is statistically analyzed to make a decision about adaptive test flow at subsequent insertions.

The data driven feed forward technique uses a statistical screen to analyze test data from first probe of wafer and provides recommendations for test elimination at second insertions. At the second insertion dies are …

Poly_Sense: Modular Wireless Sensor Network, Ian Andal, James Shirley, Haleigh Vierra

Electrical Engineering

Poly_Sense provides a platform for developers to use for a wide range of Wireless Sensor Network (WSN) applications. This modular system supports different sensing applications by allowing the developer to easily change between supported sensors through the graphical user interface (GUI). The platform also allows developers to integrate new sensors by writing device drivers which follow the platform’s guidelines and utilize the application programming interface (API). This low-power and cost-effective wireless solution not only provides a basic platform for entry-level developers, but also accommodates larger-scale applications.

Monophonic Pitch Recognition, Nathan Zorndorf, Kristine Carreon

Electrical Engineering

The purpose of this project is to create a system that automatically converts monophonic music into its MIDI equivalent. Automatic pitch recognition allows for numerous commercial applications, including automatic transcription and digital storage of live performances. It is also desirable to be able to take an audio signal as an input and create a MIDI equivalent score because the MIDI information can be used to replace the original audio signal sounds with any sound the user would like. For example, if a piano composition is entered into the system, the resulting MIDI out could be used to trigger guitar samples. …

The Bicycle-Powered Smartphone Charger, Chris Arntzen

Master's Theses

This thesis entails the design and fabrication of a smartphone charger that is powered by a bicycle dynamo hub. In addition to the design and validation of the charger prototype, this thesis involves the testing and characterization of the dynamo hub power source, the design and construction of specialized test equipment, and the design and prototyping of a handlebar-mounted case for the smartphone and charging electronics. With the intention of making the device a commercial product, price, aesthetics, and marketability are of importance to the design. An appropriate description of the charger circuit is a microcontroller-based energy management system, tailored …

Automated Behavioral Modeling Of Switching Voltage Regulators, Michael Leonard

Electrical Engineering Undergraduate Honors Theses

This work describes the development of a software tool that implements a novel method for automatically generating simulation ready behavioral models for switching circuits with an emphasis on power regulators. The work begins by examining the theory of operation of both linear and switching regulators. Then, the capability of two behavioral modeling languages (Verilog-A and PSPICE ABM) are examined in detail. Next, the languages previously discussed are used to develop and test a model of a commercial regulator (Texas Instruments TPS40305). Finally, the prospect of automating the process is discussed

Cad Tools For Synthesis Of Sleep Convention Logic, Parviz Palangpour

Graduate Theses and Dissertations

This dissertation proposes an automated flow for the Sleep Convention Logic (SCL) asynchronous design style. The proposed flow synthesizes synchronous RTL into an SCL netlist. The flow utilizes commercial design tools, while supplementing missing functionality using custom tools. A method for determining the performance bottleneck in an SCL design is proposed. A constraint-driven method to increase the performance of linear SCL pipelines is proposed. Several enhancements to SCL are proposed, including techniques to reduce the number of registers and total sleep capacitance in an SCL design.

Design, Layout, And Testing Of A Silicon Carbide-Based Under Voltage Lock-Out Circuit, Michael Dalan Glover

Graduate Theses and Dissertations

Silicon carbide-based power devices play an increasingly important role in modern power conversion systems. Finding a means to reduce the size and complexity of these systems by even incremental amounts can have a significant impact on cost and reliability. One approach to achieving this goal is the die-level integration of gate driver circuitry with the SiC power devices. Aside from cost reductions, there are significant advantages to the integration of the gate driver circuits with the power devices. By integrating the gate driver circuitry with the power devices, the parasitic inductances traditionally seen between the gate driver and the switching …

Modeling And Architectural Simulations Of The Statistical Static Timing Analysis Of The Variation Sources For Vlsi Circuits, Abu M. Baker

College of Engineering: Graduate Celebration Programs

As CMOS technology scales down, process variation introduces significant uncertainty in power and performance to VLSI circuits and significantly affects their reliability. Although Static-Timing Analysis (STA) remains an excellent tool, current trends in process scaling have imposed significant difficulties to STA. As one of the promising solutions, Statistical static timing analysis (SSTA) has become the frontier research topic in recent years in combating such variation effects. This poster will be focusing on two aspects of SSTA and its applications in VLSI designs: (1) Statistical timing modeling and analysis; and (2) Architectural implementations of the atomic operations (max and add) using …