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Formal Verification Of Divider And Square-Root Arithmetic Circuits Using Computer Algebra Methods, Atif Yasin 2020 University of Massachusetts Amherst

Formal Verification Of Divider And Square-Root Arithmetic Circuits Using Computer Algebra Methods, Atif Yasin

Doctoral Dissertations

A considerable progress has been made in recent years in verification of arithmetic circuits such as multipliers, fused multiply-adders, multiply-accumulate, and other components of arithmetic datapaths, both in integer and finite field domain. However, the verification of hardware dividers and square-root functions have received only a limited attention from the verification community, with a notable exception for theorem provers and other inductive, non-automated systems. Division, square root, and transcendental functions are all tied to the basic Intel architecture and proving correctness of such algorithms is of grave importance. Although belonging to the same iterative-subtract class of architectures, they widely differ …


Compound Effects Of Clock And Voltage Based Power Side-Channel Countermeasures, Jacqueline Lagasse 2020 University of Massachusetts Amherst

Compound Effects Of Clock And Voltage Based Power Side-Channel Countermeasures, Jacqueline Lagasse

Masters Theses

The power side-channel attack, which allows an attacker to derive secret information from power traces, continues to be a major vulnerability in many critical systems. Numerous countermeasures have been proposed since its discovery as a serious vulnerability, including both hardware and software implementations. Each countermeasure has its own drawback, with some of the highly effective countermeasures incurring large overhead in area and power. In addition, many countermeasures are quite invasive to the design process, requiring modification of the design and therefore additional validation and testing to ensure its accuracy. Less invasive countermeasures that do not require directly modifying the system …


Device-Level Predictive Modeling Of Extreme Electromagnetic Interference, NISHCHAY H. SULE 2020 The University of New Mexico

Device-Level Predictive Modeling Of Extreme Electromagnetic Interference, Nishchay H. Sule

Electrical and Computer Engineering ETDs

Radio Frequency (RF) interference is a prominent issue for modern electronic devices. As device size and supply power shrink to meet the on-going demand for compact and complex Integrated Circuits (ICs), their susceptibility to external noise coupling to the input or power supply increases significantly. One such type of noise that acts upon a system to be considered is Extreme Electromagnetic Interference (EEMI). Previous works done to understand and evaluate the impact of EEMI onto a system or sub-system have been conducted on a statistical or empirical analysis level, which has led to complex and convoluted analysis, that requires significant …


Design Of Control System With Feedback Loop For A Pulsatile Pump, Ian Scott Sanders 2020 University of Arkansas, Fayetteville

Design Of Control System With Feedback Loop For A Pulsatile Pump, Ian Scott Sanders

Graduate Theses and Dissertations

This paper describes the design and implementation of a closed-loop proportional, integral, differential (PID) control system for a custom in-house pulsatile pump apparatus for the University of Arkansas Biomedical Department. The control system is designed to control a MOONS’ PL34HD0L8500 hybrid stepper motor using a dual H-bridge motor driver network with four pulse-width modulated (PWM) inputs to drive a pulsatile pump apparatus at motor stepping frequencies up to 2kHz. The speed of the motor is controlled from a pressure profile transmitted from an external source over RS-232 communication that specifies the motor speed, number of datapoints, and an array of …


Polyone Smartphone, Joshua Zalmanowitz, Chi Nguyen, Gerome Cacho, Chris Lim 2020 California Polytechnic State University, San Luis Obispo

Polyone Smartphone, Joshua Zalmanowitz, Chi Nguyen, Gerome Cacho, Chris Lim

Electrical Engineering

The Poly One Smartphone is a student designed smartphone built to explore the implementation of 5G, provide a hardware solution to ensure personal information security and privacy, and provide longer battery life. The key features of this smartphone include but are not limited to a main cpu, some form of network connectivity in the form of Wi-fi or Cellular Data, calling functionality, a rechargeable battery that works with common power connection protocols, and compatibility with popular applications.


Built-In Self-Test (Bist) For Multi-Threshold Null Convention Logic (Mtncl) Circuits, Brett Sparkman 2020 University of Arkansas, Fayetteville

Built-In Self-Test (Bist) For Multi-Threshold Null Convention Logic (Mtncl) Circuits, Brett Sparkman

Graduate Theses and Dissertations

This dissertation proposes a Built-In Self-Test (BIST) hardware implementation for Multi-Threshold NULL Convention Logic (MTNCL) circuits. Two different methods are proposed: an area-optimized topology that requires minimal area overhead, and a test-performance-optimized topology that utilizes parallelism and internal hardware to reduce the overall test time through additional controllability points. Furthermore, an automated software flow is proposed to insert, simulate, and analyze an input MTNCL netlist to obtain a desired fault coverage, if possible, through iterative digital and fault simulations. The proposed automated flow is capable of producing both area-optimized and test-performance-optimized BIST circuits and scripts for digital and fault simulation …


Area Efficient Device Optimization For Esd Protection In High Speed Interface Ics, Dan Thomas Jarard 2020 University of Arkansas, Fayetteville

Area Efficient Device Optimization For Esd Protection In High Speed Interface Ics, Dan Thomas Jarard

Graduate Theses and Dissertations

Electrostatic discharge (ESD) protection is considered as a vital step in integrated circuit (IC) manufacturing process. IC chips are unable to overcome the effects of transient events without adequate discharge protection. Recent trend in the industry has seen the incorporation of system level ESD protection within the IC chip. Incorporating system level on-chip ESD protection often increases cost, degrades circuit performance and consumes layout area which could otherwise be used for improving the circuit performance. These design challenges could be easily overcome if the parasitic components in a circuit were used for ESD protection. Despite the various design challenges, on-chip …


Investigations Of New Fault-Tolerant Methods For Multilevel Inverters, Haider Mhiesan 2020 University of Arkansas, Fayetteville

Investigations Of New Fault-Tolerant Methods For Multilevel Inverters, Haider Mhiesan

Graduate Theses and Dissertations

The demands of power electronics with high power capability have increased in the last decades. These needs have driven the expansion of existing power electronics topologies and developing new power electronics generations. Multilevel inverters (MLI) are one of the most promising power electronics circuits that have been implemented and commercialized in high-voltage direct current (HVDC), motor drives, and battery energy storage systems (BESS). The expanding uses of the MLI have lead to creation of new topologies for different applications. However, one of the disadvantages of using MLIs is their complexity. MLIs consist of a large number of switching devices, which …


Secure Network-On-Chip Against Black Hole And Tampering Attacks, Luka Daoud 2020 Boise State University

Secure Network-On-Chip Against Black Hole And Tampering Attacks, Luka Daoud

Boise State University Theses and Dissertations

The Network-on-Chip (NoC) has become the communication heart of Multiprocessors-System-on-Chip (MPSoC). Therefore, it has been subject to a plethora of security threats to degrade the system performance or steal sensitive information. Due to the globalization of the modern semiconductor industry, many different parties take part in the hardware design of the system. As a result, the NoC could be infected with a malicious circuit, known as a Hardware Trojan (HT), to leave a back door for security breach purposes. HTs are smartly designed to be too small to be uncovered by offline circuit-level testing, so the system requires an online …


Sunseeker Display And Driver Controller, Alec Kwapis 2020 Western Michigan University

Sunseeker Display And Driver Controller, Alec Kwapis

Honors Theses

Digital dashboard displays with critical driver information are found in all modern vehicles. Examples of such information available to the driver include a speedometer, odometer, engine RPM, fuel gauge and more. The current 2016 Sunseeker solar car already has numerous displays that can show critical information to the driver, however, there are several problems that exist. Each display itself is less than two inches in size, the text on the screens is difficult to read, and the measurements have no units. Furthermore, these displays were made by a company that no longer exists, thus preventing the solar car team from …


Heuristic-Based Threat Analysis Of Register-Transfer-Level Hardware Designs, Wesley Layton Ellington 2020 Southern Methodist University

Heuristic-Based Threat Analysis Of Register-Transfer-Level Hardware Designs, Wesley Layton Ellington

Electrical Engineering Theses and Dissertations

The development of globalized semiconductor manufacturing processes and supply chains has lead to an increased interest in hardware security as new types of hardware based attacks, called hardware Trojans, are being observed in industrial and military electronics. To combat this, a technique was developed to help analyze hardware designs at the register-transfer-level (RTL) and locate points of interest within a design that might be vulnerable to attack. This method aims to eventually enable the creation of an end-to-end design hardening solution that analyzes existing designs and suggests countermeasures for potential Trojan attacks. The method presented in this work uses a …


Analysis And Verification Of Arithmetic Circuits Using Computer Algebra Approach, TIANKAI SU 2020 University of Massachusetts Amherst

Analysis And Verification Of Arithmetic Circuits Using Computer Algebra Approach, Tiankai Su

Doctoral Dissertations

Despite a considerable progress in verification of random and control logic, advances in formal verification of arithmetic designs have been lagging. This can be attributed mostly to the difficulty of efficient modeling of arithmetic circuits and data paths without resorting to computationally expensive Boolean methods, such as Binary Decision Diagrams (BDDs) and Boolean Satisfiability (SAT) that require ``bit blasting'', i.e., flattening the design to a bit-level netlist. Similarly, approaches that rely on computer algebra and Satisfiability Modulo Theories (SMT) methods are either too abstract to handle the bit-level complexity of arithmetic designs or require solving computationally expensive decision or satisfiability …


Trustworthy Systems And Protocols For The Internet Of Things, Arman Pouraghily 2020 University of Massachusetts Amherst

Trustworthy Systems And Protocols For The Internet Of Things, Arman Pouraghily

Doctoral Dissertations

Processor-based embedded systems are integrated into many aspects of everyday life such as industrial control, automotive systems, healthcare, the Internet of Things, etc. As Moore’s law progresses, these embedded systems have moved from simple microcontrollers to full-scale embedded computing systems with multiple processor cores and operating systems support. At the same time, the security of these devices has also become a key concern. Our main focus in this work is the security and privacy of the embedded systems used in IoT systems. In the first part of this work, we take a look at the security of embedded systems from …


Design Of Hardware With Quantifiable Security Against Reverse Engineering, Shahrzad Keshavarz 2020 University of Massachusetts Amherst

Design Of Hardware With Quantifiable Security Against Reverse Engineering, Shahrzad Keshavarz

Doctoral Dissertations

Semiconductors are a 412 billion dollar industry and integrated circuits take on important roles in human life, from everyday use in smart-devices to critical applications like healthcare and aviation. Saving today's hardware systems from attackers can be a huge concern considering the budget spent on designing these chips and the sensitive information they may contain. In particular, after fabrication, the chip can be subject to a malicious reverse engineer that tries to invasively figure out the function of the chip or other sensitive data. Subsequent to an attack, a system can be subject to cloning, counterfeiting, or IP theft. This …


Efficient Hardware Primitives For Securing Lightweight Systems, Siva Nishok Dhanuskodi 2020 University of Massachusetts Amherst

Efficient Hardware Primitives For Securing Lightweight Systems, Siva Nishok Dhanuskodi

Doctoral Dissertations

In the era of IoT and ubiquitous computing, the collection and communication of sensitive data is increasingly being handled by lightweight Integrated Circuits. Efficient hardware implementations of crytographic primitives for resource constrained applications have become critical, especially block ciphers which perform fundamental operations such as encryption, decryption, and even hashing. We study the efficiency of block ciphers under different implementation styles. For low latency applications that use unrolled block cipher implementations, we design a glitch filter to reduce energy consumption. For lightweight applications, we design a novel architecture for the widely used AES cipher. The design eliminates inefficiencies in data …


Resource Efficient Design Of Quantum Circuits For Cryptanalysis And Scientific Computing Applications, Edgard Munoz-Coreas 2020 University of Kentucky

Resource Efficient Design Of Quantum Circuits For Cryptanalysis And Scientific Computing Applications, Edgard Munoz-Coreas

Theses and Dissertations--Electrical and Computer Engineering

Quantum computers offer the potential to extend our abilities to tackle computational problems in fields such as number theory, encryption, search and scientific computation. Up to a superpolynomial speedup has been reported for quantum algorithms in these areas. Motivated by the promise of faster computations, the development of quantum machines has caught the attention of both academics and industry researchers. Quantum machines are now at sizes where implementations of quantum algorithms or their components are now becoming possible. In order to implement quantum algorithms on quantum machines, resource efficient circuits and functional blocks must be designed. In this work, we …


Systematic Model-Based Design Assurance And Property-Based Fault Injection For Safety Critical Digital Systems, Athira Varma Jayakumar 2020 Virginia Commonwealth University

Systematic Model-Based Design Assurance And Property-Based Fault Injection For Safety Critical Digital Systems, Athira Varma Jayakumar

Theses and Dissertations

With advances in sensing, wireless communications, computing, control, and automation technologies, we are witnessing the rapid uptake of Cyber-Physical Systems across many applications including connected vehicles, healthcare, energy, manufacturing, smart homes etc. Many of these applications are safety-critical in nature and they depend on the correct and safe execution of software and hardware that are intrinsically subject to faults. These faults can be design faults (Software Faults, Specification faults, etc.) or physically occurring faults (hardware failures, Single-event-upsets, etc.). Both types of faults must be addressed during the design and development of these critical systems. Several safety-critical industries have widely adopted …


Sensor Fusion And Non-Linear Mpc Controller Development Studies For Intelligent Autonomous Vehicular Systems, Ahammad Basha Dudekula 2020 Michigan Technological University

Sensor Fusion And Non-Linear Mpc Controller Development Studies For Intelligent Autonomous Vehicular Systems, Ahammad Basha Dudekula

Dissertations, Master's Theses and Master's Reports

The demand for safety and fuel efficiency on ground vehicles and advancement in embedded systems created the opportunity to develop Autonomous controller. The present thesis work is three fold and it encompasses all elements that are required to prototype the autonomous intelligent system including simulation, state handling and real time implementation. The Autonomous vehicle operation is mainly dependent upon accurate state estimation and thus a major concern of implementing the autonomous navigation is obtaining robust and accurate data from sensors. This is especially true, in case of Inertial Measurement Unit (IMU) sensor data. The IMU consists of a 3-axis gyro, …


E-Z Door: Hands-Free Front Door Unlocking And Opening Mechanism, Caleb Dyck 2020 The University of Akron

E-Z Door: Hands-Free Front Door Unlocking And Opening Mechanism, Caleb Dyck

Williams Honors College, Honors Research Projects

The E-Z Door Senior Design project is a project with the aim of designing a hands-free system to unlock and open the front door of a home using two-factor security authentication.

The main goal of this project is to help people who may have physical limitations to be able to take advantage of recent technology, making it significantly easier to enter their homes.


Bibliometric Review Of Noc Router Optimization, Priti Shahane, Jayshree Pande 2020 University of Nebraska - Lincoln

Bibliometric Review Of Noc Router Optimization, Priti Shahane, Jayshree Pande

Library Philosophy and Practice (e-journal)

Network on chip (NoC) has been proposed as an emerging solution for scalability and performance demands of next generation System on Chip (SoC). NoC provides a solution for the bus based interconnection issue of SoC, where large numbers of Intellectual Property modules (IP) are integrated on a single chip for better performance. The NoC has several advantages such as scalability, low latency and low power consumption, high bandwidth over dedicated wires and buses. Interconnections between multiple chip cores have a significant impact on the communication and performance of the chip design in terms of region, latency, throughput and power. In …


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