Electronic Devices and Semiconductor Manufacturing Commons^™

Simulating Nanowires And Ultra-Thin Body Transistors Using Nemo5 On Nanohub.Org, Liang Yuan Dai, James E. Fonseca, Chu Yuan Chen, Gerhard Klimeck

The Summer Undergraduate Research Fellowship (SURF) Symposium

During the past twenty years, the most important aspects of semiconductor electronics have advanced into the nanometer range, resulting in exponential increases of microprocessor computing performance. As the size of electrical components continues to shrink, the cost of experimental research and industrial fabrication in this field has increased dramatically. Thus, the development of accurate nanoscale model simulations becomes necessary as a measure to decrease the high financial expenses of advancing semiconductor technology. This simulator supports atomistic modeling in order to provide an accurate description of the nanoscale devices, as current electrical components operate in the quantum regime and are affected …

Design, Fabrication, And Measurement Of A Multiple-Input Multiple-Output (Mimo) Antenna For Mobile Communication, Christopher Charles Arnold

Graduate Theses and Dissertations

This thesis presents the design, fabrication and characterization of a multiband uniplanar MIMO antenna for hand-held mobile communication devices on LTE, WLAN, and WMAN networks. The antenna design methodology combined a variety of broadbanding techniques that resulted in a single-layer hybrid monopole antenna coupled to a meander line element and parasitic structures. The 115×55×1.54 mm antenna was fabricated using an FR4 composite material and occupies only a fractional volume within the size of an average cellular phone allowing ample space to integrate with existing hardware. Characterization of the MIMO antenna included input impedance, scattering parameters and radiation pattern cross sections …

Common Mode Voltage Mitigation Strategies Using Pwm In Neutral-Point-Clamped Multilevel Inverters, Chad Alexander Somogyi

Master's Theses (2009 -)

Over the last several decades, there has been consistent growth in the research and development of multilevel voltage-source inverter-based adjustable speed motor drives (ASDs) as a result of low cost, high reliability power semiconductors. The three-level neutral-point-clamped (NPC) ASD is a popular multilevel inverter used in low and medium voltage applications because of its ability to produce lower levels of total harmonic distortion (THD) and withstand higher voltages while preserving the rated output power compared to two-level ASDs. As with other voltage-source inverters, three-level NPC ASDs produce common-mode voltage (CMV) that can cause motor shaft voltages, bearing currents, and excess …

Chipper: Capacitive Bed Occupancy Sensing For An Intelligent Alarm Clock, David Levi

Electrical Engineering

What if your alarm clock knew when you got out—and stayed out—of bed? Current alarm clocks happily let you go back to bed after turning them off. In this project, I build an alarm which only stops ringing when you get out bed, and starts ringing again if you lie back in bed.

This project uses capacitance to detect bed occupancy. A person on or near the bed creates a tiny, picofarads level increase in capacitance, as seen by a sensor placed under the mattress. A microprocessor interprets this signal, and also drives an audio alarm. Shielding of the sensor …

Phase Locked Loop Integrated Circuit, Scott Buchanan, Jonathan Bonello

Electrical Engineering

No abstract provided.

Characterization Of Two Vernier-Tuned Distributed Bragg Reflector (Vt-Dbr) Lasers Used In Swept Source Optical Coherence Tomography (Ss-Oct), Greg M. Bergdoll

Master's Theses

Insight Photonic Solutions Inc. has continued to develop their patented VT-DBR laser design; these wavelength tunable lasers promise marked image-quality and acquisition time improvements in SS-OCT applications.

To be well suited for SS-OCT, tunable lasers must be capable of producing a highly linear wavelength sweep across a tuning range well-matched to the medium being imaged; many different tunable lasers used in SS-OCT are compared to identify the optimal solution.

This work electrically and spectrally characterizes two completely new all-semiconductor VT-DBR designs to compare, as well. The Neptune VT-DBR, an O-band laser, operates around the 1310 nm range and is a …

Design And Fabrication Techniques Of Devices For Embedded Power Active Contact Lens, Errol Heradio Leon

Master's Theses

This thesis designed and fabricated various devices that were interfaced to an IC for an active contact lens that notifies the user of an event by detection of an external wireless signal. The contact lens consisted of an embedded antenna providing communication with a 2.4GHz system, as well as inductive charging at an operating frequency of 13.56 MHz. The lens utilized a CBC005 5µAh thin film battery by Cymbet and a manufactured graphene super capacitor as a power source. The custom integrated circuit (IC) was designed using the On Semiconductor CMOS C5 0.6 µm process to manage …

Design Of Integrated Current Reference Circuits For A 180-Nanometer Bicmos Silicon Process, Timothy Max Megee

Electrical Engineering Undergraduate Honors Theses

The goal of this thesis is to provide design analysis, simulation results, and physical layout structure for three current references that are to be physically fabricated in a 180- nanometer BICMOS silicon process. The report briefly discusses the need for voltage and current references in analog circuit applications, before zooming in to examine three topologies being tailored to the needs of an integrated solar micro-inverter system. These topologies are: proportional to absolute temperature (PTAT), complementary to absolute temperature (CTAT), and constant across temperature (Constant) bias circuits. First, each topology is designed schematically to meet the needs of the micro-inverter system. …

Single-Walled Carbon Nanotube Arrays For High Frequency Applications, Asmaa Elkadi

Graduate Theses and Dissertations

This dissertation presents a thorough analysis of semiconducting Single-Walled Carbon Nanotube-based devices, followed by a test structure fabrication and measurements.

The analysis starts by developing an individual nanotube model, which is then generalized for many nanotubes and adding the parasitic elements. The parasitic elements appear when forming the device electrodes degrade the overall performance.

The continuum model of an individual nanotube is developed. A unique potential function is presented to effectively describe the electron distribution in the carbon nanotube subsequently facilitating solving Schrödinger's equation to obtain the energy levels, and to generalize the model for many nanotubes.

It is shown …

Hand Pattern Recognition Using Smart Band, Theerth Raj Munusamy

Graduate Theses and Dissertations

The Importance of gesture recognition has widely spread around the world. Many research strategies have been proposed to study and recognize gestures, especially facial and hand gestures. Distinguishing and recognizing hand gestures is vital in hotspot fields such as bionic parts, powered exoskeleton, diagnosing muscle disorders, etc. Recognizing such gesture patterns can also create a stress-free and fancy user interface for mobile phones, gaming consoles and other such devices.

The objective is to design a simple yet efficient wearable hand gesture recognizing system. This thesis also shows that by taking both EMG and accelerometer data into account, can improve the …

Characterization Of Silicon Phosphorus Alloy For Device Applications, Larry C. Cousar

Graduate Theses and Dissertations

A new material of highly-phosphorus doped silicon for device applications was characterized and analyzed for new material properties. Devices such as NMOS transistors and other CMOS compatible devices may benefit from new materials that reduce external resistances and increase drive currents.

Material characterization requires numerous techniques and technologies to determine electrical, optical, and physical characteristics. For this work, Hall measurement, X-ray Diffraction, Raman Spectroscopy, Photoluminescence Characterization, and Spectroscopic Ellipsometry were used to better understand this new material. The results may lead to new models for silicon phosphorus alloys.

Environmental Reliability Of Thin Film Sealing On Thick Film Ltcc, Charles R. Bourland

Graduate Theses and Dissertations

As electronic components and systems become more intricate and expand into new realms of use case scenarios, new materials systems must be explored. With new systems comes the balancing acts of cost and reliability. Presented here is a thesis that explores a new hybrid-electronics packaging system using low temperature co-fired ceramics, referred to as LTCC. An LTCC system was designed to explore the environmental reliability of numerous thick film LTCC features and parameters. A key element was to explore how a thin film metallization stack up used to cap or seal underlying thick film structures would decrease environmental susceptibility while …

Organic Solar Cell At Room Temperature, Deedra Zeeh

Thinking Matters Symposium Archive

Organic electronics have become of great interest in the field of materials science research due to the potential for flexible electronic devices and low cost technologies. Difficulties emerge with creating a stable and efficient device, while still maintaining a simple and room-temperature production process.

With the advent of relatively stable organic semiconductors and graphene (or other nanotube or fullerene morphologies), it is possible to fabricate photovoltaic cells at near room temperature. By stacking these cells, devices of reasonable efficiencies >5% can be fabricated. Devices were created with a perylene-P3HT photoactive layer, polyaniline buffer layer, and PEDOT:PSS as the hole transport …

Subtractive Plasma-Assisted-Etch Process For Developing High Performance Nanocrystalline Zinc-Oxide Thin-Film-Transistors, Thomas M. Donigan

Theses and Dissertations

Thin-Film-Transistors (TFTs) employing undoped zinc-oxide (ZnO) thin-films are currently being investigated by the Air Force for microwave switching applications. Since the on-resistance (R(on)) of the device scales with channel length (LC), ZnO TFT optimization should be focused on reducing LC, therefore minimizing the associated insertion losses. In this research, deep sub-micron scaling of ZnO TFTs was undertaken using a subtractive reactive-ion-etch (RIE) process. Under optimum processing conditions, ZnO TFTs with LC as small as 155 nm were successfully demonstrated. The active ZnO channels of the TFTs were patterned by selective SF6-RIE of a tungsten ohmic film through electron-beam defined openings …

Low Clutter Method For Bistatic Rcs Measurements, Peter J. Collins

AFIT Patents

A bistatic radar measurement system is provided having a radar source configured to produce a radio frequency signal. A transmitting antenna is configured to transmit the radio frequency signal toward a target. A receiving antenna is configured to receive a reflected radio frequency signal from the target. A support system is configured to support the receiving antenna. The support system includes a plurality of low scattering dielectric strings configured to orient the receiving antenna.

Electronic Desalting For Controlling The Ionic Environment In Droplet-Based Biosensing Platforms, Vikhram Vilasur Swaminathan, Piyush Dak, Bobby Reddy Jr, Eric Salm, Carlos Duarte-Guevara, Yu Zhong, Andrew Fischer, Yi-Shao Liu, Rashid Bashir

Birck and NCN Publications

The ability to control the ionic environment in saline waters and aqueous electrolytes is useful for desalination as well as electronic biosensing. We demonstrate a method of electronic desalting at micro-scale through on-chip micro electrodes. We show that, while desalting is limited in bulk solutions with unlimited availability of salts, significant desalting of ≥1 mM solutions can be achieved in sub-nanoliter volume droplets with diameters of ∼250 μm. Within these droplets, by using platinum-black microelectrodes and electrochemical surface treatments, we can enhance the electrode surface area to achieve >99% and 41% salt removal in 1 mM and 10 mM salt …

Investigation Of Gate Dielectric Materials And Dielectric/Silicon Interfaces For Metal Oxide Semiconductor Devices, Lei Han

Theses and Dissertations--Electrical and Computer Engineering

The progress of the silicon-based complementary-metal-oxide-semiconductor (CMOS) technology is mainly contributed to the scaling of the individual component. After decades of development, the scaling trend is approaching to its limitation, and there is urgent needs for the innovations of the materials and structures of the MOS devices, in order to postpone the end of the scaling. Atomic layer deposition (ALD) provides precise control of the deposited thin film at the atomic scale, and has wide application not only in the MOS technology, but also in other nanostructures. In this dissertation, I study rapid thermal processing (RTP) treatment of thermally grown …

Strain Controlled Ultra-Low-Energy Magnetic Tunneling Junction, Hasnain Ahmad, Supriyo Bandyopadhyay, Jayasimha Atulasimha

Graduate Research Posters

We are experimenting on designing a voltage-controlled ultra-low-energy Magnetic Tunneling Junction (MTJ) device using a soft single domain magnetostrictive layer (i.e. Galfenol: Fe_1-xGa_x , x = 20 At%) coupled to a piezoelectric layer (i.e. PMN-PT). Special metal pads have been designed using photolithography to generate stress in the PMN-PT layer by applying electric field. The patterns of different shape anisotropic nano-magnets are designed using e-beam lithography and we have successfully fabricate FeGa nanomagnets with only 12 to 13 nanometer thickness by sputter deposition. These nanomagnets have been characterized by magnetic force microscopy for observing their switching capabilities. …

Bifacial Si Heterojunction-Perovskite Organic-Inorganic Tandem To Produce Highly Efficient (Η T * ~ 33%) Solar Cell, Reza Asadpour, Raghu Vamsi Krishna Chavali, Mohammad Ryyan Khan, Muhammad Ashraful Alam

Department of Electrical and Computer Engineering Faculty Publications

As single junction photovoltaic (PV) technologies both Si heterojunction (HIT) and perovskite based solar cells promise high efficiencies at low cost. Intuitively a traditional tandem cell design with these cells connected in series is expected to improve the efficiency further. Using a self-consistent numerical modeling of optical and transport characteristics however we find that a traditional series connected tandem design suffers from low JSC due to band-gap mismatch and current matching constraints. Specifically a traditional tandem cell with state-of-the-art HIT ( η=24% ) and perovskite ( η=20% ) sub-cells provides only a modest tandem efficiency of η_T~ 25%. …

Trapping Light With Nanostructures For Sensors, Kareem Garriga

Summer Community of Scholars Posters (RCEU and HCR Combined Programs)

No abstract provided.