A Graduate Education In Software Management And The Software Business For Mid-Career Professionals,
2010
Carnegie Mellon University
A Graduate Education In Software Management And The Software Business For Mid-Career Professionals, Ray Bareiss, Gladys Mercier
Ray Bareiss
Given the unique nature of the software business, the faculty of Carnegie Mellon University’s Silicon Valley campus concluded that mid-career software professionals would be better served by a tailored master’s degree focusing on software management and more broadly on the business of software than by a typical MBA. Our software management master’s program integrates business, technical, and soft skills to prepare our students for technical leadership in their current companies or in entrepreneurial ventures. Our initial program built on the strengths of Carnegie Mellon’s world-class software engineering education. We targeted students working in large companies, engaged in large-scale enterprise software …
Coaching Via Cognitive Apprenticeship,
2010
Carnegie Mellon University
Coaching Via Cognitive Apprenticeship, Ray Bareiss, Martin Radley
Ray Bareiss
At Carnegie Mellon’s Silicon Valley campus we employ a learn by- doing educational approach in which nearly all student learning, and thus instruction, is in the context of realistic, team based projects. Consequently, we have adopted coaching as our predominant teaching model. In this paper we reflect on our experience with the nature of teaching by coaching using a framework derived from Cognitive Apprenticeship, and explain how we employ the techniques it suggests in our teaching. We also discuss a range of instructional tensions that arise in teaching by coaching and present a survey of student attitudes regarding the effectiveness …
On The Radiation-Induced Soft Error Performance Of Hardened Sequential Elements In Advanced Bulk Cmos Technologies,
2010
SelectedWorks
On The Radiation-Induced Soft Error Performance Of Hardened Sequential Elements In Advanced Bulk Cmos Technologies, Norbert Seifert, Vinod Ambrose, B Gill, Q Shi, R Allmon, Charles H. Recchia, S Mukherjee, N Nassif, J Krause, J Pickholtz, A Balasubramanian
Charles H Recchia
No abstract provided.
Approaches To Multiprocessor Error Recovery Using An On-Chip Interconnect Subsystem,
2010
University of Massachusetts Amherst
Approaches To Multiprocessor Error Recovery Using An On-Chip Interconnect Subsystem, Ramakrishna P. Vadlamani
Masters Theses 1911 - February 2014
For future multicores, a dedicated interconnect subsystem for on-chip monitors was found to be highly beneficial in terms of scalability, performance and area. In this thesis, such a monitor network (MNoC) is used for multicores to support selective error identification and recovery and maintain target chip reliability in the context of dynamic voltage and frequency scaling (DVFS). A selective shared memory multiprocessor recovery is performed using MNoC in which, when an error is detected, only the group of processors sharing an application with the affected processors are recovered. Although the use of DVFS in contemporary multicores provides significant protection from …
Scalable, Memory-Intensive Scientific Computing On Field Programmable Gate Arrays,
2010
University of Massachusetts Amherst
Scalable, Memory-Intensive Scientific Computing On Field Programmable Gate Arrays, Salma Mirza
Masters Theses 1911 - February 2014
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for many scientific computing problems. This is due to the memory bottleneck that is encountered with large arrays that must be stored in dynamic RAM. A system of FPGAs, with a large enough memory bandwidth, and clocked at only hundreds of MHz can outperform a CPU clocked at GHz in terms of floating point performance. An FPGA core designed for a target performance that does not unnecessarily exceed the memory imposed bottleneck can then be distributed, along …
Design Techniques To Improve Time Dependent Dielectric Breakdown Based Failure For Cmos Circuits,
2010
California Polytechnic State University, San Luis Obispo
Design Techniques To Improve Time Dependent Dielectric Breakdown Based Failure For Cmos Circuits, Emanuel S. Tarog
Master's Theses
This project investigates the failure of various CMOS circuits as a result of Time Dependent Dielectric Breakdown (TDDB) and explores design techniques to increase the mean time to failure (MTTF) of large-scale circuits. Time Dependent Dielectric Breakdown is a phenomenon where the oxide underneath the gate degrades as a result of the electric field in the material. Currently, there are few well documented design techniques that can increase lifetime, but with a tool chain I created called the MTTF Analyzing Program, or MAP, I was able to test circuits under various conditions in order to identify weak links, discover relationships, …
Embedded Systems As Datacenters,
2009
RAI Laboratory LLC
Embedded Systems As Datacenters, Robert Iannucci
Robert A Iannucci
No abstract provided.
The Effect Of The Digit Slicing Architecture On The Fft Butterfly,
2009
Faculty of Engineering, Technology and Built Environment UCSI University
The Effect Of The Digit Slicing Architecture On The Fft Butterfly, Yazan Samir, Rozita Teymourzadeh
Dr. Rozita Teymourzadeh, CEng.
Vlsi Implementation Of Novel Class Of High Speed Pipelined Digital Signal Processing Filter For Wireless Receivers,
2009
Faculty of Engineering, Technology and Built Environment UCSI University
Vlsi Implementation Of Novel Class Of High Speed Pipelined Digital Signal Processing Filter For Wireless Receivers, Rozita Teymourzadeh, Yazan Samir, Shabuil Islam, Masuri Othman, Mok Vh
Dr. Rozita Teymourzadeh, CEng.
Design Of Automatic Soil Humidity Control Using Maximum Power Point Tracking Controller,
2009
Faculty of Engineering, Technology and Built Environment UCSI University
Design Of Automatic Soil Humidity Control Using Maximum Power Point Tracking Controller, Hoe Ck, Vaithlingam A.C., Rozita Teymourzadeh, Rajkumar R
Dr. Rozita Teymourzadeh, CEng.
On-Chip Implementation Of Pipeline Digit-Slicing Multiplier-Less Butterfly For Fast Fourier Transform Architecture,
2009
Faculty of Engineering, Technology and Built Environment UCSI University
On-Chip Implementation Of Pipeline Digit-Slicing Multiplier-Less Butterfly For Fast Fourier Transform Architecture, Yazan Samir, Rozita Teymourzadeh, Masuri Othman, Shabiul Islam, Mok Vh
Dr. Rozita Teymourzadeh, CEng.
On-Chip Implementation Of High Resolution High Speed Floating Point Adder/Subtractor With Reducing Mean Latency For Ofdm,
2009
Faculty of Engineering, Technology and Built Environment UCSI University
