Engineering Commons^™

Real-Time Registration And Display Of Confocal Microscope Imagery For Multiple-Band Analysis, Scott E. Budge, A.M. Mayampurath, J.C. Solinsky

Electrical and Computer Engineering Faculty Publications

Multiple images acquired in real-time from a confocal microscope in different illumination wavebands are used to construct a three-dimensional understanding of living cell signal propagation. Registration, fusion, and display of these images are performed in real-time using field programmable gate array (FPGA) technology to allow the biological scientist to observe time critical signaling processes as they occur. The registration and display system operates at a rate of up to 15 frames/s, and performs dark offset correction and noise reduction, followed by non-linear correction for lens warp and focal plane tilt, and finally correction for spatial mismatch between the different wavebands. …

Real-Time Image Analysis Of Living Cellular-Biology Measurements Of Intelligent Chemistry, J.C. Solinsky, Scott E. Budge, P.D. Majors, B. Rex

Electrical and Computer Engineering Faculty Publications

This paper reports on the Pacific Northwest National Laboratory (PNNL) DOE Initiative in Image Science and Technology (ISAT) research, which is developing algorithms and software tool sets for remote sensing and biological applications. In particular, the PNNL ISAT work is applying these research results to the automated analysis of real-time cellular biology imagery to assist the biologist in determining the correct data collection region for the current state of a conglomerate of living cells in three-dimensional motion. The real-time computation of the typical 120 MB/sec multi-spectral data sets is executed in a Field Programmable Gate Array (FPGA) technology, which has …

Bit-Level Erasure Decoding Of Reed-Solomon Codes Over Gf(2/Sup M/), T.K. Moon, Scott E. Budge

Electrical and Computer Engineering Faculty Publications

The algorithms for bit-level erasure decoding of (n,k) Reed-Solomon codes over GF(2/sup m/) beyond the design erasure decoding distance of n-k are considered. Erasure decoding takes place in the (mk, nk) binary image code. When the number of erasures exceeds n-k, then additional parity check equations must be developed. We describe how these equations are obtained and some of their properties. Decoding algorithms are discussed which tradeoff decoding performance for computational complexity. Simulation results for several families of codes are presented which provide information about good binary image codes.

A Fast Full-Search Adaptive Vector Quantizer For Video Coding, Scott E. Budge, Christian B. Peel

Electrical and Computer Engineering Faculty Publications

This paper presents a novel VQ structure which provides very good quality encoding for video sequences and exploits the computational savings gained from a fast-search algorithm. It uses an adaptive-search, variable-length encoding method which allows for very fast matching of a wide range of transmission rates. Both the encoding quality and the computational benefits from the fast-search algorithm are presented. Simulations show that full-search tree residual VQ (FTRVQ) can provide up to 3 dB improvement over a similar RVQ encoder on video sequences.

Design Of An Fpga-Based High-Speed Filter-Decimator For The Gifts Imaging Interferometer, Scott E. Budge, Charles R. O'Brien

Electrical and Computer Engineering Faculty Publications

This paper presents the design of an FPGA-based frame filter-decimator for the geostationary imaging Fourier transform spectrometer (GIFTS). The decimator reduces samples from two 128/spl times/128 sample imaging arrays from 1638.4 fps to 102.4 complex fps for the long wave IR (LWIR) band and from 1638.4 fps to 204.8 complex fps for the medium wave IR (MWIR) band. The design uses a novel parallel pipeline architecture to handle the bandpass sampling and decimation of the 16 k array samples which arrive a frame-at-a-time. The design is challenging because of significant speed, size, weight and power restrictions for satellite implementation.

Very Fast Tree-Structured Vector Quantization, Todd K. Moon, Christian B. Peel, Scott E. Budge

Electrical and Computer Engineering Faculty Publications

Very fast tree-structured vector quantization employs scalar quantization decisions at each level, but chooses the dimension on which to quantize based on the coordinate direction of maximum variance. Because the quantization is scalar, searches are no more complex than scalar quantization - providing significant improvement in complexity over full-searched or even tree-structured vector quantization - but the method preserves the shape and memory advantages of conventional vector quantization. However, the space filling advantage of VQ is forfeited, since each Voronoi cell is a rectangular cuboid.

Adaptive-Rate Tree-Structured Residual Vector Quantization, Christian B. Peel, X. Liu, Scott E. Budge

Electrical and Computer Engineering Faculty Publications

Full-search vector quantization (VQ) provides optimal results only with high memory and computational cost. We describe the computational and memory requirements of tree-structured VQ, residual VQ (RVQ), and tree-structured RVQ. We present multiple-rate, adaptive-search implementations of these VQ structures, and simulation results with video sequences. Tree-structured RVQ provides up to 1.5 db PSNR quality improvements over RVQ, as well as significant perceptual improvement. These algorithms maintain many of the benefits of full-search VQ, while providing trade-offs between computational, storage, and performance requirements.

Rate-Distortion Adaptive Vector Quantization For Wavelet Imagecoding, Qun Gu, Scott E. Budge

Electrical and Computer Engineering Faculty Publications

We propose a wavelet image coding scheme using rate-distortion adaptive tree-structured residual vector quantization. Wavelet transform coefficient coding is based on the pyramid hierarchy (zero-tree), but rather than determining the zero-tree relation from the coarsest subband to the finest by hard thresholding, the prediction in our scheme is achieved by rate-distortion optimization with adaptive vector quantization on the wavelet coefficients from the finest subband to the coarsest. The proposed method involves only integer operations and can be implemented with very low computational complexity. The preliminary experiments have shown some encouraging results: a PSNR of 30.93 dB is obtained at 0.174 …

Locally Optimal, Buffer-Constrained Motion Estimation And Mode Selection For Video Sequences, C. B. Peel, Scott E. Budge, K. Liang, C.-M. Huang

Electrical and Computer Engineering Faculty Publications

We describe a method of using a Lagrange multiplier to make a locally optimal trade off between rate and distortion in the motion search for video sequences, while maintaining a constant bit rate channel. Simulation of this method shows that it gives up to 3.5 dB PSNR improvement in a high motion sequence. A locally rate-distortion (R-D) optimal mode selection mechanism is also described. This method also gives significant quality benefit over the nominal method. Though the benefit of these techniques is significant when used separately, when the optimal mode selection is combined with the R-D optimal motion search, it …

Design, Modeling, And Characterization Of Fet-Seed Smart Pixel Transceiver Arrays For Optical Backplanes, David V. Plant, Alain Z. Shang, Marcos R. Otazo, David R. Rolston, Brian Robertson, Harvard Scott Hinton

Electrical and Computer Engineering Faculty Publications

The design, modeling, and characterization of FET-SEED smart pixel transceiver arrays fabricated for application in optical backplanes are presented. Results of digital and analog measurements on 4×4 transmitter arrays and 4×4 receiver arrays, packaged at the printed circuit-board level, will be presented. In addition, these results will be compared to device and circuit models developed for these optoelectronics. Finally, the description of the successful application of these optoelectronics to interconnect two printed circuit boards will be described.

A Hybrid-Seed Smart Pixel Array For A Four-Stage Intelligent Optical Backplane Demonstrator, David R. Rolston, David V. Plant, Ted H. Szymanski, Harvard Scott Hinton, W. S. Hsiao, Michael H. Ayliffe, David Kabal, Michael B. Venditti, P. Desai, Ashok V. Krishnamoorthy, Keith W. Goossen, J. A. Walker, B. Tseng, S. P. Hui, J. C. Cunningham, W. Y. Jan

Electrical and Computer Engineering Faculty Publications

This paper describes the VLSI design, layout, and testing of a Hybrid-SEED smart pixel array for a four-stage intelligent optical backplane. The Hybrid-SEED technology uses CMOS silicon circuitry with GaAs-AlGaAs multiple-quantum-well modulators and detectors. The chip has been designed based on the HyperPlane architecture and is composed of four smart pixels which act as a logical 4-bit parallel optical channel. It has the ability to recognize a 4-bit address header, inject electrical data onto the backplane, retransmit optical data, and extract optical data from the backplane. In addition, the smart pixel array can accommodate for optical inversions and bit permutations …

An Atm-Based Intelligent Optical Backplane Using Cmos-Seed Smart Pixel Arrays And Free- Space Optical Interconnect Modules, Dominic J. Goodwill, Kent E. Devenport, Harvard Scott Hinton

Electrical and Computer Engineering Faculty Publications

The architecture, smart pixel array chip design, and optical design of an intelligent free-space digital optical backplane for ATM switching are presented. The smart pixel chip uses reflective SEED (self-electrooptic effect device) optical modulators and detectors flip-chip bonded to CMOS circuitry. This chip is one of the most complex designs ever reported in this technology, and it operates at a simulated backplane clock rate of 125 MHz. The low-loss optical system employs f/4 diffractive minilenses and microlenses to interconnect clusters of smart pixels, and it is shown to allow 2060 connections per chip if 1-cm2 -sized smart pixel chips are …

Progress In The Smart Pixel Technologies, Harvard Scott Hinton

Electrical and Computer Engineering Faculty Publications

The purpose of this paper is to review the recent progress in the developing smart pixel technologies. The paper begins by reviewing some of the rapidly evolving smart pixel terminologies. It then describes several of the smart pixel technologies that have recently emerged. Finally, it outlines the performance of these technologies in both device complexity and aggregate capacity. The reviewed SPA technologies include both the modulator-based FET-SEED, hybrid CMOS-SEED, and LCOS smart pixels and the source-based hybrid VCSEL/MSM, ELO, flip-chip-bonded VCSEL/MSM, and monolithic MSM/MESFET/VCSEL smart pixels.

Design And Construction Of An Active Alignment Demonstrator For A Free-Space Optical Interconnect, G. C. Boisset, B. Robertson, Harvard Scott Hinton

Electrical and Computer Engineering Faculty Publications

An x-y active alignment system based on Risley beam steerers is described. The demonstrator features a quadrant detector which detects the misalignment error between the center of a spot of light and the center of the quadrant detector. This misalignment error is then used by a new algorithm to calculate the rotational displacement required for the two Risley beam steerers to steer the spot of light to the center of the quadrant detector. The experimental results indicate that any spot misaligned by up to 160 μm on the quadrant detector will be systematically centered by the demonstrator system.

An Optical Backplane Demonstrator System Based On Fet-Seed Smart Pixel Arrays And Diffractive Lenslet Arrays, D. V. Plant, B. Robertson, Harvard Scott Hinton, W. M. Robertson, G. C. Boisset, N. H. Kim, Y. S. Liu, M. R. Otazo, D. R. Rolston, A. Z. Shang

Electrical and Computer Engineering Faculty Publications

We have demonstrated a representative portion of an optical backplane using FET-SEED smart pixels and free-space optics to interconnect printed circuit boards (PCB's) in a two board, unidirectional link configuration. 4×4 arrays of FET-SEED transceivers were designed, fabricated, and packaged all the PCB level, The optical interconnection was constructed using diffractive microoptics, and custom optomechanics. The system was operated in two modes, one showing high data throughput, 100 MBit/sec, and the other demonstrating large connection densities, 2222 channel/cm2.

Epistemic Decision Theory Applied To Multiple-Target Tracking, T. K. Moon, Scott E. Budge, W. C. Stirling, J. B. Thompson

Electrical and Computer Engineering Faculty Publications

A decision philosophy that seeks the avoidance of error by trading off belief of truth and value of information is applied to the problem of recognizing tracks from multiple targets (MTT). A successful MTT methodology should be robust in that its performance degrades gracefully as the conditions of the collection become less favorable to optimal operation. By stressing the avoidance, rather than the explicit minimization, of error, the authors obtain a decision rule for trajectory-data association that does not require the resolution of all conflicting hypotheses when the database does not contain sufficient information to do so reliably. This rule, …

Classification Using Set-Valued Kalman Filtering And Levi's Decision Theory, T.K. Moon, Scott E. Budge

Electrical and Computer Engineering Faculty Publications

We consider the problem of using Levi's expected epistemic decision theory for classification when the hypotheses are of different informational values, conditioned on convex sets obtained from a set-valued Kalman filter. The background of epistemic utility decision theory with convex probabilities is outlined and a brief introduction to set-valued estimation is given. The decision theory is applied to a classifier in a multiple-target tracking scenario. A new probability density, appropriate for classification using the ratio of intensities, is introduced.

Optical Computing: Introduction By The Feature Editors, Scott Hinton, Bernard Soffer, Frank A.P. Tooley, Ken-Ichi Yukimatsu

Electrical and Computer Engineering Faculty Publications

This feature of Applied Optics: Information Processing on optical computing comprises thirty papers. Most of the papers evolved from papers presented at the Fifth Topical Meeting on Optical Computing held in March 1993 in Palm Springs, California.

The Spirit Iii Radiometer Data Compression System, Scott E. Budge

Electrical and Computer Engineering Faculty Publications

In this paper, we describe the image data compressor designed and built for the SPIRIT III radiometer which will be used to provide a real-time "quick-look" capability for the instrument. A a brief description of elements of the radiometer design which determine the data compression requirements is given, followed by a description of the VQ-based hybrid data compression algorithm. Highlights of the hardware design are also discussed.

The performance of the compressor is presented. Tests made using data obtained during cold tests of the instrument indicate an RMS error of 6.26 counts for the 10:1 compression mode and 5.83 counts …

A Complexity Analysis Of Smart Pixel Switching Nodes For Photonic Extended Generalized Shuffle Switching Networks, Thomas J. Cloonan, Gaylord W. Richards, Anthony L. Lentine, Frederick B. Mccormick, Harvard Scott Hinton, Stephen J. Hinterlong

Electrical and Computer Engineering Faculty Publications

This paper studies the architectural tradeoffs found in the use of smart pixels for nodes within photonic switching interconnection networks are discussed. The particular networks of interest within the analysis are strictly nonblocking extended generalized shuffle (EGS) networks. Several performance metrics are defined for the analysis, and the effect of node size on these metrics is studied. Optimum node sizes are defined for each of the performance metrics and system-level limitations are identified.

Multiple Quantum-Well Technology Takes Seed, Harvard S. Hinton

Electrical and Computer Engineering Faculty Publications

Progress in the development of self-electrooptic-effect devices (SEEDs) is discussed. The devices include the resistor-SEED (R-SEED) device, which can be viewed as a simple NOR gate. The symmetric SEED (S-SEED) and the logic-SEED (L-SEED) devices with improved features, functionality, and performance are also considered. The integration of FETs with multiple quantum well (MQW) modulators (FET-SEED), enables optical interconnections of electronic circuits. Where the SEED technology can be used is discussed, and an experimental optical switching fabric made using these devices is described.

Photonics In Switching, Harvard S. Hinton

Electrical and Computer Engineering Faculty Publications

One of the keys to the future of telecommunications companies will be their ability to provide new broadband services to both the business community and residential customers. With the new services will come the need for the equivalent of a broadband switching office. Such a system could require the capability of supporting in excess of 10000 users with broadband channel bit rates exceeding 100 Mb/s. This implies a switching fabric the aggregate bit rate of which could be greater than 1 Tb/s. Guided-wave technology and free-space technology switching fabrics are discussed. Three time-division-based switching fabrics are proposed, and two wavelength-division-based …

Switching To Photonics, Harvard S. Hinton

Electrical and Computer Engineering Faculty Publications

The use of hardware that exploits the interplay of photons and electrons to switch voice, data, and video is discussed. The two directions being taken by current research-guided-wave and free-space photonics-are examined. Photonic time-slot interchanges are described. Multidivisional fabrics, based on a combination of space-division and time-division multiplexing, are considered, as is the wavelength-division-based photonic packet switch, another kind of multidimensional fabric. The use of self-electrooptic effect devices, (SEEDs) is discussed.

Symmetric Self-Electro-Optic Effect Device: Optical Set-Reset Latch, Differential Logic Gate, And Differential Modulator/Detector, Anthony L. Lentine, Harvard S. Hinton, David A. B. Miller, Jill E. Henry, J. E. Cunningham, Leo M. F. Chirovsky

Electrical and Computer Engineering Faculty Publications

The symmetric self-electrooptic-effect device (S-SEED), a structure consisting of two p-i-n diodes electrically connected in series and acting as an optically bistable set-reset latch, is discussed. Applications and extensions of this device are also discussed. The devices do not require the critical biasing that is common to most optically bistable devices and thus is more useful for system applications. They have been optically cascaded in a photonic ring counter and have been used to perform different NOR, OR, NAND, and AND logic functions. Using the same device, a differential modulator that generates a set of complementary output beams with a …

Architectural Considerations For Photonic Switching Networks, Harvard S. Hinton

Electrical and Computer Engineering Faculty Publications

Photonic technologies are reviewed that could become important components of future telecommunication systems. Photonic devices and systems are divided into two classes according to the function they perform. The first class, relational, refers to devices, that map the input channels to the output channels under external control. The second class, logic, perform some type or combination of Boolean logic functions. Some of the strengths and weaknesses of operating in the photonic domain are presented. Relational devices and their applications are discussed. Optical logic devices and their potential applications are reviewed.