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Full-Text Articles in Engineering
Calibration Method For Texel Images Created From Fused Lidar And Digital Camera Images, Scott E. Budge, N.S. Badamikar
Calibration Method For Texel Images Created From Fused Lidar And Digital Camera Images, Scott E. Budge, N.S. Badamikar
Electrical and Computer Engineering Faculty Publications
The fusion of imaging lidar information and digital imagery results in 2.5-dimensional surfaces covered with texture information, called texel images. These data sets, when taken from different viewpoints, can be combined to create three-dimensional (3-D) images of buildings, vehicles, or other objects. This paper presents a procedure for calibration, error correction, and fusing of flash lidar and digital camera information from a single sensor configuration to create accurate texel images. A brief description of a prototype sensor is given, along with a calibration technique used with the sensor, which is applicable to other flash lidar/digital image sensor systems. The method …
Automatic Registration Of Multiple Texel Images (Fused Lidar/Digital Imagery) For 3d Image Creation, Scott E. Budge, N. Badamikar
Automatic Registration Of Multiple Texel Images (Fused Lidar/Digital Imagery) For 3d Image Creation, Scott E. Budge, N. Badamikar
Electrical and Computer Engineering Faculty Publications
Creation of 3D images through remote sensing is a topic of interest in many applications such as terrain / building modeling and automatic target recognition (ATR). Several photogrammetry-based methods have been proposed that derive 3D information from digital images from different perspectives, and lidar- based methods have been proposed that merge lidar point clouds and texture the merged point clouds with digital imagery. Image registra tion alone has difficulty with smooth regions with low contrast, whereas point cloud merging alone has difficulty with outliers and lack of proper convergence in the merging process. This paper presents a method to create …
Hci-Tolerant Noc Router Microarchitecture, Dean Michael Ancajas, James Mccabe Nickerson, Koushik Chakraborty, Sanghamitra Roy
Hci-Tolerant Noc Router Microarchitecture, Dean Michael Ancajas, James Mccabe Nickerson, Koushik Chakraborty, Sanghamitra Roy
Electrical and Computer Engineering Faculty Publications
The trend towards massive parallel computing has necessitated the need for an On-Chip communication framework that can scale well with the increasing number of cores. At the same time, technology scaling has made transistors susceptible to a multitude of reliability issues (NBTI, HCI, TDDB). In this work, we propose an HCI-Tolerant microarchitecture for an NoC Router by manipulating the switching activity around the circuit. We find that most of the switch- ing activity (the primary cause of HCI degradation) are only concentrated in a few parts of the circuit, severely degrading some portions more than others. Our techniques increase the …
Efficiently Tolerating Timing Violations In Pipelined Microprocessors, Koushik Chakraborty, Brennan Cozzens, Sanghamitra Roy, Dean M. Ancajas
Efficiently Tolerating Timing Violations In Pipelined Microprocessors, Koushik Chakraborty, Brennan Cozzens, Sanghamitra Roy, Dean M. Ancajas
Electrical and Computer Engineering Faculty Publications
Early prediction of an upcoming timing violation presents a tremendous opportunity to mask the performance overhead of tolerating these faults. In this paper, we explore several techniques for optimizing instruction scheduling in an Out-of-Order pipeline, exploiting this new perspective in robust system design. Compared to recently proposed stall based techniques for tolerating predictabletiming violations, we demonstrate a massive reduction in performance overhead, while supporting correct execution in faulty environments (64-97% across different benchmarks). Copyright © 2013 ACM.
Muller C-Element Based Decoder (Mcd): A Decoder Against Transient Faults, Y. Tang, Chris J. Winstead, C. Jego, E. Boutillon, M. Jezequel
Muller C-Element Based Decoder (Mcd): A Decoder Against Transient Faults, Y. Tang, Chris J. Winstead, C. Jego, E. Boutillon, M. Jezequel
Electrical and Computer Engineering Faculty Publications
This work extends the analysis and application of a digital error correction method called Muller C-element Decoding (MCD), which has been proposed for fault masking in logic circuits comprised of unreliable elements. The proposed technique employs cascaded Muller C-elements and XOR gates to achieve efficient error-correction in the presence of internal upsets. The error-correction analysis of MCD architecture and the investigation of C-element’s robustness are first introduced. We demonstrate that the MCD is able to produce error-correction benefit in a high error-rate of internal faults. Significantly, for a (3,6) short-length LDPC code, when the decoding process is internally error-free the …
Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems, Koushik Chakraborty, Sanghamitra Roy
Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems, Koushik Chakraborty, Sanghamitra Roy
Electrical and Computer Engineering Faculty Publications
Dynamic voltage and frequency scaling (DVFS), a widely adopted technique to ensure safe thermal characteristics while delivering superior energy efficiency, is rapidly becoming inefficient with technology scaling due to two critical factors: 1) inability to scale the supply voltage due to reliability concerns and 2) dynamic adaptations through DVFS cannot alter underlying power hungry circuit characteristics, designed for the nominal frequency. In this paper, we show that DVFS scaled circuits substantially lag in energy efficiency, by 22%-86%, compared to ground up designs for target frequency levels. We propose architecturally homogeneous power-performance heterogeneous multicore systems, a fundamentally alternate means to design …