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Full-Text Articles in Engineering
Design, Modeling, And Characterization Of Fet-Seed Smart Pixel Transceiver Arrays For Optical Backplanes, David V. Plant, Alain Z. Shang, Marcos R. Otazo, David R. Rolston, Brian Robertson, Harvard Scott Hinton
Design, Modeling, And Characterization Of Fet-Seed Smart Pixel Transceiver Arrays For Optical Backplanes, David V. Plant, Alain Z. Shang, Marcos R. Otazo, David R. Rolston, Brian Robertson, Harvard Scott Hinton
Electrical and Computer Engineering Faculty Publications
The design, modeling, and characterization of FET-SEED smart pixel transceiver arrays fabricated for application in optical backplanes are presented. Results of digital and analog measurements on 4×4 transmitter arrays and 4×4 receiver arrays, packaged at the printed circuit-board level, will be presented. In addition, these results will be compared to device and circuit models developed for these optoelectronics. Finally, the description of the successful application of these optoelectronics to interconnect two printed circuit boards will be described.
A Hybrid-Seed Smart Pixel Array For A Four-Stage Intelligent Optical Backplane Demonstrator, David R. Rolston, David V. Plant, Ted H. Szymanski, Harvard Scott Hinton, W. S. Hsiao, Michael H. Ayliffe, David Kabal, Michael B. Venditti, P. Desai, Ashok V. Krishnamoorthy, Keith W. Goossen, J. A. Walker, B. Tseng, S. P. Hui, J. C. Cunningham, W. Y. Jan
A Hybrid-Seed Smart Pixel Array For A Four-Stage Intelligent Optical Backplane Demonstrator, David R. Rolston, David V. Plant, Ted H. Szymanski, Harvard Scott Hinton, W. S. Hsiao, Michael H. Ayliffe, David Kabal, Michael B. Venditti, P. Desai, Ashok V. Krishnamoorthy, Keith W. Goossen, J. A. Walker, B. Tseng, S. P. Hui, J. C. Cunningham, W. Y. Jan
Electrical and Computer Engineering Faculty Publications
This paper describes the VLSI design, layout, and testing of a Hybrid-SEED smart pixel array for a four-stage intelligent optical backplane. The Hybrid-SEED technology uses CMOS silicon circuitry with GaAs-AlGaAs multiple-quantum-well modulators and detectors. The chip has been designed based on the HyperPlane architecture and is composed of four smart pixels which act as a logical 4-bit parallel optical channel. It has the ability to recognize a 4-bit address header, inject electrical data onto the backplane, retransmit optical data, and extract optical data from the backplane. In addition, the smart pixel array can accommodate for optical inversions and bit permutations …
An Atm-Based Intelligent Optical Backplane Using Cmos-Seed Smart Pixel Arrays And Free- Space Optical Interconnect Modules, Dominic J. Goodwill, Kent E. Devenport, Harvard Scott Hinton
An Atm-Based Intelligent Optical Backplane Using Cmos-Seed Smart Pixel Arrays And Free- Space Optical Interconnect Modules, Dominic J. Goodwill, Kent E. Devenport, Harvard Scott Hinton
Electrical and Computer Engineering Faculty Publications
The architecture, smart pixel array chip design, and optical design of an intelligent free-space digital optical backplane for ATM switching are presented. The smart pixel chip uses reflective SEED (self-electrooptic effect device) optical modulators and detectors flip-chip bonded to CMOS circuitry. This chip is one of the most complex designs ever reported in this technology, and it operates at a simulated backplane clock rate of 125 MHz. The low-loss optical system employs f/4 diffractive minilenses and microlenses to interconnect clusters of smart pixels, and it is shown to allow 2060 connections per chip if 1-cm2 -sized smart pixel chips are …
An Optical Backplane Demonstrator System Based On Fet-Seed Smart Pixel Arrays And Diffractive Lenslet Arrays, D. V. Plant, B. Robertson, Harvard Scott Hinton, W. M. Robertson, G. C. Boisset, N. H. Kim, Y. S. Liu, M. R. Otazo, D. R. Rolston, A. Z. Shang
An Optical Backplane Demonstrator System Based On Fet-Seed Smart Pixel Arrays And Diffractive Lenslet Arrays, D. V. Plant, B. Robertson, Harvard Scott Hinton, W. M. Robertson, G. C. Boisset, N. H. Kim, Y. S. Liu, M. R. Otazo, D. R. Rolston, A. Z. Shang
Electrical and Computer Engineering Faculty Publications
We have demonstrated a representative portion of an optical backplane using FET-SEED smart pixels and free-space optics to interconnect printed circuit boards (PCB's) in a two board, unidirectional link configuration. 4×4 arrays of FET-SEED transceivers were designed, fabricated, and packaged all the PCB level, The optical interconnection was constructed using diffractive microoptics, and custom optomechanics. The system was operated in two modes, one showing high data throughput, 100 MBit/sec, and the other demonstrating large connection densities, 2222 channel/cm2.