Digital Circuits Commons^™

Technology Mapping, Design For Testability, And Circuit Optimizations For Null Convention Logic Based Architectures, Farhad Alibeygi Parsan

Graduate Theses and Dissertations

Delay-insensitive asynchronous circuits have been the target of a renewed research effort because of the advantages they offer over traditional synchronous circuits. Minimal timing analysis, inherent robustness against power-supply, temperature, and process variations, reduced energy consumption, less noise and EMI emission, and easy design reuse are some of the benefits of these circuits. NULL Convention Logic (NCL) is one of the mainstream asynchronous logic design paradigms that has been shown to be a promising method for designing delay-insensitive asynchronous circuits.

This dissertation investigates new areas in NCL design and test and is made of three sections. The first section discusses …

Efficient Fpga Architectures For Separable Filters And Logarithmic Multipliers And Automation Of Fish Feature Extraction Using Gabor Filters, Arjun Kumar Joginipelly

LSU New Orleans Theses and Dissertations

Convolution and multiplication operations in the filtering process can be optimized by minimizing the resource utilization using Field Programmable Gate Arrays (FPGA) and separable filter kernels. An FPGA architecture for separable convolution is proposed to achieve reduction of on-chip resource utilization and external memory bandwidth for a given processing rate of the convolution unit.

Multiplication in integer number system can be optimized in terms of resources, operation time and power consumption by converting to logarithmic domain. To achieve this, a method altering the filter weights is proposed and implemented for error reduction. The results obtained depict significant error reduction when …

Ad-Hoc Hid: Modular Wireless Human Interface Device, Joseph A. Mazzanti

Electrical Engineering

Ad-Hoc HID is a modular, reprogrammable Human Interface Device. This device is intended to function as a keyboard, gamepad, or mouse, according to the user's needs. The final project is intended to be switch agnostic, making the final product adaptable to the user’s needs.

Mos Current Mode Logic (Mcml) Analysis For Quiet Digital Circuitry And Creation Of A Standard Cell Library For Reducing The Development Time Of Mixed Signal Chips, David Marusiak

Master's Theses

Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with …

Designing A Modular Dsp Core For Real-Time Audio Performance, Kevin Richard Brewer

Computer Engineering

This project provides an overview for building a Digital Signal Processing (DSP) core on a Digilent Nexys2 FPGA board. The DSP core is designed to give Cal Poly students interested in DSP and its applications to audio engineering a usable platform to perform signal processing and analytics. The processes of the DSP core are modular, allowing students to design their own implementations of various adder and multiplier functions. Infinite impulse response (IIR) filters and finite impulse response (FIR) filters using both cascade and parallel implementations are the primary processing tools in the core, and all output can be visually and …

Digital Circuit Projects: An Overview Of Digital Circuits Through Implementing Integrated Circuits - Second Edition, Charles W. Kann

Open Educational Resources

Digital circuits, often called Integrated Circuits or ICs, are the central building blocks of a Central Processing Unit (CPU). To understand how a computer works, it is essential to understand the digital circuits which make up the CPU. This text introduces the most important of these digital circuits; adders, decoders, multiplexers, D flip-flops, and simple state machines.

What makes this textbook unique is that it puts the ability to understand these circuits into the hands of anyone, from hobbyists to students studying Computer Science. This text is designed to teach digital circuits using simple projects the reader can implement. But …

Data Transfer Using Light, Ryan Thomas Suarez

Computer Engineering

A proof of concerpt for data transmission using light as a medium. Data is transferred by strobing and LED faster than the human eye can detect in an attempt to come up with a more secure alternate to in-building wifi.

Implementation Of Prediction Algorithms To Reduce Latency In Control Of Switching Converters, Brent Bell

Electrical Engineering Undergraduate Honors Theses

Using pulse-width modulation (PWM) to control switching converters such as a dual active bridge introduces latency into a system [1]. Latency in a switching converter decreases the effective bandwidth that the converter can be switched at and for the case of a closed loop control system decreases the effective closed loop system stability. This delay can be attributed to sampling of the control signal and calculation time for the PWM. If a prediction scheme is implemented in this calculation, the next switching time could be predicted to remove any latency. There are effectively two steps in order to achieve this …

Radiation-Hardened Delay-Insensitive Asynchronous Circuits For Multi-Bit Seu Mitigation And Data-Retaining Sel Protection, John Davis Brady

Graduate Theses and Dissertations

Radiation can have highly damaging effects on circuitry, especially for space applications, if designed without radiation-hardening mechanisms. Delay-insensitive asynchronous circuits inherently have promising potentials in mitigating the effects of radiation due to their delay insensitivity. This thesis proposes the use of two delay-insensitive asynchronous logic architectures to mitigate the effects of up to two single-event upsets (SEU) and a single-event latch-up (SEL). The multi-bit SEU mitigation with SEL protection architecture improves the original design by providing more integrity against data corruption and lock-ups caused by multi-bit SEUs, and it is expanded to simultaneously provide protection against SEL. The multi-bit SEU …

Digital Control Board For Phased Array Antenna Beam Steering In Adaptive Communication Applications, Mayur Bansal

Master's Theses

The application of adaptive communication techniques for mobile communications has attracted considerable interest in the last decade. One example of these techniques is spatial filtering through planar antenna array beam forming.

This thesis describes the development of a digital system that adaptively controls a phased array antenna. The radiating structure of the phased antenna array is tetrahedral-shaped and contains four antenna elements on each of its three faces. The overall system comprises of a digital control board with an external computer interface, an RF control board, and the phased antenna array. The RF controls the main lobe direction on the …

Open Cortex-M0™ Modular Debug Unit, Chuan Yean Tan, Matthew Swabey

The Summer Undergraduate Research Fellowship (SURF) Symposium

The debug unit of a modern digital system on chip (SoC) is a critical unit that allows users to monitor and analyze the chip’s activity that occurs throughout a SoC design. Selection of the debug unit’s correct feature set and architecture are critical to the success of the design. Debugging systems that exist have different architectures and are closely coupled to their host SoCs. As a consequence they are resource intensive to improve on due to the different nature of each SoC designs. Moreover, the bus protocols that allow the debug unit to interact with the SoC design are often …

Design Synthesis And Optimization Of Permanent Magnet Synchronous Machines Based On Computationally-Efficient Finite Element Analysis, Gennadi Sizov

Dissertations (1934 -)

In this dissertation, a model-based multi-objective optimal design of permanent magnet ac machines, supplied by sine-wave current regulated drives, is developed and implemented. The design procedure uses an efficient electromagnetic finite element-based solver to accurately model nonlinear material properties and complex geometric shapes associated with magnetic circuit design. Application of an electromagnetic finite element-based solver allows for accurate computation in intricate performance parameters and characteristics. The first contribution of this dissertation is the development of a rapid computational method that allows accurate and efficient exploration of large multi-dimensional design spaces in search of optimum design(s). The computationally efficient finite element-based …

Self-Timed Dram Data Interface, Rajesh Nerkar

Dissertations and Theses

A DRAM communicates with a processing unit via two interfaces: a data interface and a command interface. In today's DRAMs, also known as synchronous DRAMs (SDRAMs), both interfaces use a clock to communicate with the processing unit. The clock times the communication between the processing unit and the SDRAM on both the data interface and the command interface.

We propose a self-timed DRAM. The self-timed DRAM introduces more flexibility into the DRAM interface by eliminating the clock. The command interface and the data interface each communicate with the processing unit using a handshake protocol rather than a clock.

This thesis …

Analysis Of Parameter Tuning On Energy Efficiency In Asynchronous Circuits, Justin Thomas Roark

Graduate Theses and Dissertations

Power and energy consumption are the primary concern of the digital integrated circuit (IC) industry. Asynchronous logic, in the past several years, has increased in popularity due to its low power nature. This thesis analyzes a collection of array multipliers with different parameters to compare two asynchronous design paradigms, NULL Convention Logic (NCL) and Multi-Threshold NULL Convention Logic (MTNCL). Several commercially available pieces of software and custom scripts are used to analyze the asynchronous circuits and their components to provide the energy consumption estimation on various parts of each circuit. The analysis of the software results revealed that MTNCL circuits …

Cad Tool Design For Ncl And Mtncl Asynchronous Circuits, Vijay Mani Pillai

Graduate Theses and Dissertations

This thesis presents an implementation of a method developed to readily convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty compared to the all low-Vt implementation, and has negligible area overhead. The proposed tool utilizes industry-standard CAD tools. This research also presents an Automated Gate-Level Pipelining with Bit-Wise Completion (AGLPBW) method to maximize throughput of delay-insensitive full-word pipelined NCL circuits. These methods have been integrated into the Mentor Graphics and …

High Voltage Waveform Sensor, Nathan Stump

Computer Engineering

The purpose of this project was to build a system to measure the voltage waveform of a discharging railgun. Another group of students had built a railgun system to simulate micro asteroid impacts in low Earth orbit. The only instrumentation available to them was an analog voltmeter attached to the capacitor banks. During the lengthy (30 to 45 minute) charging process, an analog voltmeter was more than capable of measuring the voltage. However, during the discharging process the time elapsed was so short (approximately one millisecond) that waveform data could not be captured. In order to measure power dissipation during …

The Visual Representation Of Sound For The Hearing Impaired, Jonathan Brophy

Electrical Engineering

There are many difficulties that arise when one is faced with a hearing disability. New applications of advancing technology have the potential to enable designs capable of assisting the hearing impaired with the ability to see sound. This project seeks to provide a user with a visual representation of loud noises detected using small directional microphones. The microphones determine the location of the sound above a set decibel level and a microprocessor determines the approximate location of the sound source and displays a vertical colored bar on a video image in the direction of the noise using virtual reality glasses. …

Sifteo Spice, Ikenga Kenneth Ugo

Computer Engineering

Sifteo SPICE is an application built on the Sifteo platform with the purpose of aiding in the learning of basic circuits. Traditionally, circuit theory is taught to students in two different methods, lectures and laboratory exercises. Lectures focus on auditory and visual learning and are largely passive learning. Lab experiments allow students to physically interact with the circuits, and learn visually through viewing output waveforms from simulators or on measurement devices.[3] The goal of the Sifteo SPICE project is to develop a physical system for virtual, real-time SPICE simulation that mimics the laboratory experience. In Sifteo SPICE, each individual Sifteo …

Cad Tools For Synthesis Of Sleep Convention Logic, Parviz Palangpour

Graduate Theses and Dissertations

This dissertation proposes an automated flow for the Sleep Convention Logic (SCL) asynchronous design style. The proposed flow synthesizes synchronous RTL into an SCL netlist. The flow utilizes commercial design tools, while supplementing missing functionality using custom tools. A method for determining the performance bottleneck in an SCL design is proposed. A constraint-driven method to increase the performance of linear SCL pipelines is proposed. Several enhancements to SCL are proposed, including techniques to reduce the number of registers and total sleep capacitance in an SCL design.

Characterization Of Metal-Insulator-Transition (Mit) Phase Change Materials (Pcm) For Reconfigurable Components, Circuits, And Systems, Brent L. Danner

Theses and Dissertations

Many microelectromechanical systems (MEMS) use metal contact micro-switches as part of their reconfigurable device design. These devices utilize a mechanical component that can wear down and fail over time. Metal insulator transition (MIT) materials, also known as phase change materials (PCMs), exhibit a reversible transition that can be used to replace the mechanical component in reconfigurable devices. In the presence of a thermal or electric field stimuli, the PCMs will transition back and forth between a crystalline and amorphous state. During this transformation, the resistivity, reflectivity, and Young's modulus of the material drastically change. This research effort focuses on characterizing …