Digital Circuits Commons^™

Arm Mke1xf Mcu Replatform, Nathan Hong, Derek Lung, Japsimran Singh, Bevin Tang

Computer Engineering

After Cal Poly Racing’s electrical team began to hit the technical limits of the ADC and other I/O features of the current 8-bit Atmel AT90 microcontroller unit, it became clear that an upgrade was due. This replatforming project takes the functionalities of the old, 8-bit architecture, and aims to provide a 32-bit version using the ARM MKE1xF MCU. With the idea of having a working PCB as a stretch goal, the scope of the library development was limited to enable base functionality. Thus, the only libraries developed were for the Timer, ADC, SPI, UART, and CAN. Additionally, this document discusses …

Analog Sorting Using Pulse Width Modulation, Riley C. Olson

Computer Engineering

As time goes on, computers become more and more powerful. However, as processing time becomes less of a limiting factor for computing tasks, power consumption takes its place for many tasks. This paper proposes and tests a new method for sorting analog signals. This new sorting method converts analog signals into Pulse Width Modulated(PWM) signals of varying duty cycle , which are then sorted by a simple network of combinational logic, and then converted to a normal binary representation. In order to implement this new method, multiple circuits had to be designed and and tested to ensure their functionality and …

A Basic, Four Logic Cluster, Disjoint Switch Connected Fpga Architecture, Joseph Prachar

Computer Engineering

This paper seeks to describe the process of developing a new FPGA architecture from nothing, both in terms of knowledge about FPGAs and in initial design material. Specifically, this project set out to design an FPGA architecture which can implement a simple state machine type design with 10 inputs, 10 outputs and 10 states. The open source Verilog-to-Routing FPGA CAD flow tool was used in order to synthesize, place, and route HDL files onto the architecture. This project was completed in terms of the spirit of the original goals of implementing an FPGA from scratch. Although, the project resulted in …

Roborodentia Robot: Treadbot, Stephen C. Schmidt

Computer Science and Software Engineering

This document is a summary of my contest entry to the 2018 Cal Poly Roborodentia competition. It is meant to be a process overview and design outline of the mechanical, electrical, and software components of my robot.

How Gpu Rendering Affects Image Processing And Scientific Calculation Speed, Power And Energy On A Raspberry Pi, Qihao He

Electronic Theses and Dissertations

In this thesis, we explore the speed, power, and energy performance of the same data process on the central processing unit (CPU) with and without the acceleration of the Graphics Processing Unit (GPU) on the microcomputer Raspberry Pi (RPI). We tested on the RPI in two different fields. The first was comparing the speed, power, and energy usage with and without GPU acceleration in the image processing impacts on RPI model B+. The second was comparing speed, power, energy usage, and accuracy for scientific calculation with and without GPU acceleration on RPI model B+ and 3B.

We used a novel …

Automating Knife-Edge Method Of Thz Beam Characterization, Christopher Charles Faber

Undergraduate Research & Mentoring Program

The goal of this project is to create a time and cost-effective solution for THz beam profiling.

The knife edge method of beam characterization is a technique to verify the intensity profile of a beam involving traveling a blade orthogonal to the beam path and measuring transmission in successive steps. We use a vector network analyzer (VNA) to measure S21 transmission from a THz source. Manual implementation of this method was time-consuming and inefficient.

Project hardware includes an Arduino, a motor shield, and a ball screw linear rail with stepper motor actuator. Software was created in LabView and data is …

Laser-Scribed Graphene Micro-Supercapacitors, Kimi D. Owens

Undergraduate Research & Mentoring Program

M. F. El-Kady and R. B. Kaner, “Scalable fabrication of high-power graphene micro-supercapacitors for flexible and on-chip energy storage,” Nature Communications, vol. 4, p. 1475, Feb. 2013.

Supercapacitors are electrical components that have higher energy density than regular capacitors. Currently, they are large and bulky which makes it hard to be implemented into smaller electronic devices or on-chip. In Scalable Fabrication of High-power Graphene Micro-supercapacitors for Flexible and On-chip Energy Storage, El-Kady and Kaner developed an inexpensive and reliable method for scaling down supercapacitors to be approximately 7.53 x 5.35 mm. To make the laser-scribed graphene (LSG) micro-supercapacitors, an aqueous …

Improving System-On-Chip Test Networks For: Bandwidth, Security, And Power, Saurabh Gupta

Computer Science and Engineering Theses and Dissertations

Modern System-on-Chips (SoCs) provide benefits such as reduction in overall system cost, and size, increased performance, and lower power consumption. Increasing complexity of these Integrated Circuits (ICs) has resulted in a higher probability of manufacturing defects. Manufacturing defects can result in the faulty operation of a system. Thus, it is essential to test an IC after it is manufactured to detect any possible faults in it. These SoCs include on-chip embedded instruments that can be used for test, debug, diagnosis, validation, monitoring, characterization, configuration, or functional purposes. IEEE 1687 Std. (IJTAG) provides a standard interface for the reconfigurable access and …

Automatic Testing In The United States Air Force, Pearson Wade

Computer Science and Computer Engineering Undergraduate Honors Theses

The need for standardized Automatic Testing Equipment in the United States Department of Defense has brought about new policies and procedures within entities like the United States Air Force. The diversity and lifespan of systems such as jets, missiles, drones, and other electronics have brought on the need for a new system known as the Versatile Depot Automatic Test Station, or VDATS. The VDATS handles the automatic testing of replaceable digital circuits from different systems. I was introduced to this system firsthand during my time as an intern at Tinker AFB, Oklahoma. This new standardized approach to testing a diverse …

Comparison Of Data Transfer Alternatives In Asynchronous Circuits, Mark Howard

Computer Science and Computer Engineering Undergraduate Honors Theses

Digital integrated circuits (ICs) have become progressively complex in their functionality. This has sped up the demand for asynchronous architectures, which operate without any clocking scheme, considering new challenges in the timing of synchronous systems. Asynchronous ICs have less stringent environmental constraints and are capable of maintaining reliable operation in extreme environments, while also enjoying potential benefits such as low power consumption, high modularity, and improved performance. However, when the traditional bus architecture of synchronous systems is applied to asynchronous designs, handshaking protocols required for asynchronous circuit operation result in significantly increased power consumption, offsetting the low power benefit of …

Asynchronous Circuit Stacking For Simplified Power Management, Andrew Lloyd Suchanek

Graduate Theses and Dissertations

As digital integrated circuits (ICs) continue to increase in complexity, new challenges arise for designers. Complex ICs are often designed by incorporating multiple power domains therefore requiring multiple voltage converters to produce the corresponding supply voltages. These converters not only take substantial on-chip layout area and/or off-chip space, but also aggregate the power loss during the voltage conversions that must occur fast enough to maintain the necessary power supplies. This dissertation work presents an asynchronous Multi-Threshold NULL Convention Logic (MTNCL) “stacked” circuit architecture that alleviates this problem by reducing the number of voltage converters needed to supply the voltage the …

Security Analysis Of The Uconn Husky One Card, Trevor Phillips

Honors Scholar Theses

The “Husky One Card” is the name given to student IDs at the University of Connecticut. It can identify students, faculty, and staff in a variety of situations. The One Card is used for meal plans, Husky Bucks (an equivalent of money, but valid only in the Storrs area), residence hall/ university facility access, and student health services. The current Husky One Card consists of a picture identification on the front and a standard 1-dimensional barcode and 3-track magnetic strip on the back.

The goal of this thesis is to investigate the feasibility of cloning Husky One Cards, the ease …

From Digital Traces To Marketing Insights: Recovering Consumer Preferences For Digital Entertainment Services And Online Shopping, Ai Phuong Hoang

Dissertations and Theses Collection (Open Access)

IT innovations disrupt traditional business models and challenge conventional thinking. Thus, industry incumbents face fierce competition from start-ups with new business models and new ways of engaging customers. Digital entertainment goods and personalized services have become a lucrative market, which has undergone a transformation enabled by seamless Internet connections. Meanwhile, social networks and other online platforms have brought people and business even closer.

Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla

Dissertations and Theses

Many modern computer systems are distributed over space. Well-known examples are the Internet of Things and IBM's TrueNorth for deep learning applications. At the Asynchronous Research Center (ARC) at Portland State University we build distributed hardware systems using self-timed computation and delay-insensitive communication. Where appropriate, self-timed hardware operations can reduce average and peak power, energy, latency, and electromagnetic interference. Alternatively, self-timed operations can increase throughput, tolerance to delay variations, scalability, and manufacturability.

The design of complex hardware systems requires design automation and support for test, debug, and product characterization.

This thesis focuses on design compilation and test support for dataflow …

Annual Report 2017-2018, Depaul University College Of Computing And Digital Media

CDM Annual Reports

LETTER FROM THE DEAN

I am pleased to share with you the College of Computing and Digital Media’s (CDM) 2017-18 annual report, highlighting the many achievements across our community. It was a big year. We began offering five new programs (two bachelor’s, two master’s, and one PhD) across our three schools, in addition to several new certificate programs through our Institute for Professional Development. We built new, cutting-edge spaces to support these and other programs— most notably a 4,500 square-foot makerspace, a robotics and medical engineering lab, an augmented and virtual reality lab, and plans for a cyber-physical systems project …

Toward Biologically-Inspired Self-Healing, Resilient Architectures For Digital Instrumentation And Control Systems And Embedded Devices, Shawkat Sabah Khairullah

Theses and Dissertations

Digital Instrumentation and Control (I&C) systems in safety-related applications of next generation industrial automation systems require high levels of resilience against different fault classes. One of the more essential concepts for achieving this goal is the notion of resilient and survivable digital I&C systems. In recent years, self-healing concepts based on biological physiology have received attention for the design of robust digital systems. However, many of these approaches have not been architected from the outset with safety in mind, nor have they been targeted for the automation community where a significant need exists. This dissertation presents a new self-healing digital …

Implementation Of Switching Circuit Models As Vector Space Transformations, David Kebo Houngninou

Computer Science and Engineering Theses and Dissertations

Modeling of switching circuits is the foundation for many Electronic Design Automation (EDA) tasks and is commonly used at various phases of the design flow for tasks such as simulation, justification, and other analyses. State-of-the-art simulation tools are based on discrete event algorithms using switching algebraic models and are highly optimized and mature. Symbolic simulation may also be implemented using a discrete event approach, or other approaches based on extracted functional models. The common foundation of modern simulation tools is that of a switching or Boolean algebraic model that may be augmented with timing information. Justification using switching circuit models …

Real Time And High Fidelity Quadcopter Tracking System, Tyler Mckay Hall

Computer Engineering

This project was conceived as a desired to have an affordable, flexible and physically compact tracking system for high accuracy spatial and orientation tracking. Specifically, this implementation is focused on providing a low cost motion capture system for future research. It is a tool to enable the further creation of systems that would require the use of accurate placement of landing pads, payload acquires and delivery. This system will provide the quadcopter platform a coordinate system that can be used in addition to GPS.

Field research with quadcopter manufacturers, photographers, agriculture and research organizations were contact and interviewed for information …

Design And Simulation Of An 8-Bit Successive Approximation Register Charge-Redistribution Analog-To-Digital Converter, Sumit K. Verma

Electrical Engineering Theses

The thesis initially investigates the history of the monolithic ADCs. The next chapter explores the different types of ADCs available in the market today. Next, the operation of a 4-bit SAR ADC has been studied. Based on this analysis, an 8-bit charge-redistribution SAR ADC has been designed and simulated with Multisim (National Instruments, Austin, TX). The design is divided into different blocks which are individually implemented and tested. Level-1 SPICE MOSFET models representative of 5μm devices were used wherever individual MOSFETs were used in the design. Finally, the power dissipation during the conversion period was also estimated. The supply voltage …

Oracle Guided Incremental Sat Solving To Reverse Engineer Camouflaged Circuits, Xiangyu Zhang

Masters Theses

This study comprises two tasks. The first is to implement gate-level circuit camouflage techniques. The second is to implement the Oracle-guided incremental de-camouflage algorithm and apply it to the camouflaged designs.

The circuit camouflage algorithms are implemented in Python, and the Oracle- guided incremental de-camouflage algorithm is implemented in C++. During this study, I evaluate the Oracle-guided de-camouflage tool (Solver, in short) performance by de-obfuscating the ISCAS-85 combinational benchmarks, which are camouflaged by the camouflage algorithms. The results show that Solver is able to efficiently de-obfuscate the ISCAS-85 benchmarks regardless of camouflaging style, and is able to do so 10.5x …