Digital Circuits Commons^™

An Iot System For Converting Handwritten Text To Editable Format Via Gesture Recognition, Nidhi Patel

Master of Science in Computer Science Theses

Evaluation of traditional classroom has led to electronic classroom i.e. e-learning. Growth of traditional classroom doesn’t stop at e-learning or distance learning. Next step to electronic classroom is a smart classroom. Most popular features of electronic classroom is capturing video/photos of lecture content and extracting handwriting for note-taking. Numerous techniques have been implemented in order to extract handwriting from video/photo of the lecture but still the deficiency of few techniques can be resolved, and which can turn electronic classroom into smart classroom.

In this thesis, we present a real-time IoT system to convert handwritten text into editable format by implementing …

Purdue Air Sense: A Methodology For Improving The Accuracy Of Ambient Aerosol Mass Concentration And Size Distribution Measurement With Low-Cost Optical Sensing Techniques, Rishabh Ramsisaria, Satya Sundar Patra, Brandon Emil Boor

The Summer Undergraduate Research Fellowship (SURF) Symposium

There is a global lack of a means for monitoring air pollutant levels at a local level due to expensive and bulky instrument requirements. It is important to monitor toxic gas levels, as well as particulate matter levels, in the atmosphere to study their effects on human health and to further develop city- and community-level air pollution solutions. In this study, with the means of a Raspberry Pi, low-cost Alphasense Optical Particle Counter and gas sensors, and methodical calibration techniques, we built a portable 3-D printed module powered by clean electricity generated by an on-board Voltaic solar cell that measures …

Efficacy Of Multi-Threshold Null Convention Logic In Low-Power Applications, Brent Bell

Graduate Theses and Dissertations

In order for an asynchronous design paradigm such as Multi-Threshold NULL Convention Logic (MTNCL) to be adopted by industry, it is important for circuit designers to be aware of its advantages and drawbacks especially with respect to power usage. The power tradeoff between MTNCL and synchronous designs depends on many different factors including design type, circuit size, process node, and pipeline granularity. Each of these design dimensions influences the active power and the leakage power comparisons. This dissertation analyzes the effects of different design dimensions on power consumption and the associated rational for these effects. Results show that while MTNCL …

Investigating On Through Glass Via Based Rf Passives For 3-D Integration, Libo Qian, Jifei Sang, Yinshui Xia, Jian Wang, Peiyi Zhao

Mathematics, Physics, and Computer Science Faculty Articles and Research

Due to low dielectric loss and low cost, glass is developed as a promising material for advanced interposers in 2.5-D and 3-D integration. In this paper, through glass vias (TGVs) are used to implement inductors for minimal footprint and large quality factor. Based on the proposed physical structure, the impact of various process and design parameters on the electrical characteristics of TGV inductors is investigated with 3-D electromagnetic simulator HFSS. It is observed that TGV inductors have identical inductance and larger quality factor in comparison with their through silicon via counterparts. Using TGV inductors and parallel plate capacitors, a compact …

Genetic Algorithm Amplifier Biasing System (Gaabs): Genetic Algorithm For Biasing On Differential Analog Amplifiers, Sean Whalen

Computer Engineering

Genetic Algorithm Amplifier Biasing System (GAABS) - Senior Project Analysis

Summary of Functional Requirements

This project integrates LTSpice with a python script that runs a genetic algorithm to bias a differential amplifier. The system biases the amplifier with 2 different voltages, the base voltage for the PNP BJTs of the active loads and a voltage controlling the current of the current sink. The project runs via a python script, gets data from LTSpice’s command line call, and iteratively runs until the system is biased to achieve the greatest gain on an arbitrary input voltage.

Primary Constraints

Some of the main …

Analog Sorting Using Pulse Width Modulation, Riley C. Olson

Computer Engineering

As time goes on, computers become more and more powerful. However, as processing time becomes less of a limiting factor for computing tasks, power consumption takes its place for many tasks. This paper proposes and tests a new method for sorting analog signals. This new sorting method converts analog signals into Pulse Width Modulated(PWM) signals of varying duty cycle , which are then sorted by a simple network of combinational logic, and then converted to a normal binary representation. In order to implement this new method, multiple circuits had to be designed and and tested to ensure their functionality and …

Modular Injection System And Sampling Template (M.I.S.S.T) Design Report, Froylan M. Aguirre

Computer Engineering

Digital systems are ubiquitous throughout modern life and their applications continue to grow. Thus system designers engineer and test modular systems to mitigate error rates. Smaller systems and their increasing importance in many applications demand the utmost reliability. Fault injection is the most common method used by researchers and engineers to test system reliability. However, most hardware fault injection implementations are ad hoc and only used to test a specific system or for specific tests. There is also software-implemented fault injection that adds overhead in the benchmark source code. The aim of this project is to develop a general use, …

Roborodentia Robot: Treadbot, Stephen C. Schmidt

Computer Science and Software Engineering

This document is a summary of my contest entry to the 2018 Cal Poly Roborodentia competition. It is meant to be a process overview and design outline of the mechanical, electrical, and software components of my robot.

Arm Mke1xf Mcu Replatform, Nathan Hong, Derek Lung, Japsimran Singh, Bevin Tang

Computer Engineering

After Cal Poly Racing’s electrical team began to hit the technical limits of the ADC and other I/O features of the current 8-bit Atmel AT90 microcontroller unit, it became clear that an upgrade was due. This replatforming project takes the functionalities of the old, 8-bit architecture, and aims to provide a 32-bit version using the ARM MKE1xF MCU. With the idea of having a working PCB as a stretch goal, the scope of the library development was limited to enable base functionality. Thus, the only libraries developed were for the Timer, ADC, SPI, UART, and CAN. Additionally, this document discusses …

A Basic, Four Logic Cluster, Disjoint Switch Connected Fpga Architecture, Joseph Prachar

Computer Engineering

This paper seeks to describe the process of developing a new FPGA architecture from nothing, both in terms of knowledge about FPGAs and in initial design material. Specifically, this project set out to design an FPGA architecture which can implement a simple state machine type design with 10 inputs, 10 outputs and 10 states. The open source Verilog-to-Routing FPGA CAD flow tool was used in order to synthesize, place, and route HDL files onto the architecture. This project was completed in terms of the spirit of the original goals of implementing an FPGA from scratch. Although, the project resulted in …

Bicycle Power Meter, Andrew Mcguan

Computer Engineering

A power meter is a cycling training tool used to record the power a rider is outputting. This is very useful to athletes who regularly do bike workouts, because the power output is a consistent measure of the rider’s effort level, and is not affected by outside factors such as wind or road gradient. If a cyclist does a workout with the intent to carry a certain speed for a certain amount of time, a strong headwind will slow them down and make them work harder to maintain the same speed, defeating the goal of the workout. When a power …

Automating Knife-Edge Method Of Thz Beam Characterization, Christopher Charles Faber

Maseeh Summer Undergraduate Research Experience

The goal of this project is to create a time and cost-effective solution for THz beam profiling.

The knife edge method of beam characterization is a technique to verify the intensity profile of a beam involving traveling a blade orthogonal to the beam path and measuring transmission in successive steps. We use a vector network analyzer (VNA) to measure S21 transmission from a THz source. Manual implementation of this method was time-consuming and inefficient.

Project hardware includes an Arduino, a motor shield, and a ball screw linear rail with stepper motor actuator. Software was created in LabView and data is …

Laser-Scribed Graphene Micro-Supercapacitors, Kimi D. Owens

Maseeh Summer Undergraduate Research Experience

M. F. El-Kady and R. B. Kaner, “Scalable fabrication of high-power graphene micro-supercapacitors for flexible and on-chip energy storage,” Nature Communications, vol. 4, p. 1475, Feb. 2013.

Supercapacitors are electrical components that have higher energy density than regular capacitors. Currently, they are large and bulky which makes it hard to be implemented into smaller electronic devices or on-chip. In Scalable Fabrication of High-power Graphene Micro-supercapacitors for Flexible and On-chip Energy Storage, El-Kady and Kaner developed an inexpensive and reliable method for scaling down supercapacitors to be approximately 7.53 x 5.35 mm. To make the laser-scribed graphene (LSG) micro-supercapacitors, an aqueous …

Improving System-On-Chip Test Networks For: Bandwidth, Security, And Power, Saurabh Gupta

Computer Science and Engineering Theses and Dissertations

Modern System-on-Chips (SoCs) provide benefits such as reduction in overall system cost, and size, increased performance, and lower power consumption. Increasing complexity of these Integrated Circuits (ICs) has resulted in a higher probability of manufacturing defects. Manufacturing defects can result in the faulty operation of a system. Thus, it is essential to test an IC after it is manufactured to detect any possible faults in it. These SoCs include on-chip embedded instruments that can be used for test, debug, diagnosis, validation, monitoring, characterization, configuration, or functional purposes. IEEE 1687 Std. (IJTAG) provides a standard interface for the reconfigurable access and …

Comparison Of Data Transfer Alternatives In Asynchronous Circuits, Mark Howard

Computer Science and Computer Engineering Undergraduate Honors Theses

Digital integrated circuits (ICs) have become progressively complex in their functionality. This has sped up the demand for asynchronous architectures, which operate without any clocking scheme, considering new challenges in the timing of synchronous systems. Asynchronous ICs have less stringent environmental constraints and are capable of maintaining reliable operation in extreme environments, while also enjoying potential benefits such as low power consumption, high modularity, and improved performance. However, when the traditional bus architecture of synchronous systems is applied to asynchronous designs, handshaking protocols required for asynchronous circuit operation result in significantly increased power consumption, offsetting the low power benefit of …

Automatic Testing In The United States Air Force, Pearson Wade

Computer Science and Computer Engineering Undergraduate Honors Theses

The need for standardized Automatic Testing Equipment in the United States Department of Defense has brought about new policies and procedures within entities like the United States Air Force. The diversity and lifespan of systems such as jets, missiles, drones, and other electronics have brought on the need for a new system known as the Versatile Depot Automatic Test Station, or VDATS. The VDATS handles the automatic testing of replaceable digital circuits from different systems. I was introduced to this system firsthand during my time as an intern at Tinker AFB, Oklahoma. This new standardized approach to testing a diverse …

Security Analysis Of The Uconn Husky One Card, Trevor Phillips

Honors Scholar Theses

The “Husky One Card” is the name given to student IDs at the University of Connecticut. It can identify students, faculty, and staff in a variety of situations. The One Card is used for meal plans, Husky Bucks (an equivalent of money, but valid only in the Storrs area), residence hall/ university facility access, and student health services. The current Husky One Card consists of a picture identification on the front and a standard 1-dimensional barcode and 3-track magnetic strip on the back.

The goal of this thesis is to investigate the feasibility of cloning Husky One Cards, the ease …

Asynchronous Circuit Stacking For Simplified Power Management, Andrew Lloyd Suchanek

Graduate Theses and Dissertations

As digital integrated circuits (ICs) continue to increase in complexity, new challenges arise for designers. Complex ICs are often designed by incorporating multiple power domains therefore requiring multiple voltage converters to produce the corresponding supply voltages. These converters not only take substantial on-chip layout area and/or off-chip space, but also aggregate the power loss during the voltage conversions that must occur fast enough to maintain the necessary power supplies. This dissertation work presents an asynchronous Multi-Threshold NULL Convention Logic (MTNCL) “stacked” circuit architecture that alleviates this problem by reducing the number of voltage converters needed to supply the voltage the …

From Digital Traces To Marketing Insights: Recovering Consumer Preferences For Digital Entertainment Services And Online Shopping, Ai Phuong Hoang

Dissertations and Theses Collection (Open Access)

IT innovations disrupt traditional business models and challenge conventional thinking. Thus, industry incumbents face fierce competition from start-ups with new business models and new ways of engaging customers. Digital entertainment goods and personalized services have become a lucrative market, which has undergone a transformation enabled by seamless Internet connections. Meanwhile, social networks and other online platforms have brought people and business even closer.

Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla

Dissertations and Theses

Many modern computer systems are distributed over space. Well-known examples are the Internet of Things and IBM's TrueNorth for deep learning applications. At the Asynchronous Research Center (ARC) at Portland State University we build distributed hardware systems using self-timed computation and delay-insensitive communication. Where appropriate, self-timed hardware operations can reduce average and peak power, energy, latency, and electromagnetic interference. Alternatively, self-timed operations can increase throughput, tolerance to delay variations, scalability, and manufacturability.

The design of complex hardware systems requires design automation and support for test, debug, and product characterization.

This thesis focuses on design compilation and test support for dataflow …