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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems

Nonlinear Guidance And Control Of Unmanned Aerial Manipulators For Delivering A Payload On A Moving Platform, Ravi Gyawali Jan 2024

Nonlinear Guidance And Control Of Unmanned Aerial Manipulators For Delivering A Payload On A Moving Platform, Ravi Gyawali

Mechanical and Aerospace Engineering Theses - Archive

Unmanned Aerial manipulators (UAMs) are a class of Unmanned Aerial Vehicles (UAVs) equipped with a manipulator. By combining the aerial mobility of a UAV with a manipulator's dexterity, these hybrid systems can perform a wide range of complex tasks while reducing risks and costs. As a result, they are increasingly being utilized for military, industrial, and agricultural applications.

The thesis presents a novel approach for a multi-UAM system to collaboratively deliver a payload on a stationary or maneuvering platform. A sliding-mode-based guidance law, sourced from existing literature, is integrated with a combined control technique for the UAVs and their respective …


Exploring Machine Learning Techniques For Embedded Hardware, Neel R. Vora Jan 2024

Exploring Machine Learning Techniques For Embedded Hardware, Neel R. Vora

Computer Science and Engineering Theses - Archive

This thesis delves into the intricate symbiosis between machine learning (ML) methodologies and embedded hardware systems, with a primary focus on augmenting efficiency and real-time processing capabilities across diverse application domains. It confronts the formidable challenge of deploying sophisticated ML algorithms on resource-constrained embedded hardware, aiming not only to optimize performance but also to minimize energy consumption. Innovative strategies are explored to tailor ML models for streamlined execution on embedded platforms, with validation conducted across various real-world application domains. Notable contributions include the development of a deep-learning framework leveraging a variational autoencoder (VAE) for compressing physiological signals from wearables while …


Reinventing Integrated Photonic Devices And Circuits For High Performance Communication And Computing Applications, Venkata Sai Praneeth Karempudi Jan 2024

Reinventing Integrated Photonic Devices And Circuits For High Performance Communication And Computing Applications, Venkata Sai Praneeth Karempudi

Theses and Dissertations--Electrical and Computer Engineering

The long-standing technological pillars for computing systems evolution, namely Moore's law and Von Neumann architecture, are breaking down under the pressure of meeting the capacity and energy efficiency demands of computing and communication architectures that are designed to process modern data-centric applications related to Artificial Intelligence (AI), Big Data, and Internet-of-Things (IoT). In response, both industry and academia have turned to 'more-than-Moore' technologies for realizing hardware architectures for communication and computing. Fortunately, Silicon Photonics (SiPh) has emerged as one highly promising ‘more-than-Moore’ technology. Recent progress has enabled SiPh-based interconnects to outperform traditional electrical interconnects, offering advantages like high bandwidth density, …


A Novel Processor Architecture Implementing The Stacked Error Diffusion Algorithm And Its Zynq-Based Realization, Qishi Hu Jan 2024

A Novel Processor Architecture Implementing The Stacked Error Diffusion Algorithm And Its Zynq-Based Realization, Qishi Hu

Theses and Dissertations--Electrical and Computer Engineering

Digital halftoning reproduces continuous-tone images using patterns of black and white dots, while multitoning extends this concept by incorporating inks with intermediate intensities. These techniques are extensively utilized in the printing industry to accommodate the limited range of inks available in printers. Stacked error diffusion is a high-quality multitoning algorithm that adheres to the blue-noise dithering standard. This thesis research studies the potential parallelism inherent in the algorithm and introduces the design of a novel processor architecture optimized for efficient execution. The architecture is realized on an FPGA development board featuring a Zynq SoC. Additionally, the hardware prototype can also …


Gen-Acceleration: Pioneering Work For Hardware Accelerator Generation Using Large Language Models, Durga Lakshmi Venkata Deepak Vungarala Dec 2023

Gen-Acceleration: Pioneering Work For Hardware Accelerator Generation Using Large Language Models, Durga Lakshmi Venkata Deepak Vungarala

Theses

Optimizing computational power is critical in the age of data-intensive applications and Artificial Intelligence (AI)/Machine Learning (ML). While facing challenging bottlenecks, conventional Von-Neumann architecture with implementing such huge tasks looks seemingly impossible. Hardware Accelerators are critical in efficiently deploying these technologies and have been vastly explored in edge devices. This study explores a state-of-the-art hardware accelerator; Gemmini is studied; we leveraged the open-sourced tool. Furthermore, we developed a Hardware Accelerator in the study we compared with the Non-Von-Neumann architecture. Gemmini is renowned for efficient matrix multiplication, but configuring it for specific tasks requires manual effort and expertise. We propose implementing …


Resilient, Sustainable, And Secure Systems Support For Ultra-Low-Power Computational Things, Nicole Tobias Dec 2023

Resilient, Sustainable, And Secure Systems Support For Ultra-Low-Power Computational Things, Nicole Tobias

All Dissertations

Wireless battery-free and energy-harvesting devices are expanding the reach and vision of the Internet of Things, where trillions of embedded computational things interconnect ubiquitously around us and inform many different aspects of our everyday lives. Designing these systems without batteries and interconnecting wires lowers maintenance, environmental, and economic costs while also extending device lifetime and deployment opportunities. Over the last decade, research on these ultra-low-power embedded sensors and systems has dramatically increased — enabling new and exciting prospects in many different scientific fields, from smart building and health monitoring applications to animal and activity tracking.

These systems are not without …


Electronic Note-String Detector, Gavin Garcia-Rossi, Tommy Smail Dec 2023

Electronic Note-String Detector, Gavin Garcia-Rossi, Tommy Smail

Electrical Engineering

As the virtual space has become a dominant part of everyone’s day-to-day lives, many normal face-to-face interactions and services have not yet been facilitated by adapting technology. One of these prevailing areas is music lessons. Over Zoom meetings, or other virtual platforms, it is tremendously challenging to teach students. These challenges include recognizing student mistakes audibly and visually, and being able to give confident feedback on the incorrect notes played by learning musicians. Without having to delve into improving the complex systems that would be required to improve audio, video, and connection quality of these connections, we have another solution …


Low-Power, Event-Driven System On A Chip For Charge Pulse Processing Applications, Joseph A. Schmitz Dec 2023

Low-Power, Event-Driven System On A Chip For Charge Pulse Processing Applications, Joseph A. Schmitz

Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research

This dissertation presents an electronic architecture and methodology capable of processing charge pulses generated by a range of sensors, including radiation detectors and tactile synthetic skin. These sensors output a charge signal proportional to the input stimulus, which is processed electronically in both the analog and digital domains. The presented work implements this functionality using an event-driven methodology, which greatly reduces power consumption compared to standard implementations. This enables new application areas that require a long operating time or compact physical dimensions, which would not otherwise be possible. The architecture is designed, fabricated, and tested in the aforementioned applications to …


Qasm-To-Hls: A Framework For Accelerating Quantum Circuit Emulation On High-Performance Reconfigurable Computers, Anshul Maurya Dec 2023

Qasm-To-Hls: A Framework For Accelerating Quantum Circuit Emulation On High-Performance Reconfigurable Computers, Anshul Maurya

Theses and Dissertations

High-performance reconfigurable computers (HPRCs) make use of Field-Programmable Gate Arrays (FPGAs) for efficient emulation of quantum algorithms. Generally, algorithm-specific architectures are implemented on the FPGAs and there is very little flexibility. Moreover, mapping a quantum algorithm onto its equivalent FPGA emulation architecture is challenging. In this work, we present an automation framework for converting quantum circuits to their equivalent FPGA emulation architectures. The framework processes quantum circuits represented in Quantum Assembly Language (QASM) and derives high-level descriptions of the hardware emulation architectures for High-Level Synthesis (HLS) on HPRCs. The framework generates the code for a heterogeneous architecture consisting of a …


Accelerating Machine Learning Inference For Satellite Component Feature Extraction Using Fpgas., Andrew Ekblad Dec 2023

Accelerating Machine Learning Inference For Satellite Component Feature Extraction Using Fpgas., Andrew Ekblad

Theses and Dissertations

Running computer vision algorithms requires complex devices with lots of computing power, these types of devices are not well suited for space deployment. The harsh radiation environment and limited power budgets have hindered the ability of running advanced computer vision algorithms in space. This problem makes running an on-orbit servicing detection algorithm very difficult. This work proposes using a low powered FPGA to accelerate the computer vision algorithms that enable satellite component feature extraction. This work uses AMD/Xilinx’s Zynq SoC and DPU IP to run model inference. Experiments in this work centered around improving model post processing by creating implementations …


Custom Led Dashboard Integration For The Cal Poly Racing Team, Josue Hernandez Nov 2023

Custom Led Dashboard Integration For The Cal Poly Racing Team, Josue Hernandez

Computer Engineering

The Custom LED Dashboard Integration was made for the Cal Poly Racing Team, specifically the BAJA division. The dashboard was made as a way to combat the current limitations endured from the past methods used to display critical information of the vehicle to the car. The display was made to combat issues of limited quantity of data being able to be displayed to the driver and its small readability was an issue, the display helped combat that by providing a greater quantity of data being able to be sent and displayed on the display and the information being displayed having …


Sel4 On Risc-V - Developing High Assurance Platforms With Modular Open-Source Architectures, Michael A. Doran Jr Aug 2023

Sel4 On Risc-V - Developing High Assurance Platforms With Modular Open-Source Architectures, Michael A. Doran Jr

Masters Theses

Virtualization is now becoming an industry standard for modern embedded systems. Modern embedded systems can now support multiple applications on a single hardware platform while meeting power and cost requirements. Virtualization on an embedded system is achieved through the design of the hardware-software interface. Instruction set architecture, ISA, defines the hardware-software interface for an embedded system. At the hardware level the ISA, provides extensions to support virtualization.

In addition to an ISA that supports hypervisor extensions it is equally important to provide a hypervisor completely capable of exploiting the benefits of virtualization for securing modern embedded systems. Currently there does …


Neural Compression Inference Accelerator: A Cost And Energy-Effective Alternative To Conventional Machine Learning Inference Methods, Matthew Wallace Jun 2023

Neural Compression Inference Accelerator: A Cost And Energy-Effective Alternative To Conventional Machine Learning Inference Methods, Matthew Wallace

Master's Theses

Recent developments in machine learning and artificial intelligence have sparked an influx of workloads that require specialized computer hardware for cloud services. The hardware running machine learning models predominantly consists of graphics processing units (GPUs) and tensor processing units (TPUs). However, these com- ponents are expensive for cloud services to purchase, costly for customers to rent, prone to price spikes, and energy-intensive. In this research we show that both cloud services and customers would benefit from utilizing field programmable gate arrays (FPGAs) to alleviate the aforementioned challenges. An FPGA can be configured as a machine learning accelerator, operating similarly to …


Using An Embedded System For A Quality Cup Of Coffee, Evan Powers, Joshua Stermer, Tsion Yohannes May 2023

Using An Embedded System For A Quality Cup Of Coffee, Evan Powers, Joshua Stermer, Tsion Yohannes

2023 Symposium

Many coffee lovers spend up to $5 on a cup of coffee everyday. To save money one could make them at home, but a quality machine with PIDs start at $1000. Using an embedded system one could spend less than $50 and a few hours implement PIDs into an existing $400 machine that will last a lifetime. microcontroller. Learning C language combined with hardware implementation applied to cheap and simple everyday objects can improve everyday quality of life and save money.

This is challenging because we have to incorporate the additional circuitry into a pre established circuit with limited space, …


Vi Energy-Efficient Memristor-Based Neuromorphic Computing Circuits And Systems For Radiation Detection Applications, Jorge Iván Canales Verdial May 2023

Vi Energy-Efficient Memristor-Based Neuromorphic Computing Circuits And Systems For Radiation Detection Applications, Jorge Iván Canales Verdial

Electrical and Computer Engineering ETDs

Radionuclide spectroscopic sensor data is analyzed with minimal power consumption through the use of neuromorphic computing architectures. Memristor crossbars are harnessed as the computational substrate in this non-conventional computing platform and integrated with CMOS-based neurons to mimic the computational dynamics observed in the mammalian brain’s visual cortex. Functional prototypes using spiking sparse locally competitive approximations are presented. The architectures are evaluated for classification accuracy and energy efficiency. The proposed systems achieve a 90% true positive accuracy with a high-resolution detector and 86% with a low-resolution detector.


Phone Microwave, Khanh Kim Hoang, Emily Zhou Mar 2023

Phone Microwave, Khanh Kim Hoang, Emily Zhou

Computer Engineering

This project involves the installation of remote-control capabilities in an antique 1980s microwave, effectively turning the microwave into a “smart” device. While preserving the original functionality of the microwave, a combination of software and hardware components allows for remote microwave operations. The microwave can be remotely operated by calling the built-in number, and more advanced settings and options can be utilized by texting. The microwave is also secured against unauthorized use with the addition of a PIN code that is required to operate the device.


Performance Evaluation Of Face Mask Detection For Real-Time Implementation On An Rpi, Ivan George L. Tarun, Vidal Wyatt M. Lopez, Pamela Anne C. Serrano, Patricia Angela R. Abu, Rosula Reyes, Ma. Regina Justina Estuar Jan 2023

Performance Evaluation Of Face Mask Detection For Real-Time Implementation On An Rpi, Ivan George L. Tarun, Vidal Wyatt M. Lopez, Pamela Anne C. Serrano, Patricia Angela R. Abu, Rosula Reyes, Ma. Regina Justina Estuar

Department of Information Systems & Computer Science Faculty Publications

Mask-wearing remains to be one of the primary protective measures against COVID-19. To address the difficulty of manual compliance monitoring, face mask detection models considerate of both frontal and angled faces were developed. This study aimed to test the performance of the said models in classifying multi-face images and upon running on a Raspberry Pi device. The accuracies and inference speeds were measured and compared when inferencing images with one, two, and three faces and on the desktop and the Raspberry Pi. With an increasing number of faces in an image, the models’ accuracies were observed to decline, while their …


Towards Multipronged On-Chip Memory And Data Protection From Verification To Design And Test, Senwen Kan, Jennifer Dworak Dec 2022

Towards Multipronged On-Chip Memory And Data Protection From Verification To Design And Test, Senwen Kan, Jennifer Dworak

Computer Science and Engineering Theses and Dissertations

Modern System on Chips (SoCs) generally include embedded memories, and these memories may be vulnerable to malicious attacks such as hardware trojan horses (HTHs), test access port exploitation, and malicious software. This dissertation contributes verification as well as design obfuscation solutions aimed at design level detection of memory HTH circuits as well as obfuscation to prevent HTH triggering for embedded memory during functional operation. For malicious attack vectors stemming from test/debug interfaces, this dissertation presents novel solutions that enhance design verification and securitization of an IJTAG based test access interface. Such solutions can enhance SoC protection by preventing memory test …


Low Power Multi-Channel Interface For Charge Based Tactile Sensors, Samuel Hansen Dec 2022

Low Power Multi-Channel Interface For Charge Based Tactile Sensors, Samuel Hansen

Department of Electrical and Computer Engineering: Dissertations, Theses, and Student Research

Analog front end electronics are designed in 65 nm CMOS technology to process charge pulses arriving from a tactile sensor array. This is accomplished through the use of charge sensitive amplifiers and discrete time filters with tunable clock signals located in each of the analog front ends. Sensors were emulated using Gaussian pulses during simulation. The digital side of the system uses SAR (successive approximation register) ADCs for sampling of the processed sensor signals.

Adviser: Sina Balkır


Algorithm Optimization And Hardware Acceleration For Machine Learning Applications On Low-Energy Systems, Jianchi Sun Aug 2022

Algorithm Optimization And Hardware Acceleration For Machine Learning Applications On Low-Energy Systems, Jianchi Sun

All Dissertations

Machine learning (ML) has been extensively employed for strategy optimization, decision making, data classification, etc. While ML shows great triumph in its application field, the increasing complexity of the learning models introduces neoteric challenges to the ML system designs. On the one hand, the applications of ML on resource-restricted terminals, like mobile computing and IoT devices, are prevented by the high computational complexity and memory requirement. On the other hand, the massive parameter quantity for the modern ML models appends extra demands on the system's I/O speed and memory size. This dissertation investigates feasible solutions for those challenges with software-hardware …


Smartphone Control Of Rc Cars, Weston R. Fitzgerald Jun 2022

Smartphone Control Of Rc Cars, Weston R. Fitzgerald

Electrical Engineering

The smartphone-controlled RC (remote-controlled) car is an inexpensive remote-controlled car designed to be fast and portable. Instead of manufacturing, packaging, and shipping a separate controller, the remote control is implemented in a phone application, which saves time and money in both the design process and the manufacturing process. Utilizing the user’s smartphone is more cost-effective since mobile devices are a common recurrence, and packaging fewer devices results in overall better portability of the product.

This smartphone-controlled car is speedy and intuitive to learn for typical smartphone users. The user can change the car’s speed and direction wirelessly using their phone; …


Mars Prototype Rover Environmental Measurement System, James A. Renick Jun 2022

Mars Prototype Rover Environmental Measurement System, James A. Renick

Computer Engineering

In my senior project, the problem I am trying to solve is how to efficiently design, create, and install an original library onto a Mars prototype rover operating system and to further use that library to integrate a new weather measurement sensor device into the rover system with the necessary software and hardware implementations. This is an important and highly valued problem as many aerospace and other engineering companies utilize rovers and other autonomous systems for important research, explorations, and reconnaissance missions and goals. In solving this problem, I utilized many resources that were available to me such as advisors, …


Combat Robot, Wayne Lambert, Elijah Harris, Brian Eiseman, Jordan Meyer Apr 2022

Combat Robot, Wayne Lambert, Elijah Harris, Brian Eiseman, Jordan Meyer

ONU Student Research Colloquium

The senior capstone project that was tasked to the team was the decision of choosing a challenge within a national robotics competition. The group decided to compete at the National Robotics Challenge in Marion, Ohio. The idea was to participate in the combat robot competition at this NRC event. Once this decision had been made the next steps were to get an idea of what the rules and requirements of the competition were and to try and to sketch a very rough drawing of what the ideal robot should look like. From there it was decided to start a timeline …


Smart Bike Aftermarket System (Sbams), Noah Lamadanie, Jack Bullock, Dawson Beachy, John Albrecht Jan 2022

Smart Bike Aftermarket System (Sbams), Noah Lamadanie, Jack Bullock, Dawson Beachy, John Albrecht

Williams Honors College, Honors Research Projects

The Smart Bike Aftermarket System will be a set of connected modules, which, when installed on a standard bicycle, will allow it to mimic some of the safety and quality-of-life functionalities of an E-bike. The most notable of these safety features is an ability to detect vehicles approaching from behind and alert the user of potential collisions. The system will also implement lighting (Headlights, taillights, and turn signals), and a coupled application so a user can view more advanced information about their cycling. The primary advantage of this system over a standard E-bike is that it will have a lower …


Design, Extraction, And Optimization Tool Flows And Methodologies For Homogeneous And Heterogeneous Multi-Chip 2.5d Systems, Md Arafat Kabir Dec 2021

Design, Extraction, And Optimization Tool Flows And Methodologies For Homogeneous And Heterogeneous Multi-Chip 2.5d Systems, Md Arafat Kabir

Graduate Theses and Dissertations

Chip and packaging industries are making significant progress in 2.5D design as a result of increasing popularity of their application. In advanced high-density 2.5D packages, package redistribution layers become similar to chip Back-End-of-Line routing layers, and the gap between them scales down with pin density improvement. Chiplet-package interactions become significant and severely affect system performance and reliability. Moreover, 2.5D integration offers opportunities to apply novel design techniques. The traditional die-by-die design approach neither carefully considers these interactions nor fully exploits the cross-boundary design opportunities.

This thesis presents chiplet-package cross-boundary design, extraction, analysis, and optimization tool flows and methodologies for high-density …


Energy Efficient Computing Using Scalable General Purpose Analog Processors, Ethan Paul Palisoc De Guzman Jun 2021

Energy Efficient Computing Using Scalable General Purpose Analog Processors, Ethan Paul Palisoc De Guzman

Master's Theses

Due to fundamental physical limitations, conventional digital circuits have not been able to scale at the pace expected from Moore’s law. In addition, computationally intensive applications such as neural networks and computer vision demand large amounts of energy from digital circuits. As a result, energy efficient alternatives are needed in order to provide continued performance scaling. Analog circuits have many well known benefits: the ability to store more information onto a single wire and efficiently perform mathematical operations such as addition, subtraction, and differential equation solving. However, analog computing also comes with drawbacks such as its sensitivity to process variation …


Smart E-Bike Conversion Kit And Helmet, Megan West, Marena Trujillo, Hossein Asghari May 2021

Smart E-Bike Conversion Kit And Helmet, Megan West, Marena Trujillo, Hossein Asghari

Honors Thesis

With many state governments across the United States implementing shutdowns to prevent the spread of COVID-19, many bike retailers have seen dramatic increases in bike sales. Electric bicycles (e-bikes) have become increasingly popular as the public searches for alternatives to public transportation. Unfortunately, e-bike users assume some risk by riding bikes that are faster than conventional bicycles. While kits to convert conventional bicycles to e-bikes exist, no “smart” e-bike/helmet kit specifically designed to keep the user safe is currently available on the market. To mitigate risks, a smart e-bike conversion kit with multiple novel safety features, including auditory and visual …


Side Channel Attack Counter Measure Using A Moving Target Architecture, Jithin Joseph Apr 2021

Side Channel Attack Counter Measure Using A Moving Target Architecture, Jithin Joseph

Electrical and Computer Engineering ETDs

A novel countermeasure to side-channel power analysis attacks called Side-channel Power analysis Resistance for Encryption Algorithms using DPR or SPREAD is investigated in this thesis. The countermeasure leverages a strategy that is best characterized as a moving target architecture. Modern field programmable gate arrays (FPGA) architectures provide support for dynamic partial reconfiguration (DPR), a feature that allows real-time reconfiguration of the programmable logic (PL). The moving target architecture proposed in this work leverages DPR to implement a power analysis countermeasure to side-channel attacks, the most common of which are referred to as differential power analysis (DPA) and correlation power analysis …


Design Project: Smart Headband, John Michel, Jack Durkin, Noah Lewis Jan 2021

Design Project: Smart Headband, John Michel, Jack Durkin, Noah Lewis

Williams Honors College, Honors Research Projects

Concussion in sports is a prevalent medical issue. It can be difficult for medical professionals to diagnose concussions. With the fast pace nature of many sports, and the damaging effects of concussions, it is important that any concussion risks are assessed immediately. There is a growing trend of wearable technology that collects data such as steps and provides the wearer with in-depth information regarding their performance. The Smart Headband project created a wearable that can record impact data and provide the wearer with a detailed analysis on their risk of sustaining a concussion. The Smart Headband uses accelerometers and gyroscopes …


Automated Blind Control, Daniel Nahra, Matthew Lacek, Timothy Kurczewski, William Daulton Baksa Jan 2021

Automated Blind Control, Daniel Nahra, Matthew Lacek, Timothy Kurczewski, William Daulton Baksa

Williams Honors College, Honors Research Projects

The objective of this project would be to design and prototype an automated, light and temperature sensing window blinds system. The device would detect temperature, both inside and outside, and incoming sunlight to determine proper window blind position for maximum energy savings. The user would also have the ability to change the settings of the blind from a remote device to a setting that they desire at any given time