VLSI and Circuits, Embedded and Hardware Systems Commons^™

Polysaber: A Custom Reactive Lightsaber Soundboard, Pedro B. Medeiros

Computer Engineering

The PolySaber project was developed as a custom reactive lightsaber control system built as a fully custom PCB design. The purpose of the project was to create a lower-cost and more customizable alternative to commercially available lightsaber soundboards while simultaneously providing hands-on experience in PCB design, embedded systems development, and hardware integration. Commercial lightsaber soundboards are expensive, proprietary, and difficult for hobbyists to customize. The PolySaber project addresses this by creating a modifiable hardware platform built around the ESP32 microcontroller. The system supports programmable firmware, RGB NeoPixel blade control, motion sensing, reactive swing and clash effects, onboard audio amplification, and …

Retinomorphic Mid-Wave Infrared In-Sensor Processing Engine: Device-To-Architecture Co-Design, Hemalatha Nagaraju

Theses

Conventional frame-based CMOS image sensors acquire full-frame pixel data at discrete time intervals, resulting in substantial spatial redundancy and loss of temporal information between frames. The repeated conversion and transfer of redundant pixel data increases bandwidth and power consumption in machine vision systems. Retinomorphic sensing architectures address these limitations by enabling programmable, analog-domain processing directly at the sensor interface. A compact behavioral model of the PbSe device is developed in HSPICE based on calibrated TCAD simulation data to capture gate-controlled photocurrent modulation under varying illumination and gate bias conditions. Error analysis is performed to quantify the deviation between TCAD-generated photocurrent …

Holistic Dram Enhancements: From Intrinsic In-Memory Operations To Robust Security Mechanisms, Ranyang Zhou

Dissertations

Dynamic Random-Access Memory (DRAM) is both the performance bottleneck and a critical security boundary of modern computing systems. Its physical properties make it an attractive substrate for near-data computation—yet those same properties expose it to disturbance-based hardware attacks. This dissertation argues that these two dimensions are not independent: the architectural choices that make DRAM efficient also reshape its threat landscape. Addressing both requires a unified approach to memory architecture and security co-design.

The first part of this dissertation attacks the memory wall through four processing-in-DRAM (PIM) frameworks. ReD-LUT and LT-PIM unify lookup-table arithmetic with charge-sharing logic, achieving up to 37.8x …

A Full System Co-Simulation Platform For Evaluating Edge Machine Learning Inference Using Compute-In-Memory, Belsen Lee

Electrical Engineering and Computer Science (MS) Theses

We present a full-system co-simulation platform for evaluating embedded machine learning (ML) inference using compute-in-memory (CIM). CIM architectures aim to reduce data movement overhead by performing matrix operations in memory, but end-to-end benefits depend on system-level integration costs that are difficult to assess with isolated hardware models alone. To address this gap, we develop an integrated RISC-V QEMU-SystemC co-simulation environment that allows standard embedded Linux to interact with a transaction-level CIM accelerator model via memory-mapped I/O, direct memory access (DMA), and interrupts. To evaluate performance, we benchmark an MNIST image inference workload and a synthetic fully connected neural network, comparing …

Design And Verification Of The Multi-Slit Solar Explorer Camera Field Programmable Gate Arrays, Jordan M. Johnson

All Graduate Reports and Creative Projects, Fall 2023 to Present

The Multi-Slit Solar Explorer, or MUSE, is a NASA mission that will take images of the Sun to study solar flares and the solar corona. The mission will provide insight into the mechanisms behind space weather. The mission consists of two cameras: the Spectrograph (SG), and the Context Imager (CI). The Utah State University Space Dynamics Laboratory is providing both cameras for the mission.

This report describes a part of the design and verification process for a central component on these cameras known as the Field Programmable Gate Arrays (FPGAs). These FPGAs are programmed to acquire, handle, and send images …

Robust Hardware Trojan Detection Leveraging Dual‑Domain Features And Stacked Ensemble Learning, Sefatun-Noor Puspa

All Theses

In Cyber-physical systems rely on sensors, communication, and computing, all powered by integrated circuits (ICs). These ICs are vulnerable to malicious hardware attacks, with hardware Trojans being one of the stealthiest threats. Trojans are malicious implants in the circuitry, which are often inserted during design or fabrication stages. This stealthy addition remains dormant until triggered and might cause functional disruptions or sensitive information leakage once triggered. Traditional IC validation methods, such as functional testing and logic analysis, usually fail to capture these subtle anomalies because hardware Trojans are intentionally designed to mimic normal circuit behavior. They often remain dormant under …

Design Of An Extensible And Scalable Data Acquisition System For Pulse Shape Discrimination, Prince John

McKelvey School of Engineering Graduate Student Theses & Dissertations

This thesis presents the design and development of a highly scalable, end-to-end data acquisition (DAQ) system for nuclear physics experiments that can be deployed in configurations ranging from a few to thousands of detector channels. The system is built as an extensible platform composed of modular 16-channel chipboards that support a wide range of scintillator and detector types and perform real-time, on-board data sparsification and pulse-shape processing. Three versions of the chipboard have been fabricated to date.

The DAQ architecture is based on a family of analog pulse-shape-processing application- specific integrated circuits (ASICs) developed by the IC Design Laboratory at …

A Low-Cost Motion Classification System For A Stuffed Animal Using An Imu And Machine Learning, Rachel N. Guynes

Honors Theses

One of the many fields that has seen the integration of robots is therapy. Zoomorphic robots (ZR) are designed to look and behave like animals to assist in Animal Assisted Therapy (AAT) practices. Studies show that ZRs can provide benefits similar to working with an actual animal; however, their high cost limits their accessibility. This thesis documents the process of building a real-time, low-cost motion classification system that can be attached to a stuffed animal to make it more interactive. Using a Random Forest (RF) classifier, the system identifies movements with approximately 81.67% accuracy.

Proxyconnec: A Lora-Based Proactive Safety Communication System For Off-Grid Environments, Shruti Bhandari, Roza Shaimurat

ATU Scholars Symposium

Remote environments lacking cellular or satellite coverage present significant safety challenges. ProxyConnec was developed as a point-to-point communication system using ESP32 microcontrollers and REYAX RYLR998 LoRa modules to provide off-grid monitoring.

The system implements a proactive heartbeat model in which a beacon device transmits a signal every 1,000 milliseconds. A base station monitors this connection using a 5,000 millisecond watchdog timer. If communication is interrupted, the system immediately triggers audible and visual alerts. Unlike conventional tracking devices that depend on manual SOS activation, this design treats unexpected signal loss as a potential safety event.

The manufacturer rates the selected LoRa …

Demystifying Hardware Formal Verification For Undergraduate Education: A Risc-V Processor Case Study With Coursework Implementation, Riley A. Peters

Master's Theses

Hardware verification engineers apply formal methods to prove that a digital device always behaves according to its specification. This differs from traditional functional verification, in which engineers establish correctness by repeatedly sending test inputs to the device and comparing the outputs against a reference model. With the growing complexity of integrated circuits, the demand for digital verification engineers with formal methods experience has continued to increase. However, California Polytechnic State University: San Luis Obispo's current curriculum lacks dedicated material to prepare students for these roles.

This thesis seeks to address the lack of formal methods material through two efforts. First, …

Dashboard And Racing Telemetry, Cole Barach, Jacob Koshel, Ethan Zifzal, Matthew Sullivan

Williams Honors College, Honors Research Projects

The main goal of the project is to design and manufacture a combined dashboard and data logger for the vehicles produced by the Zips Racing design team. The dashboard will intuitively display real-time information to the driver and record all received information while driving. This information may be pulled off the device later for performing data analysis. This project will incorporate custom PCB design, surface mount soldering, embedded software development, and the CAN communication protocol.

Dual-Interface Wifi Packet Sniffer System Using Esp32-Cam With Real-Time Pcap Generation For Iot Network Analysis, Boy Setiawan Boy, Maghfiroh Maulani, Zico Pratama Putra, Muhammad Senoyodha Brennaf

Makara Journal of Technology

This study focuses on designing and implementing a cost-effective and energy-efficient WiFi packet sniffer system using the ESP32. The ESP32-CAM module, which combines WiFi, Bluetooth, and microSD support, is used to capture IEEE 802.11 frames in real-time via promiscuous mode. Packets are stored in packet capture format, which is compatible with tools such as Wireshark and Scapy. Developed using the official ESP-IDF, it offers low-level control and high performance. Two user interfaces were implemented: a UART-based text menu and a web-based HTTPS menu hosted on the ESP32 itself. Functional and performance evaluations were conducted with a focus on capturing broadcast …

Statistical Monitoring Of Hard Faults In Digital Systems, Dany Akshay Deep Isukapalli

Electrical Engineering Theses and Dissertations

Achieving a high test coverage is crucial for helping to ensure that integrated circuits are working correctly and are non-defective. Although scan-based structural tests are used throughout the industry, high-level functional tests may be needed to detect some defects— especially those that are environmentally sensitive. Unfortunately, the character of functional test makes it difficult to obtain high coverage, and it is even hard to estimate coverage because fault simulation times of large circuits are long. As a result, some method is required for predicting the ability of a functional test that has not been fault simulated to detect defects. In …

Development Of An Embedded Iot Board For Real-Time Floor Estimation Of Autonomous Robots, Carter J. Sorensen

Electronic Theses and Dissertations

As service robots become more prevalent in multi-story environments such as hospitals, hotels, and laboratories, accurate floor-level detection is critical to ensuring operational reliability. Consider a robot tasked with delivering medical samples in a multi-story laboratory. Without accurate feedback, a robot exiting on the wrong floor could introduce delays, disrupt workflows, or compromise sample integrity. Internet of Things (IoT) technologies offer a way to address these risks by providing real-time error detection and corrective capability. However, current IoT-based floor estimation systems often require invasive modifications to building infrastructure—particularly elevator control panels. These approaches introduce challenges related to cost, liability, backward …

Reverse Engineering Bring Up And Profiling Of Multi-Fpga Systems, Henry A. Evans

Master's Theses

FPGAs have long been used for prototyping and verifying high-speed digital designs in industry and in academic research. As ASIC designs have grown in complexity and size, prototyping those designs on FPGAs has required multiple FPGAs that sometimes span multiple servers. Western Digital donated multiple FPGA-based systems to Cal Poly in 2023. These servers contain multiple high-end AMD FPGAs that are ideal for prototyping large high-speed digital designs, however the full documentation on how to use the servers and how the servers work was not provided. The servers did not come with any information on how to program the FPGAs, …

Open Source Asic Design Curriculum, Francisco Wilken

Master's Theses

The ever-growing importance of Application-Specific Integrated Circuits (ASICs) in a high-compute world necessitates that college graduates entering the workforce are well prepared to design them. This thesis details the design of novel ASIC curriculum, using open source tools to teach at the undergraduate level. By moving to a higher level of abstraction than classical transistor-focused coursework, chip design material can be made accessible earlier in an undergraduate degree. Additionally, open source tools provide a powerful, free, and portable platform for students to create their own designs, solving assignments focused on industry readiness. Finally, this thesis studies the results and challenges …

Development Of Interactive Games On An Affordable Braille Display, Daniel Tsivkovski, Dylan Ravel, Maryam Etezad

Student Scholar Symposium Abstracts and Posters

Developing an affordable and STEM learning-focused Braille display addresses a significant disparity in the market for Braille displays, where most fail to provide a cost-effective, accessible, and education-oriented solution. This research aims to bridge this gap through innovative hardware and software development, offering a comprehensive learning experience to elementary school children (K-6) who are blind/visually impaired. The hardware features a piezo-electric tactile display that displays up to six Braille characters at once or a shape in an 8x8 pin array configuration. The educational software includes a user-friendly website packed with engaging STEM activities specifically designed for blind/visually impaired children. The …

Breaking New Ground: Division Directly In Memory, M. Hassan Najafi, Mehran Shoushtari Moghadam

Faculty Scholarship

In-memory computing (IMC) has emerged as a promising paradigm for overcoming the limitations of traditional von Neumann architectures by reducing data movement and enhancing computational efficiency. Despite significant advancements in this area, implementing complex arithmetic operations, such as division, directly within memory has remained an elusive challenge. This paper introduces a pioneering technique for performing division operations directly in memory, representing the first successful integration of such functionality into the IMC framework. Our approach leverages an innovative circuit based on an unconventional model of computing–stochastic computing (SC). Our technique extends the computational capabilities of IMC systems and paves the way …

Development Of A Cost-Effective Daq For Measuring Brake Performance In Race Cars, Adrin Alias

2025 Spring Honors Capstone Projects - Archive

This project explores the feasibility of creating a cost-effective data acquisition (DAQ) system for high-speed, real-time brake performance testing of Formula SAE racecars. The research addresses the limitations of the current MoTeC DAQ system currently employed by the team, which is costly and time-consuming to set up for on-car testing. The team will use a brake dynamometer for steady-state comparisons of different brake pad compounds (senior design project), but evaluating real-world performance requires on-car testing. By systematically comparing various hardware platforms, sensors, communication protocols, and storage solutions, this project aims to balance cost-efficiency with reliability and performance. The research evaluates …

Design Considerations Of A Gpu, Nicholas M. Devilliers

Electrical Engineering and Computer Science Undergraduate Honors Theses

With the current era of AI technology, the era of single instruction multiple data has become an increasingly viable solution to accelerate training. The problem is that while software to use GPUs and other hardware accelerators, designing GPUs and ASIC devices has become increasingly more expensive and there aren’t great examples of generic GPUs that anyone can use and modify. In this thesis, there are four design considerations that will be discussed and how they affect the result of a generic GPU. The four considerations that were talked about in the thesis are, word width, arithmetic type, number of stages, …

Lightlink: Visible Light Communication For Batteryless Devices With Variable Computational Load, Charles Phillips

All Theses

Visible Light Communication (VLC) devices have been experimentally proven to work as a suitable communication medium for batteryless devices. However, the effects of practical load have yet to be fully explored. To that end, we have developed LightLink, a new MAC and PHY layer protocol for VLC within batteryless devices, and have studied various ways that computational load can affect transmission accuracy in realistic scenarios. Our key findings point us towards an adaptive VLC reception system based on inferred environmental variables.

Blockchain-Integrated Version Control For Secure And Transparent Software Supply Chains, Iwinosa W. Aideyan

All Theses

The software supply chain encompasses all stages of software development and delivery from initial coding and version control to integration and deployment. As development environments become increasingly distributed and reliant on external dependencies, ensuring the integrity, auditability, and consistency of code changes has become a pressing challenge. Traditional version control systems like Git, while effective for collaboration and tracking revisions, do not inherently provide tamper-evident commit histories. Features such as history rewriting (e.g., git rebase, git push --force) can be exploited to manipulate commit logs without detection, posing risks in security-sensitive domains. This thesis proposes a blockchain-integrated version control framework …

Automatic Cat Caretaker, Connor Mcclenathan, Ryan Anderson, Andrew Tate

Williams Honors College, Honors Research Projects

This project will involve developing and constructing a self-cleaning litter box with feeding and watering functions attached. The machine will have a user interface for setting both the feeding and watering times, as well as how much to fill the food and water bowls at the same time. The project will involve the use of motors for the cleaning, feeding, and watering functions, sensors to detect when to perform those functions, and a microcontroller to process all the data and to tell the motors when to perform their respective functions. This project's goal is to make the task of caring …

Trace Flight Computer, Zachary Stratton, Vandad Mossavand Varkaneh, Nicholas Ely

Williams Honors College, Honors Research Projects

In the world of collegiate rocketry, there are currently no commercial-off-the-shelf flight computers capable of being fitted to liquid engine rockets with thrust vectoring control. Currently, amateur rocketeers utilize unreliable Arduino-based systems or expensive drone computers. The objective of this project is to design a flight computer capable of data collection and filtering, telemetry transmission, and real-time controls of critical safety systems using readily available commercial-off-the-shelf components to allow rocketeers to complete their designs within a reasonable budget. The system will collect data from two IMUs, a barometric altimeter, and a magnetometer, then filter the collected data using custom Kalman …

Autonomous Landscape Exploration Rover Using Imaging Surface Navigation (Alexis), Noah Jones, Dominic Salupo

Williams Honors College, Honors Research Projects

The objective is to develop a small-form-factor rover prototype that can be used to prove out a novel traversal method for use on extraterrestrial surfaces. The novel traversal method being proposed is LIDAR/CV-enhanced navigation, provided by a detachable flight vehicle that can communicate with the rover. On planets with thin atmospheres, cold gas thrusters or similar may be needed, but for the scope of this project more traditional flight/propulsion methods will be used.

Fail-Safe Logic Design Strategies Within Modern Fpga Architectures, Priya A. Bhakta

Electrical and Computer Engineering ETDs

Field Programmable Gate Arrays (FPGAs) are vulnerable to radiation-induced single event upsets (SEUs) and fault injection attacks, requiring the use of redundancy techniques such as fail-safe computing. Fail-safe computing refers to computing systems that revert to a non-operational safe state when a fault occurs. This work investigates circuit-level techniques and implements fail-safe computing processes as mitigation for SEUs and fault injection attacks on FPGAs. The analysis reveals vulnerabilities that exist in FPGAs over those in application-specific integrated circuits (ASIC); thus, requiring a more elaborate network of redundant circuits and checking logic. The reconfiguration capability of FPGAs adds complexity to fail-safe …

Design And Implementation Of An Inverted Short Baseline Acoustic Positioning System, Jakob Frabosilio

Master's Theses

This document details the design, implementation, testing, and analysis of an inverted short baseline acoustic positioning system. The system presented here is an above-water, air-based prototype for an underwater acoustic positioning system; it is designed to determine the position of remotely-operated underwater vehicles (ROVs) and autonomous underwater vehicles (AUVs) in the global frame using a method that does not drift over time.

A ground-truth positioning system is constructed using a stacked hexapod platform actuator, which mimics the motion of an AUV and provides the true position of an ultrasonic microphone array. An ultrasonic transmitter sends a pulse of sound towards …

Building A Wireless Electronic Control Unit For An Electric Vehicle, Hector S. Sosa

2024 Spring Honors Capstone Projects - Archive

Modern vehicles have a variety of features such remote start systems, advance drive assist systems, smart suspension systems, and a feature rich infotainment system. With all this technology in the car, there exists a complex network of computers working together in conjunction to deliver the modern driving experience that many people have today. To be competitive in the market, auto manufacturers are tasked to add additional features to vehicles by adding additional or modifying electronic control units (ECUs). In this study, an ECU will be designed for a mock electric vehicle which contains an already established network of ECU’s. The …

Development Of A Multi-Use Modular Microfluidic Platform Using 3d Printing, Carson Emeigh

Department of Mechanical and Materials Engineering: Dissertations, Theses, and Student Research

Microfluidic lab-on-a-chip (LoC) technology has driven numerous innovations due to their ability to perform laboratory-scale experiments on a single chip using microchannels. Although LoC technology has been innovative, it still suffers from limitations related to its fabrication and design flexibility. Typical LoC fabrication, with photolithography, is time consuming, expensive, and inflexible. To overcome the limitations of LoC devices, modular microfluidic platforms have been developed where multiple microfluidic modules, each with a specific function or group of functions, can be combined on a single platform. Modular microfluidics have overcome some of the limitations of LoC devices, but currently, their fabrication is …

Towards A Wearable Device For Measuring Impedance Plethysmography Of The Radial Artery, Pritom Chowdhury

Dartmouth College Master’s Theses

Recent advancements in bioimpedance technology have demonstrated significant promise in the application of cardiac health monitoring. This research explores the design and development of a forearm-based wearable bioimpedance device for non-invasive measurement of heart rate and respiratory rate at an accuracy level comparable to medical-grade monitors. It utilizes a tetrapolar electrode configuration to analyze bioimpedance changes in the radial artery due to blood flow.

An ongoing aspect of this work involves the preliminary development of an embedded framework intended to integrate signal generation, acquisition, and processing within the device to achieve compact and efficient system design, anticipated to contribute to …