Nanotechnology Fabrication Commons^™

Reinventing Integrated Photonic Devices And Circuits For High Performance Communication And Computing Applications, Venkata Sai Praneeth Karempudi

Theses and Dissertations--Electrical and Computer Engineering

The long-standing technological pillars for computing systems evolution, namely Moore's law and Von Neumann architecture, are breaking down under the pressure of meeting the capacity and energy efficiency demands of computing and communication architectures that are designed to process modern data-centric applications related to Artificial Intelligence (AI), Big Data, and Internet-of-Things (IoT). In response, both industry and academia have turned to 'more-than-Moore' technologies for realizing hardware architectures for communication and computing. Fortunately, Silicon Photonics (SiPh) has emerged as one highly promising ‘more-than-Moore’ technology. Recent progress has enabled SiPh-based interconnects to outperform traditional electrical interconnects, offering advantages like high bandwidth density, …

Characterization Of Low Power Hfo2 Based Switching Devices For In-Memory Computing, Aseel Zeinati

Theses

Oxide based Resistive Random Access Memory (RRAM) devices are investigated as one of the promising non-volatile memories to be used for in-memory computing that will replace the classical von Neumann architecture and reduce the power consumption. These applications required multilevel cell (MLC) characteristics that can be achieved in RRAM devices. One of the methods to achieve this analog switching behavior is by performing an optimized electrical pulse. The RRAM device structure is basically an insulator between two metals as metal-insulator-metal (MIM) structure. Where one of the primary challenges is to assign an RRAM stack with both low power consumption and …

A Phase Change Memory And Dram Based Framework For Energy-Efficient And High-Speed In-Memory Stochastic Computing, Supreeth Mysore

Theses and Dissertations--Electrical and Computer Engineering

Convolutional Neural Networks (CNNs) have proven to be highly effective in various fields related to Artificial Intelligence (AI) and Machine Learning (ML). However, the significant computational and memory requirements of CNNs make their processing highly compute and memory-intensive. In particular, the multiply-accumulate (MAC) operation, which is a fundamental building block of CNNs, requires enormous arithmetic operations. As the input dataset size increases, the traditional processor-centric von-Neumann computing architecture becomes ill-suited for CNN-based applications. This results in exponentially higher latency and energy costs, making the processing of CNNs highly challenging.

To overcome these challenges, researchers have explored the Processing-In Memory (PIM) …

Design Tunneling Transistor And Schottky Junction Solar Cell Using Van Der Waals Semiconductor Heterostructure, Md Azmot Ullah Khan

LSU Doctoral Dissertations

Transition metal di-chalcogenide (TMDC) materials, being semiconductor in nature, offer Two-dimensional (2D) materials such as graphene and molybdenum disulfide (MoS₂) possess unique and unusual properties that are particularly applicable to nanoelectronics and photovoltaic devices. In this dissertation, four different projects have been done that encompass the implementation of these materials to improve the performance of future transistors and Schottky junction solar cells. In chapter 2, an analytical current transport model of a dual gate tunnel field-effect transistor (TFET) is developed by utilizing the principle of band-to-band tunneling (BTBT) and MoS₂ as the channel material. Later, using this …

Characterization Of Electrophoretic Deposited Zinc Oxide Nanopartices For The Fabrication Of Next-Generation Nanoscale Electronic Applications, Fawwaz Abduh A. Hazzazi

LSU Doctoral Dissertations

Several reports state that it is crucial to analyze nanoscale semiconductor materials and devices with potential benefits to meet the need for next-generation nanoelectronics, bio, and nanosensors. The progress in the electronics field is as significant now, with modern technology constantly evolving and a greater focus on more efficient robust optoelectronic applications. This dissertation focuses on the study and examination of the practicality of Electrophoretic Deposition (EPD) of zinc oxide (ZnO) nanoparticles (NPs) for use in semiconductor applications.

The feasibility of several synthesized electrolytes, with and without surfactants and APTES surface functionalization, is discussed. The primary objective of this study …

Photoassisted Nanoscale Memory Resistors, Amir Shariffar

Graduate Theses and Dissertations

Memristors or memory resistors are promising two-terminal devices, which have the potential to revolutionize current electronic memory technologies. Memristors have been extensively investigated and reported to be practical devices, although they still suffer from poor stability, low retention time, and laborious fabrication processes.

The primary aim of this project was to achieve a device structure of quantum dots or thin films to address a fundamental challenge of unstable resistive switching behavior in memristors. Moreover, we aimed to investigate the effects of light illumination in terms of intensity and wavelength on the performance of the fabricated memristor. The parameters such as …

Design And Characterization Of Standard Cell Library Using Finfets, Phanindra Datta Sadhu

Master's Theses

The processors and digital circuits designed today contain billions of transistors on a small piece of silicon. As devices are becoming smaller, slimmer, faster, and more efficient, the transistors also have to keep up with the demands and needs of the daily user. Unfortunately, the CMOS technology has reached its limit and cannot be used to scale down due to the transistor's breakdown caused by short channel effects. An alternative solution to this is the FinFET transistor technology, where the gate of the transistor is a three dimensional fin that surrounds the transistor and prevents the breakdown caused by scaling …

Design And Fabrication Of A Microstrip Bandpass Filter In Ltcc, Allison Rucker

Electrical Engineering Undergraduate Honors Theses

The goal of the project was to design and fabricate a bandpass filter with a center frequency of 25GHz with a 2GHz bandwidth. The first step was to do the calculation to design a bandpass filter to meet these specifications along with the properties of the Dupont^TM GreenTape^TM 9K7. HFSS was then used to verify the results from the initial calculations. There was a significant error between the two results, so more tweaking was done to the calculations to get a better center frequency. After a final design was decided, the fabrication process started. Low-Temperature Co-Fired Ceramics (LLTC) …

Skybridge-3d-Cmos: A Fine-Grained Vertical 3d-Cmos Technology Paving New Direction For 3d Ic, Jiajun Shi

Doctoral Dissertations

2D CMOS integrated circuit (IC) technology scaling faces severe challenges that result from device scaling limitations, interconnect bottleneck that dominates power and performance, etc. 3D ICs with die-die and layer-layer stacking using Through Silicon Vias (TSVs) and Monolithic Inter-layer Vias (MIVs) have been explored in recent years to generate circuits with considerable interconnect saving for continuing technology scaling. However, these 3D IC technologies still rely on conventional 2D CMOS’s device, circuit and interconnect mindset showing only incremental benefits while adding new challenges reliability issues, robustness of power delivery network design and short-channel effects as technology node scaling. Skybridge-3D-CMOS (S3DC) is …

Parameters Affecting The Resistivity Of Lp-Ebid Deposited Copper Nanowires, Gabriel Smith

Theses and Dissertations--Electrical and Computer Engineering

Electron Beam Induced Deposition (EBID) is a direct write fabrication process with applications in circuit edit and debug, mask repair, and rapid prototyping. However, it suffers from significant drawbacks, most notably low purity. Work over the last several years has demonstrated that deposition from bulk liquid precursors, rather than organometallic gaseous precursors, results in high purity deposits of low resistivity (LPEBID). In this work, it is shown that the deposits resulting from LP-EBID are only highly conductive when deposited at line doses below 25μC/cm. When the dose exceeds this value, the resulting structure is highly porous providing a poor conductive …

Skynet: Memristor-Based 3d Ic For Artificial Neural Networks, Sachin Bhat

Masters Theses

Hardware implementations of artificial neural networks (ANNs) have become feasible due to the advent of persistent 2-terminal devices such as memristor, phase change memory, MTJs, etc. Hybrid memristor crossbar/CMOS systems have been studied extensively and demonstrated experimentally. In these circuits, memristors located at each cross point in a crossbar are, however, stacked on top of CMOS circuits using back end of line processing (BOEL), limiting scaling. Each neuron’s functionality is spread across layers of CMOS and memristor crossbar and thus cannot support the required connectivity to implement large-scale multi-layered ANNs.

This work proposes a new fine-grained 3D integrated circuit technology …

Design Automation For Carbon Nanotube Circuits Considering Performance And Security Optimization, Lin Liu

Dissertations, Master's Theses and Master's Reports

As prevailing copper interconnect technology advances to its fundamental physical limit, interconnect delay due to ever-increasing wire resistivity has greatly limited the circuit miniaturization. Carbon nanotube (CNT) interconnects have emerged as promising replacement materials for copper interconnects due to their superior conductivity. Buffer insertion for CNT interconnects is capable of improving circuit timing of signal nets with limited buffer deployment. However, due to the imperfection of fabricating long straight CNT, there exist significant unidimensional-spatially correlated variations on the critical CNT geometric parameters such as the diameter and density, which will affect the circuit performance.

This dissertation develops a novel timing …

Design And Implementation Of An Integrated Biosensor Platform For Lab-On-A-Chip Diabetic Care Systems, Khandaker Abdullah Al Mamun

Doctoral Dissertations

Recent advances in semiconductor processing and microfabrication techniques allow the implementation of complex microstructures in a single platform or lab on chip. These devices require fewer samples, allow lightweight implementation, and offer high sensitivities. However, the use of these microstructures place stringent performance constraints on sensor readout architecture. In glucose sensing for diabetic patients, portable handheld devices are common, and have demonstrated significant performance improvement over the last decade. Fluctuations in glucose levels with patient physiological conditions are highly unpredictable and glucose monitors often require complex control algorithms along with dynamic physiological data. Recent research has focused on long term …

Skybridge: A New Nanoscale 3-D Computing Framework For Future Integrated Circuits, Mostafizur Rahman

Doctoral Dissertations

Continuous scaling of CMOS has been the major catalyst in miniaturization of integrated circuits (ICs) and crucial for global socio-economic progress. However, continuing the traditional way of scaling to sub-20nm technologies is proving to be very difficult as MOSFETs are reaching their fundamental performance limits [1] and interconnection bottleneck is dominating IC operational power and performance [2]. Migrating to 3-D, as a way to advance scaling, has been elusive due to inherent customization and manufacturing requirements in CMOS architecture that are incompatible with 3-D organization. Partial attempts with die-die [3] and layer-layer [4] stacking have their own limitations [5]. We …

Architecting Np-Dynamic Skybridge, Jiajun Shi

Masters Theses

With the scaling of technology nodes, modern CMOS integrated circuits face severe fundamental challenges that stem from device scaling limitations, interconnection bottlenecks and increasing manufacturing complexities. These challenges drive researchers to look for revolutionary technologies beyond the end of CMOS roadmap. Towards this end, a new nanoscale 3-D computing fabric for future integrated circuits, Skybridge, has been proposed [1]. In this new fabric, core aspects from device to circuit style, connectivity, thermal management and manufacturing pathway are co-architected in a 3-D fabric-centric manner.

However, the Skybridge fabric uses only n-type transistors in a dynamic circuit style for logic and memory …

Mos Current Mode Logic (Mcml) Analysis For Quiet Digital Circuitry And Creation Of A Standard Cell Library For Reducing The Development Time Of Mixed Signal Chips, David Marusiak

Master's Theses

Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with …