Nanotechnology Fabrication Commons^™

Development Of Alternative Plasma Etching Techniques For The Selective Removal Of Tan With Respect To Sioch Dielectric Materials To Enable Future Back-End-Of-The-Line Scaling, Ivo Otto Iv

Electronic Theses & Dissertations (2024 - present)

Transistor scaling has continued according to Moore’s Law for over fifty years. As transistor size decreases, adequate power delivery is required to enable transistor scaling without performance loss. Power delivery is provided by a metal interconnect network with insulating dielectric that connects the transistor level to the power source, the signal speed within this metal line network limiting transistor level switching speeds. Reduction of signal delay has moved from primarily dimension-based improvement towards adoption of conductor and dielectric materials with lower resistivity and a reduced dielectric constant value, respectively: transitioning from Al/SiO₂ to Cu/low-κ SiOCH. With this transition comes …

Design Of A Subthreshold Cmos Inverter-Based Amplifier For Low-Noise And Low-Power Applications, Landon Alexander Schmucker

Electrical and Computer Engineering ETDs

Amplification is a fundamental function in most analog circuits. There is a fast-growing demand for low-power, low-noise, and high-gain amplifiers. Modern semiconductor processes are increasingly optimized for digital applications, which has introduced new challenges in analog design. To address these challenges, analog designers have investigated replacing conventional analog circuits with digital implementations. One promising application is the typical CMOS inverter as an amplifier.

This research presents a CMOS inverter-based amplifier with feedback designed to achieve low power consumption, low input noise, and high gain. Unlike typical CMOS inverter-based amplifiers, this topology has two distinctive features: (1) it uses a MOSFET …

Reinventing Integrated Photonic Devices And Circuits For High Performance Communication And Computing Applications, Venkata Sai Praneeth Karempudi

Theses and Dissertations--Electrical and Computer Engineering

The long-standing technological pillars for computing systems evolution, namely Moore's law and Von Neumann architecture, are breaking down under the pressure of meeting the capacity and energy efficiency demands of computing and communication architectures that are designed to process modern data-centric applications related to Artificial Intelligence (AI), Big Data, and Internet-of-Things (IoT). In response, both industry and academia have turned to 'more-than-Moore' technologies for realizing hardware architectures for communication and computing. Fortunately, Silicon Photonics (SiPh) has emerged as one highly promising ‘more-than-Moore’ technology. Recent progress has enabled SiPh-based interconnects to outperform traditional electrical interconnects, offering advantages like high bandwidth density, …

Improving Cellphone-Based Bio-Imaging Technique For Fluorescence Detection, Erteza T. Efaz

LSU Master's Theses

The research presented in this thesis focuses on the design, development, and evaluation of a fluorescence detection system. The system is implemented primarily as an Android application, Auto Camera, which leverages smartphone cameras to capture and analyze fluorescent images. The application provides a user-friendly interface with some configurable features like exposure time, ISO speed, and storage limit; as well as defining detection thresholds and setting acquisition intervals. This study begins with the architectural framework of the Android application, which is written in Java using Android Studio. The API compatibility is set to version 33, and users are prompted to grant …

Characterization Of Low Power Hfo2 Based Switching Devices For In-Memory Computing, Aseel Zeinati

Theses

Oxide based Resistive Random Access Memory (RRAM) devices are investigated as one of the promising non-volatile memories to be used for in-memory computing that will replace the classical von Neumann architecture and reduce the power consumption. These applications required multilevel cell (MLC) characteristics that can be achieved in RRAM devices. One of the methods to achieve this analog switching behavior is by performing an optimized electrical pulse. The RRAM device structure is basically an insulator between two metals as metal-insulator-metal (MIM) structure. Where one of the primary challenges is to assign an RRAM stack with both low power consumption and …

Iii-Nitride Triangular Microcantilevers For Multimodal Sensing Applications, Balaadithya Uppalapati

All Dissertations

Micro-electromechanical systems (MEMS)-based sensors have gained significant attention due to their ability to sense, measure, and process various physical, chemical, and biological parameters. The small size of MEMS sensors provides numerous advantages, including low power consumption, high sensitivity, and rapid response time, making them suitable for various applications in healthcare, automotive, aerospace, and consumer electronics.

In the past few years, AlGaN/GaN MEMS devices have been found to offer several advantages over silicon-based MEMS devices. One of the main advantages of AlGaN/GaN MEMS is their high sensitivity to surface stresses and forces due to their high piezoelectric coefficients. This sensitivity allows …

A Phase Change Memory And Dram Based Framework For Energy-Efficient And High-Speed In-Memory Stochastic Computing, Supreeth Mysore

Theses and Dissertations--Electrical and Computer Engineering

Convolutional Neural Networks (CNNs) have proven to be highly effective in various fields related to Artificial Intelligence (AI) and Machine Learning (ML). However, the significant computational and memory requirements of CNNs make their processing highly compute and memory-intensive. In particular, the multiply-accumulate (MAC) operation, which is a fundamental building block of CNNs, requires enormous arithmetic operations. As the input dataset size increases, the traditional processor-centric von-Neumann computing architecture becomes ill-suited for CNN-based applications. This results in exponentially higher latency and energy costs, making the processing of CNNs highly challenging.

To overcome these challenges, researchers have explored the Processing-In Memory (PIM) …

Design Tunneling Transistor And Schottky Junction Solar Cell Using Van Der Waals Semiconductor Heterostructure, Md Azmot Ullah Khan

LSU Doctoral Dissertations

Transition metal di-chalcogenide (TMDC) materials, being semiconductor in nature, offer Two-dimensional (2D) materials such as graphene and molybdenum disulfide (MoS₂) possess unique and unusual properties that are particularly applicable to nanoelectronics and photovoltaic devices. In this dissertation, four different projects have been done that encompass the implementation of these materials to improve the performance of future transistors and Schottky junction solar cells. In chapter 2, an analytical current transport model of a dual gate tunnel field-effect transistor (TFET) is developed by utilizing the principle of band-to-band tunneling (BTBT) and MoS₂ as the channel material. Later, using this …

Characterization Of Electrophoretic Deposited Zinc Oxide Nanopartices For The Fabrication Of Next-Generation Nanoscale Electronic Applications, Fawwaz Abduh A. Hazzazi

LSU Doctoral Dissertations

Several reports state that it is crucial to analyze nanoscale semiconductor materials and devices with potential benefits to meet the need for next-generation nanoelectronics, bio, and nanosensors. The progress in the electronics field is as significant now, with modern technology constantly evolving and a greater focus on more efficient robust optoelectronic applications. This dissertation focuses on the study and examination of the practicality of Electrophoretic Deposition (EPD) of zinc oxide (ZnO) nanoparticles (NPs) for use in semiconductor applications.

The feasibility of several synthesized electrolytes, with and without surfactants and APTES surface functionalization, is discussed. The primary objective of this study …

Photoassisted Nanoscale Memory Resistors, Amir Shariffar

Graduate Theses and Dissertations

Memristors or memory resistors are promising two-terminal devices, which have the potential to revolutionize current electronic memory technologies. Memristors have been extensively investigated and reported to be practical devices, although they still suffer from poor stability, low retention time, and laborious fabrication processes.

The primary aim of this project was to achieve a device structure of quantum dots or thin films to address a fundamental challenge of unstable resistive switching behavior in memristors. Moreover, we aimed to investigate the effects of light illumination in terms of intensity and wavelength on the performance of the fabricated memristor. The parameters such as …

Machine Learning Approach To Stability Analysis Of Semiconductor Memory Element, Ravindra Thanniru, Gautam Kapila, Nibhrat Lohia

SMU Data Science Review

Memory stability analysis traditionally relied heavily on circuit simulation-based approaches that run Monte Carlo (MC) analysis over various manufacturing and use condition parameters. This paper researches application of Machine Learning approaches for memory element failure analysis which could mimic simulation-like accuracy and minimize the need for engineers to rely heavily on simulators for their validations. Both regressor and classifier algorithms are benchmarked for accuracy and recall scores. A high recall score implies fewer escapes of fails to field and is the metric of choice for comparing algorithm. The paper identifies that recall score in excess of 0.97 can be achieved …

Design And Characterization Of Standard Cell Library Using Finfets, Phanindra Datta Sadhu

Master's Theses

The processors and digital circuits designed today contain billions of transistors on a small piece of silicon. As devices are becoming smaller, slimmer, faster, and more efficient, the transistors also have to keep up with the demands and needs of the daily user. Unfortunately, the CMOS technology has reached its limit and cannot be used to scale down due to the transistor's breakdown caused by short channel effects. An alternative solution to this is the FinFET transistor technology, where the gate of the transistor is a three dimensional fin that surrounds the transistor and prevents the breakdown caused by scaling …

Design And Fabrication Of A Microstrip Bandpass Filter In Ltcc, Allison Rucker

Electrical Engineering Undergraduate Honors Theses

The goal of the project was to design and fabricate a bandpass filter with a center frequency of 25GHz with a 2GHz bandwidth. The first step was to do the calculation to design a bandpass filter to meet these specifications along with the properties of the Dupont^TM GreenTape^TM 9K7. HFSS was then used to verify the results from the initial calculations. There was a significant error between the two results, so more tweaking was done to the calculations to get a better center frequency. After a final design was decided, the fabrication process started. Low-Temperature Co-Fired Ceramics (LLTC) …

Parameters Affecting The Resistivity Of Lp-Ebid Deposited Copper Nanowires, Gabriel Smith

Theses and Dissertations--Electrical and Computer Engineering

Electron Beam Induced Deposition (EBID) is a direct write fabrication process with applications in circuit edit and debug, mask repair, and rapid prototyping. However, it suffers from significant drawbacks, most notably low purity. Work over the last several years has demonstrated that deposition from bulk liquid precursors, rather than organometallic gaseous precursors, results in high purity deposits of low resistivity (LPEBID). In this work, it is shown that the deposits resulting from LP-EBID are only highly conductive when deposited at line doses below 25μC/cm. When the dose exceeds this value, the resulting structure is highly porous providing a poor conductive …

Virtual-Source Based Accurate Model For Predicting Noise Behavior At High Frequencies In Nanoscale Pmos Soi Transistors, Vaibhav R. Ramachandran, Saeed Mohammadi, Sutton Hathorn

The Summer Undergraduate Research Fellowship (SURF) Symposium

Complementary Metal Oxide Semiconductor (CMOS) technology at the nanometre scale is an excellent platform to implement monolithically integratedsystems because of the low cost of manufacturing and ease of integration. Newly developed CMOS Silicon on Insulator (SOI) transistors that are currentlydeveloped are suitable for use in radio frequency circuits. They find applications in many areas such as 5G telecommunication systems, high speed Wi-Fi andairport body-scanners. Unfortunately, the models for CMOS SOI transistors that are currently used in these circuits are inaccurate because of their complexity.The models currently used require the optimization of more than 200 variables. This paper aims to accurately …

Design Automation For Carbon Nanotube Circuits Considering Performance And Security Optimization, Lin Liu

Dissertations, Master's Theses and Master's Reports

As prevailing copper interconnect technology advances to its fundamental physical limit, interconnect delay due to ever-increasing wire resistivity has greatly limited the circuit miniaturization. Carbon nanotube (CNT) interconnects have emerged as promising replacement materials for copper interconnects due to their superior conductivity. Buffer insertion for CNT interconnects is capable of improving circuit timing of signal nets with limited buffer deployment. However, due to the imperfection of fabricating long straight CNT, there exist significant unidimensional-spatially correlated variations on the critical CNT geometric parameters such as the diameter and density, which will affect the circuit performance.

This dissertation develops a novel timing …

Reward Modulated Spike Timing Dependent Plasticity Based Learning Mechanism In Spiking Neural Networks, Shrihari Sridharan, Gopalakrishnan Srinivasan, Kaushik Roy

The Summer Undergraduate Research Fellowship (SURF) Symposium

Spiking Neural Networks (SNNs) are one of the recent advances in machine learning that aim to further emulate the computations performed in the human brain. The efficiency of such networks stems from the fact that information is encoded as spikes, which is a paradigm shift from the computing model of the traditional neural networks. Spike Timing Dependent Plasticity (STDP), wherein the synaptic weights interconnecting the neurons are modulated based on a pair of pre- and post-synaptic spikes is widely used to achieve synaptic learning. The learning mechanism is extremely sensitive to the parameters governing the neuron dynamics, the extent of …

Mos Current Mode Logic (Mcml) Analysis For Quiet Digital Circuitry And Creation Of A Standard Cell Library For Reducing The Development Time Of Mixed Signal Chips, David Marusiak

Master's Theses

Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with …