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Articles 61 - 64 of 64
Full-Text Articles in Electronic Devices and Semiconductor Manufacturing
Evaluation Of An Interdigitated Gate Electrode Field-Effect Transistor (Igefet) For In Situ Resin Cure Monitoring, Thomas E. Graham
Evaluation Of An Interdigitated Gate Electrode Field-Effect Transistor (Igefet) For In Situ Resin Cure Monitoring, Thomas E. Graham
Theses and Dissertations
The purpose of this study was to design an Interdigitated Gate Electrode Field-Effect Transistor (IGEFET) and evaluate its performance as an in situ resin cure monitor. A commercially available resin was selected for the research, and rheological studies were performed to identify the resin's gelation point during isothermal cures at two selected temperatures. Additional rheological studies were performed to identify the resin's glass transition temperature. The interdigitated gate electrode of the IGEFET was coated with samples of the resin, and electrical measurements were performed while the resin cured. The chemical changes which occur in the resin as a result of …
Robotic Tactile Sensors Fabricated From A Monolithic Silicon Integrated Circuit And A Piezoelectric Polyvinylidene Fluoride Thin Film, Craig S. Dyson
Robotic Tactile Sensors Fabricated From A Monolithic Silicon Integrated Circuit And A Piezoelectric Polyvinylidene Fluoride Thin Film, Craig S. Dyson
Theses and Dissertations
The purpose of this research effort was to design, fabricate, and test a tactile sensor system consisting of an external high impedance switch circuit, an external multiplexing circuit, and a tactile sensor IC. In order to accomplish this objective, a hardware design and selection process was implemented along with a logical test methodology. An external multiplexer circuit samples all of the array elements in 50 ms. The current prototype sensor has linearity spanning loads of 0.8 g to 135 g, a load resolution of 20 g, and a maximum bandwidth of 25 Hz. Using an elementary shape recognition algorithm the …
Hybrid Wafer Scale Microcircuit Integration -- [ 5008213 ], Edward S. Kolesar Jr.
Hybrid Wafer Scale Microcircuit Integration -- [ 5008213 ], Edward S. Kolesar Jr.
AFIT Patents
A wafer scale integration arrangement wherein integrated circuit die of varying size, fabrication processes, and function are commonly mounted in the same host wafer using a filled epoxy material of special characteristics. The mounting epoxy material also serves as a substrate for the die interconnecting conductors in regions adjacent the mounted die. The described assembly also includes a newly available photosensitive polyimide material as a planarization and passivation covering for the die and hose wafer and as a mounting surface for an interconnecting metal conductor array. Multiple levels of interconnection metal. Fabrication processes for the die to host wafer attachment …
Hybrid Wafer Scale Microcircuit Integration -- [ 4989063 ], Edward S. Kolesar Jr.
Hybrid Wafer Scale Microcircuit Integration -- [ 4989063 ], Edward S. Kolesar Jr.
AFIT Patents
A wafer scale integration arrangement wherein integrated circuit die of varying size, fabrication processes, and function are commonly mounted in the same host wafer using a filled epoxy material of special characteristics. The mounting epoxy material also serves as a substrate for the die interconnecting conductors in regions adjacent the mounted die. The described assembly also includes a newly available photosensitive polyimide material as a planarization and passivation covering for the die and host wafer and as a mounting surface for an interconnecting metal conductor array. Multiple levels of interconnection metal. Fabrication processes for the die to host wafer attachment …