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Articles 661 - 690 of 728
Full-Text Articles in Computer Engineering
A Modeling And Simulation Approach To Characterize Network Layer Internet Survivability, Leif S. King
A Modeling And Simulation Approach To Characterize Network Layer Internet Survivability, Leif S. King
Theses and Dissertations
The Air Force Core Competency of Information Superiority will be achieved in an age of decreasing AF manpower and corporate expertise. Increased AF reliance on COTS solutions, coupled with nearly ubiquitous points of entry to communication networks, create unique challenges in maintaining the Information Superiority edge. The protection of the internet is part of this equation. The internet supports the daily business traffic of the Air Force. Personnel, finance, and supply data flow through its routers. Controlling an adversary's access to our information systems, either the data, or the hardware and software that control the data and transform it into …
Self-Assembly Of Microstructures, Paul E. Kladitis
Self-Assembly Of Microstructures, Paul E. Kladitis
Theses and Dissertations
Four areas are investigated in this research: erecting microstructures normal to the substrate plane without direct human intervention (self-assembled), providing low resistance electrical connections to the erected microstructure, realizing circular motion normal to the substrate plane, and implementing a micro-robot. The designs in this research concentrate on erecting and providing power to a leg designed for use with the micro-robot. The leg and the attached low resistance electrical connectors were not self-assembled because the accompanying actuators were not powerful enough. However, the novel connectors provide the most practical, versatile, and lowest possible resistance connections for the MUMPs fabrication process. The …
A Reconfigurable Superscalar Architecture, Christopher B. Mayer
A Reconfigurable Superscalar Architecture, Christopher B. Mayer
Theses and Dissertations
The invention of the Field Programmable Gate Array (FPGA) has led to a number of interesting developments. One is the idea of providing custom hardware support for applications running on a computer. These reconfigurable computers have been shown to decrease the execution time for some applications. Based on past results, attention has subsequently turned to using reconfigurable computing in general-purpose computers (e.g. desktop and workstation environments). This thesis develops a design for just such a computer. The design, FPGADLX, is based on a hypothetical superscalar computer running the DLX instruction set and is generic enough in principle to be adapted …
A Mammographic Registration Method Based On Optical Flow And Multiresolution Computing, Kevin A. Lee
A Mammographic Registration Method Based On Optical Flow And Multiresolution Computing, Kevin A. Lee
Theses and Dissertations
Mammography is a potent weapon in the fight against Breast Cancer, due in large part to its widespread availability and low cost. Despite the fact that mammography can detect small lesions as early as two years before they become palpable on physical exam, between 10 and 30 percent of cancerous lesions go undetected during evaluation by the radiologist. One approach to improving detection rates involves comparing mammograms of the same breast from successive years. Since most forms of breast cancer develop slowly, multiple view techniques might be able to detect subtle changes indicative of cancerous growth. This thesis proposes a …
Fpga Processor Implementation For The Forward Kinematics Of The Umdh, Steven M. Parmley
Fpga Processor Implementation For The Forward Kinematics Of The Umdh, Steven M. Parmley
Theses and Dissertations
The focus of this research was on the implementation of a forward kinematic algorithm for the Utah MIT Dexterous Hand (UMDH). Specifically, the algorithm was synthesized from mathematical models onto a Field Programmable Gate Array (FPGA) processor. This approach is different from the classical, general purpose microprocessor design where all robotic controller functions including forward Kinematics are executed serially from a compiled programming language such as C. The compiled code and subsequent real time operating system must be stored on some form of nonvolatile memory, typically magnetic media such as a fixed or hard disk drive, along with other computer …
Modeling And Simulation Support For Parallel Algorithms In A High-Speed Network, Dustin E. Yates
Modeling And Simulation Support For Parallel Algorithms In A High-Speed Network, Dustin E. Yates
Theses and Dissertations
This thesis investigates the ability of a simulation model to compare and contrast parallel processing algorithms in a high-speed network. The model extends existing modeling, analysis, and comparison of parallel algorithms by providing graphics based components that facilitate the measurement of system resources. Simulation components are based on the Myrinet local area network standard. The models provide seven different topologies to contrast the performance of five variations of Fast Fourier Transform (FFT) algorithms. Furthermore, the models were implemented using a commercially developed product that facilitates the testing of additional topologies and the investigation of hardware variations. Accurate comparisons are statistically …
Message-Bundle Converting In Intenet Protocol Multicast-Based High Level Architecture Exercises, Tracy A. Bobo
Message-Bundle Converting In Intenet Protocol Multicast-Based High Level Architecture Exercises, Tracy A. Bobo
Theses and Dissertations
The Department of Defense is pushing for more wide-spread and realistic interactive training simulations which increases the demand on network capacity and resources. While network bandwidth is a measurable resource, packet bandwidth, or the number of packets-per-second (Pk/s) a host can handle, is a shifting commodity. This research analyzes host performance characteristics under varying data loads. The hosts include SGI single and multi-processor systems and Intel Pentium platforms using both Windows 95 and Linux Operating Systems. The networking media covers Ethernet, ATM and FDDI. For the ATM network, both AAL5 and IP over ATM were analyzed. With the data from …
A Performance Analysis Of The Faugeras Color Space As A Component Of Color Histogram-Based Image Retrieval, Chad A. Vander Meer
A Performance Analysis Of The Faugeras Color Space As A Component Of Color Histogram-Based Image Retrieval, Chad A. Vander Meer
Theses and Dissertations
The use of color histograms for image retrieval from databases has been implemented in many variations. Selecting the appropriate color space for similarity comparisons is an important part of a color histogram technique. This paper serves to introduce and evaluate the performance of a color space through the use of color histograms. Performance is evaluated by correlating the similarity results obtained from various color feature vector techniques (including color histgramming) to those gathered through a human perceptual test. The perceptual test required 36 human subjects to evaluate the similarity of 10 military aircraft images. The same 10 images were also …
A Framework For An Automated Compilation System For Reconfigurable Architectures, George R. Roelke Iv
A Framework For An Automated Compilation System For Reconfigurable Architectures, George R. Roelke Iv
Theses and Dissertations
The advent of the Field Programmable Gate Array has allowed the implementation of runtime reconfigurable computer systems. These systems are capable of configuring their hardware to provide custom hardware support for software applications. Since these architectures can be reconfigured during operation, they are able to provide hardware support for a variety of applications, without removal from the system. The Air Force is currently investigating reconfigurable architectures for avionics and signal processing applications. This thesis investigates the problem of automating the application development process for reconfigurable architectures. The lack of automated development support is a major limiting factor in the use …
A Crosstalk Correcting Router That Uses Online Noise Simulation To Route High Speed Multichip Modules, Kenneth J. Mcclellan Jr.
A Crosstalk Correcting Router That Uses Online Noise Simulation To Route High Speed Multichip Modules, Kenneth J. Mcclellan Jr.
Theses and Dissertations
Existing MultiChip Module (MCM) auto-routers either ignore crosstalk or use over simplified crosstalk approximations. Of the routers that do consider crosstalk, very few have the capability to correct crosstalk problems after they occur. This dissertation describes a router that not only has an internal crosstalk model for high speed MCMs which is more accurate than that of other existing routers, but also has the capability to use an online simulator to more accurately determine noise levels. After crosstalk problems occur, the router has the ability to correct these problems. Through memory usage reductions and routing efficiency improvements, this maze router …
An Object-Oriented Discrete-Event Simulation System For Hierarchical Parallel Simulations, Kenneth W. Stauffer
An Object-Oriented Discrete-Event Simulation System For Hierarchical Parallel Simulations, Kenneth W. Stauffer
Theses and Dissertations
The purpose of this research is to design and implement an object-oriented discrete-event simulation system which supports hierarchically constructed players in a parallel or distributed environment. This system design considers modularity and portability so additional modules may be implemented to experiment with new algorithms for both partitioning and synchronization. A simulation system which meets these requirements was partially implemented on an eight-node Intel Hypercube in C. A desired goal was to maintain the functionality of the existing BattleSim application. Test cases used measure the performance and correct operation of the new simulation architecture using a BattleSim subclass. Test results prove …
Performance Analysis Of Preemption Algorithms In An Idnx Circuit Switch Communications Network, Eric C. Gumbs
Performance Analysis Of Preemption Algorithms In An Idnx Circuit Switch Communications Network, Eric C. Gumbs
Theses and Dissertations
Access to communication networks is increasing rapidly. The increase access to these networks results in delays and at times loss of data. At times of peak traffic or when trunks or nodes are down, very important customers' communications requirements are not met. One way to combat this problem is to prioritize the network and provide different levels of grade of service (GOS) for each priority. Call preemption provides an effective method of obtaining different levels of GOS. This research seeks to design the best circuit switch communications network preemption model for the DoD by analyzing previously developed preemption algorithms. Four …
Data-Driven Process Discovery: A Discrete Time Algebra For Relational Signal Analysis, David M. Conrad
Data-Driven Process Discovery: A Discrete Time Algebra For Relational Signal Analysis, David M. Conrad
Theses and Dissertations
This research presents an autonomous and computationally tractable method for scientific process analysis, combining an iterative algorithmic search and a recognition technique to discover multivariate linear and non-linear relations within experimental data series. These resultant data-driven relations provide researchers with a potentially real-time insight into experimental process phenomena and behavior. This method enables the efficient search of a potentially infinite space of relations within large data series to identify relations that accurately represent process phenomena. Proposed is a time series transformation that encodes and compresses real-valued data into a well-defined, discrete-space of 13 primitive elements where comparative evaluation between variables …
Performance Analysis Of Dynamic Routing Protocols In A Low Earth Orbit Satellite Data Network, Richard F. Janoso
Performance Analysis Of Dynamic Routing Protocols In A Low Earth Orbit Satellite Data Network, Richard F. Janoso
Theses and Dissertations
Modern warfare is placing an increasing reliance on global communications. Currently under development are several Low Earth Orbit (LEO) satellite systems that propose to deliver voice and data traffic to subscribers anywhere on the globe. However, very little is known about the performance of conventional routing protocols under orbital conditions where the topology changes on a scale of minutes rather than days. This thesis compares two routing protocols in a LEO environment. One (Extended Bellman-Ford) is a conventional terrestrial routing protocol, while the other (Darting) is a new protocol which has been proposed as suitable for use in LEO networks. …
The Automated Wingman: An Airborne Companion For Users Of Dis Compatible Flight Simulators, Mark M. Edwards
The Automated Wingman: An Airborne Companion For Users Of Dis Compatible Flight Simulators, Mark M. Edwards
Theses and Dissertations
A major problem encountered by users of distributed virtual environments is the lack of simulators available to populate these environments. This problem is usually remedied by using computer generated entities. Unfortunately, these entities often lack adequate human behavior and are readily identified as non-human. This violates the realism premise of distributed virtual reality and is a major problem, especially in training situations. This thesis addresses the problem by presenting a computer generated entity called the Automated Wingman. The Automated Wingman is a semi-automated computer generated aircraft simulator that operates under the control of a designated lead simulator and integrates distributed …
An Architecture For Dynamic Meta-Level Process Control For Model-Based Troubleshooting, John E. Friskie
An Architecture For Dynamic Meta-Level Process Control For Model-Based Troubleshooting, John E. Friskie
Theses and Dissertations
There are numerous methods used for troubleshooting devices. Each method has certain domains, knowledge requirements, and assumptions required for it to perform well. However, oftentimes no one method by itself is sufficient to completely solve a troubleshooting problem. Therefore, an architecture is required to control the combined use of many problem solving methods. The combination of multiple problem solving methods makes the troubleshooting process more robust in terms of device domains that can be dealt with and quality of diagnoses produced. Troubleshooting has two tasks: diagnosis and problem resolution. This research provides an architecture that allows dynamic method selection during …
Accelerating Conservative Parallel Simulation Of Vhdl Circuits, Joel F. Hurford
Accelerating Conservative Parallel Simulation Of Vhdl Circuits, Joel F. Hurford
Theses and Dissertations
This research effort considers heuristic and cost model based techniques for the optimal partitioning of VHDL circuits for parallel simulation. Correlation statistics are gathered on a wide variety of graph-based a priori parameters. Linear regression is used to identify significant parameters for inclusion in a representative cost model. Driving a greedy search, this cost model is used to improve upon initial heuristic partitions. The influence of feedback dominated previous research so a no-feedback algorithm is used to create the initial partition The circuits studied range from 1,050 to 4,243 gates.
3d Stereo Data Visualization And Representation, Kai-Heng (Felix) Wang
3d Stereo Data Visualization And Representation, Kai-Heng (Felix) Wang
Theses and Dissertations
This thesis investigates a technique for improving the perception and visualization of three dimensional information. This improvement will eventually give physicians the ability to both visualize and understand biomedical image data. Raw data is used to generate a stereo image pair. The raw data must be put in run length encoding RLE format and then converted to a stereo pair. Once the stereo pair is generated, they must be displayed on the Silicon Graphics ONYX workstation in stereo mode. This research uses 3D images of planets and satellites. The display information is transmitted across cable and is projected onto a …
Rapid And Accurate Timing Simulation Of Radiation-Hardened Digital Microelectronics Using Vhdl, Charles P. Brothers Jr.
Rapid And Accurate Timing Simulation Of Radiation-Hardened Digital Microelectronics Using Vhdl, Charles P. Brothers Jr.
Theses and Dissertations
This dissertation presents the development of a fast, accurate, timing simulation capability based on VHSIC Hardware Description Language VHDL without the use of back annotation of timing delay information. This VHDL-based timing simulator is intended for use with radiation-hardened microelectronics in simulating timing of circuit operation in pre-radiation, post-radiation 1 MradSi total dose, and ionizing dose radiation environments. Development of the timing models are presented. The implementation of the timing models are incorporated into a VHDL library composed of basic logic gates and flip-flops. Simulations of complex circuits were run in SPICE and VHDL to assess the timing accuracy and …
Partitioning Structural Vhdl Circuits For Parallel Execution On Hypercubes, Kevin L. Kapp
Partitioning Structural Vhdl Circuits For Parallel Execution On Hypercubes, Kevin L. Kapp
Theses and Dissertations
Distributing simulations among multiple processors is one approach to reducing VHDL simulation time for large VLSI circuit designs. However, parallel simulation introduces the problem of how to partition the logic gates and system behaviors among the available processors in order to obtain maximum speedup. This research investigates deliberate partitioning algorithms that account for the complex inter-dependency structure of the circuit behaviors. Once an initial partition has been obtained, a border annealing algorithm is used to iteratively improve the partition. In addition, methods of measuring the cost of a partition and relating it to the resulting simulation performance are investigated. Structural …
An Object-Oriented Database Interface For Ada, Anthony D. Moyers
An Object-Oriented Database Interface For Ada, Anthony D. Moyers
Theses and Dissertations
Object data management ODM is currently at the forefront of research and development efforts in the database community. In order to take advantage of ODM technology, the Department of Defense DoD needs to ensure that these systems are accessible to Ada programmers. The Air Force Institute of Technology AFIT is conducting research towards the development of an Ada ODM interface to existing ODM systems. The design goals are portability, transparency, and completeness for Ada programmers. Portability means that the ODM system can be changed without affecting any existing application programs. Transparency means that Ada programmers can use the interface without …
Virtual Memory Management And Virtual Bus Overloading On Multiple Channel Architectures, John N. Armitstead
Virtual Memory Management And Virtual Bus Overloading On Multiple Channel Architectures, John N. Armitstead
Theses and Dissertations
Today's computational environment requires the processing capabilities available only through parallel architectures. The bottleneck that limits the potential of parallel processing is communication between processors, memories, and other hardware devices. A proposed multiple channel architecture (MCA) utilizes tunable semiconductor lasers and fiber optic cables that serve as the communication medium between processor, memory, and I/O nodes. A memory management unit (MMU) was completely described and implemented in a multiprocessor simulator. A permutation-based interleaving (PBI) scheme was utilized to reduce the chance of memory access collisions. Virtual bus utilization, number of collisions, and message traffic patterns were studied under various amounts …
Interactive Control Of A Parallel Simulation From A Remote Graphics Workstation, Douglas C. Looney
Interactive Control Of A Parallel Simulation From A Remote Graphics Workstation, Douglas C. Looney
Theses and Dissertations
Modern military commanders are faced with an overwhelming amount of intelligence data concerning the disposition of engaging forces, The sheer volume of data produced for a single planning scenario is an obstacle to the user as well as the computer. Today’s commander requires a real-time, three- dimensional representation of the battlefield in order to assimilate the data for the management of a conflict. Parallel computation is required to complete the processing of this information in a timely manner. A network protocol is required to link the interface with the parallel simulation. The of this study is to improve user interaction …
Genetic Algorithms Applied To A Mission Routing Problem, James B. Olsan
Genetic Algorithms Applied To A Mission Routing Problem, James B. Olsan
Theses and Dissertations
This thesis applies genetic algorithms to a mission routing problem. The mission routing problem involves determining an aircraft’s best route between a staging base and a target. The goal is to minimize the route distance and the exposure to radar. Potential routes are mapped to a 3-dimensional mesh where the nodes correspond to checkpoints in the route and the arcs correspond to partial paths of the route. Each arc is weighted with respect to distance and exposure to radar. A genetic algorithm is a probabilistic search technique loosely based on theories of biological evolution. Genetic crossover and survival of the …
Design Of A Parallel Discrete Event Simulation Coprocessor, Jacob L. Berlin
Design Of A Parallel Discrete Event Simulation Coprocessor, Jacob L. Berlin
Theses and Dissertations
A Parallel Discrete Event Simulation Coprocessor was designed to off- load the synchronization overhead from the processors executing the application. In a multiprocessor architecture, one coprocessor executes the synchronization routines for each host processor. Speedup can be achieved when the host processor executes the application and the coprocessor concurrently executes synchronization routines. The coprocessor uses a programmable microcode control store to guarantee flexibility in the synchronization routines. The coprocessor uses an Extreme Search Associative Memory to support fast Next Event Queue NEQ management. This associative memory uses bit-serial word-parallel search logic to provide 01 insert and retrieval time of events …
Local Area Network Implementation At The 4950th Test Wing: A Study Of The Relationship Between Individual Factors And The Effectiveness Of A Local Area Network, Doyle F. Cone, David J. Donahoo
Local Area Network Implementation At The 4950th Test Wing: A Study Of The Relationship Between Individual Factors And The Effectiveness Of A Local Area Network, Doyle F. Cone, David J. Donahoo
Theses and Dissertations
This research investigated the individual factors which directly impacted the effectiveness of the 4950th Test Wing local area network (LAN). Areas of interest included the relationships between demographic and user attitude factors and LAN effectiveness. A literature review provided the basis for: 1) operationally defining effectiveness as a subjective measure of user satisfaction; 2) identifying specific factors which impact information system effectiveness; and 3) developing a research instrument to measure user attitudes and user satisfaction. A questionnaire was administered to 342 LAN users 173 were returned (a response rate of 51 percent). Sixteen factors (eight demographic factors and eight attitude …
Using Discovery-Based Learning To Prove The Behavior Of An Autonomous Agent, David N. Mezera
Using Discovery-Based Learning To Prove The Behavior Of An Autonomous Agent, David N. Mezera
Theses and Dissertations
Computer-generated autonomous agents in simulation often behave predictably and unrealistically. These characteristics make them easy to spot and exploit by human participants in the simulation, when we would prefer the behavior of the agent to be indistinguishable from human behavior. An improvement in behavior might be possible by enlarging the library of responses, giving the agent a richer assortment of tactics to employ during a combat scenario. Machine learning offers an exciting alternative to constructing additional responses by hand by instead allowing the system to improve its own performance with experience. This thesis presents NOSTRUM, a discovery-based learning DBL system …
A Method For Populating The Knowledge Base Of Aptas, A Domain-Oriented Application Composition System, Raleigh A. Sandy Iii
A Method For Populating The Knowledge Base Of Aptas, A Domain-Oriented Application Composition System, Raleigh A. Sandy Iii
Theses and Dissertations
A formal process is described for populating the knowledge base of the Automatic Programming Technologies for Avionics Software APTAS system. This process was developed using a general knowledge base population process that applies to many knowledge-based software engineering systems. This general process is also described. The formal process for APTAS was demonstrated by storing new information from the radar tracking domain into the knowledge base of APTAS. Several procedures some automatic and some manual were implemented to support the formal process.
A Decision Criteria To Select An Associative-Memory Organization That Minimizes The Execution Time Of A Mix Of Associative-Search Operations, David W. Banton
A Decision Criteria To Select An Associative-Memory Organization That Minimizes The Execution Time Of A Mix Of Associative-Search Operations, David W. Banton
Theses and Dissertations
The dissertation develops a decision criteria to select an associative-memory organization that minimizes the execution time of a mix of associative-search operations and a decision criteria to estimate the layout dimensions of each organization for a specified memory size. The dissertation reclassifies Feng's associative-search operations into three hardware-influenced categories: bit-position independent (BPI), record-content independent (RCI); bit-position dependent (BPD), RCI; and BPD, record-content dependent (RCD). It develops a relationship between the categories and three associative-memory organizations: the CAM, the bit-serial word-parallel associative memory (BSWPAM) , and the extreme-search associative memory (ESAM). A version of the CAM, three versions of the BSWPAM, …
Design Of A Hardware Discrete Event Simulation Coprocessor, David W. Daniel
Design Of A Hardware Discrete Event Simulation Coprocessor, David W. Daniel
Theses and Dissertations
A hardware discrete event simulation (DES) coprocessor was designed to eliminate synchronization overhead as a possible bottleneck. The target architecture is an eight node Intel iPSC/2 Hypercube, but this design has application to future CPU designs that wish to incorporate on-chip architectural features to better support parallel processor synchronization. A structural description of a general-purpose DES hardware coprocessor is given with approximately 90 percent of the components written at the gate level. The remaining components use low-level behavioral descriptions. While the DES coprocessor microcode implements the Chandy-Misra protocol, general-purpose support for a wide-range of protocols was a primary hardware design …