Open Access. Powered by Scholars. Published by Universities.®

Engineering Commons™

Open Access. Powered by Scholars. Published by Universities.®

Journal

Discipline
Institution
Keyword
Publication Year
Publication
File Type

Articles 26551 - 26580 of 27312

Full-Text Articles in Engineering

Performing C-T Measurements, James Krawiecki Jan 1990

Performing C-T Measurements, James Krawiecki

Journal of the Microelectronic Engineering Conference

An IBM computer, a HP4145B parametric analyzer, a Micromanipulator 410 capacitance meter, and a Keithley 230 voltage source were networked together to form a test setup to measure the recombination and generation lifetimes of minority carriers. The Zerbst relationships were used to calculate lifetimes. Results indicate that the test setup~has the ability to take accurate data, but when the capacitance-time data was analyzed, the calculated lifetimes were not believable. The problem seems to be the quality of the fabricated capacitors and not the setup.

Go to article

Processing Techniques Of Mos Capacitors, Michael D. Buczkowski Jan 1990

Processing Techniques Of Mos Capacitors, Michael D. Buczkowski

Journal of the Microelectronic Engineering Conference

Variations in both MOS capacitor structure and fabrication process were characterized using 1MHz C-V measurements. This involved processing MOS capacitors with and without backside oxide, and wet etching versus plasma ashing photoresist. The experimental results show large flatband shifts in wafers that were plasma ashed. ~ longer than expected anneal was utilized to reduce the C-V shifts caused by positive charge build-up in the oxide. The backside oxide did not grossly affect the capacitance measurements.

Go to article

Studies Of Chlorinated Oxides, Jeffrey J. Ballak Jan 1990

Studies Of Chlorinated Oxides, Jeffrey J. Ballak

Journal of the Microelectronic Engineering Conference

Three oxidation processes were employed to study the effects of chlorine on growth rate and device characteristics of capacitors. Oxide was grown without the use of TCA, with TCA prior to growth, and TCA during growth. An increased growth rate of the oxide, 450 angstroms in 42 minutes with TCA, as opposed to 50 minutes without TCA, was observed. Contrary to what was expected, the TCA processed oxides larger flatband shifts than the standard oxide growth wafers.

Go to article

Gaas Mesfet Logic, Dave Petzold Jan 1990

Gaas Mesfet Logic, Dave Petzold

Journal of the Microelectronic Engineering Conference

Two 2” Gallium Arsenide wafers underwent MBE deposition processing to create two differing epitaxial layer schemes for processing of MESFET devices. ~ four level process was used to fabricate isolated MESFET structures, diodes, resistors, other test structures, and simple logic gates using Buffered FET Logic (BFL). Two ohmic contact schemes were utilized; Aluminum for an as-deposited contact to InGaAs and AuGe as an alloyed contact to Gags. Results were working MESFETs with pinchoff voltages ranging from -lv to -4V, source to drain saturation currents ranging from 7 to 28 mP~, and transconductances up to 22.4 milliSiemens. Schottky C-V and interdigitated …

Go to article

The Use Of A Water Contrast Enhancement Material For Lithographic Improvement, David A. Demuynck Jan 1990

The Use Of A Water Contrast Enhancement Material For Lithographic Improvement, David A. Demuynck

Journal of the Microelectronic Engineering Conference

ALTILITH CEM-420WS water soluble contrast enhancement material was used to improve lithographic capabilities of KTI-820 positive photoresist when imaged with a GCA/Mann 4800 DSW g-line 0.28NA Stepper. Improvements in photoresist edge profiles of a two micron line/space pattern were observed using a scanning electron microscope. Experimental data indicated a three fold improvement in V contrast and a significant increase in exposure latitude. The experimental results are contrasted with simulated results using PROLITH photoresist modeling software.

Go to article

Design, Manufacture And Testing Of A 4-Bit Microprocessor, Theodore D'Antonoli Jan 1990

Design, Manufacture And Testing Of A 4-Bit Microprocessor, Theodore D'Antonoli

Journal of the Microelectronic Engineering Conference

A four bit microprocessor was designed using an Apollo workstation and MOSIS two lambda design rules. The layout was intended for fabrication with a four level, enhancement mode load, NMOS process. Device operation was verified by breadboarding the microprocessor with 74’OO series CMOS logic parts. Testing of the breadboard showed that all functions operated correctly. However, the final breadboard design indicated the need for revision of the original layout.

Go to article

Dyed Resist Study, Jennifer L. Dunbar Jan 1990

Dyed Resist Study, Jennifer L. Dunbar

Journal of the Microelectronic Engineering Conference

Dyed and undyed AZ1512 series resists were characterized for exposure latitude, development rate, and reduction of both notching and standing waves. Uniform and patterned oxidized silicon wafers were coated with aluminum and employed as substrates for all phases of the experiment. The results show that the addition of a dye provided for the reduction of standing waves and an increase in exposure latitude. The control of reflective notching was not verified as collected data proved inconclusive.

Go to article

Development Of A Photosensitive Polyimide Process, William Reinisch Jan 1990

Development Of A Photosensitive Polyimide Process, William Reinisch

Journal of the Microelectronic Engineering Conference

A six step lithographic process has been developed and characterized for Pyralin PI-2703D photosensitive polyimide from DuPont Electronics. The six basic steps are wafer preparation, coating, soft—bake, exposure, development , and cure . The problems encountered in obtaining a suitable immersion development process necessitated the fabrication of a spray development apparatus. The image quality resulting from these different development techniques was compared.

Go to article

Selective Etching Of Lpcvd Si3n4 Over Si02 Using Sf6, Gregg D. Espin Jan 1990

Selective Etching Of Lpcvd Si3n4 Over Si02 Using Sf6, Gregg D. Espin

Journal of the Microelectronic Engineering Conference

A Si3N4 etch process using a Plasmatherm 2406 etcher and SF6 was determined. RS1/Discover was used to design an experiment which varied SF6 flow rate, power, and pressure. ~ maximum nitride etch rate of 1300 ~/min. was obtained with a corresponding nitride to oxide selectivity of 2:1. Selectivities as high as 6:1 were obtained but with nitride - etch rates of less than 100 ~/min. ~n acceptable baseline process, having a nitride to oxide selectivity of 3.24:1 with a nitride etch rate of greater than 850 A/mm was established.

Go to article

Bi-Layer Deep Uv Resist System, Mark A. Boehm Jan 1990

Bi-Layer Deep Uv Resist System, Mark A. Boehm

Journal of the Microelectronic Engineering Conference

A portable conformable mask (PCM) system employing KTIS2O as the imaging layer and PMMA, a deep UV sensitive photoresist, as the planarizing layer was investigated. Process parameters of a PMMA prebake at 185’C and methanol soak of 90 seconds achieved a resolution of 2.16 microns. The PCM system was able to achieve better results than a single layer system with regards to resolution and linewidth control.

Go to article

Spin On Glass Etch Processing For The Rit Nmos Process, William Roberts Jan 1990

Spin On Glass Etch Processing For The Rit Nmos Process, William Roberts

Journal of the Microelectronic Engineering Conference

ACCUGLASS 104 was characterized for four micron via etching. The quality of the Spin On Glass (SOG) layer was improved by increasing the cure temperature to 600 degrees c for one hour. A buffered hydrofloric acid diluted 100:1 produced an etch rate of 2700 Angstroms per minute. A plasma etching process was design with a gas mixture of CHF3/CF4/02 in a ratio of 10:3:1.5 wit a regal 700 plasma etcher. The SOG etch rate of this mixture was 600 Angstroms per minute. The selectivity of this plasma for SOG to poly silicon was 12:1. The wet process produced better image …

Go to article

Comparison Of Pmos Transistor Source/Drain Doping: Ion Impantation Versus Solid Diffusion Source, Russell W. Heller Jan 1990

Comparison Of Pmos Transistor Source/Drain Doping: Ion Impantation Versus Solid Diffusion Source, Russell W. Heller

Journal of the Microelectronic Engineering Conference

This project was an investigation into transistor development in areas of implanted wells and source/drain regions. Wafer processing was put through the existing RIT PMOS process, but incorporated two areas of comparison: ion implantation of an n-type well, versus the use of an n-type substrate; and doping the p-type source/drain regions by implantation, versus solid diffusion sources. Experimental results for sheet resistance and junction depth were within ten percent of those predicted by SUPREM. Electrical testing results yielded no functional transistors. Diagnostics using diffused and implanted resistors in the wells indicated that the wells were too shallow to properly isolate …

Go to article

Performance Characterization Of A Gca 4800 Stepper, John M. Coniff Jan 1990

Performance Characterization Of A Gca 4800 Stepper, John M. Coniff

Journal of the Microelectronic Engineering Conference

Characterization of a GCA 4800 stepper was done in order to assess the system capability for image quality and overlay. This was achieved through running stepper jobs two or three times per week. Data was statistically analyzed and the results showed good agreement with accepted values with the exception of system registration [1].

Go to article

Reactive Ion Etching Of Aluminum On The Plasmatrac 2406, Asadd M. Hosein Jan 1990

Reactive Ion Etching Of Aluminum On The Plasmatrac 2406, Asadd M. Hosein

Journal of the Microelectronic Engineering Conference

~ process for etching aluminum was developed for a Plasmatrac 2406 Reactive Ion Etcher. The etch gases used were a mixture of silicon tetrachioride (SiC14) and helium (He). ~ SiC14 flow of 35 sccm and He flow of 48 sccm at a chamber pressure of 100 mT and power of 150 watts resulted in an average aluminum etch rate of 1450 Angstroms per minute. Resulting selectivities ratios were 3.2:1 for aluminum to resist, and 30:1 for aluminum to the underlying oxide. The etch uniformity was approximately 27~ and etching of aluminum lines less than 2 microns resulted in an anisotropic …

Go to article

Multilevel Metalization, Matthew D. Quinn Jan 1990

Multilevel Metalization, Matthew D. Quinn

Journal of the Microelectronic Engineering Conference

A multilevel metal testchip which analyzes a first level metal, interlevel dielectric, and second level metal has been designed. The test structures will be used to detect opens or shorts in conducting lines, measure via resistance, measure sheet resistance, and determine linewidth or linespace.

Go to article

Microfabrication Of Field Emitter Tips For Vacuum Microelectronic Devices, Joseph A. Johnson Jan 1990

Microfabrication Of Field Emitter Tips For Vacuum Microelectronic Devices, Joseph A. Johnson

Journal of the Microelectronic Engineering Conference

Potassium hydroxide (KOR) etching was used to create four sided pyramids for potential use in vacuum microelectronic devices. Optimal structures were found to be approximately 2 microns on a side and 2.2 microns high. KOM etched the silicon at 1200 A/mm in the vertical direction. A slight overetch period insured that the oxide mask was undercut completely away and the pyramids came to a sharp point, but were not attacked. Surface damage as a result of the KOH etching was minimal.

Go to article

Process Modeling Of Solid Source Phosphorus Diffusions Using Suprem-Iii, Craig R. Printy Jan 1990

Process Modeling Of Solid Source Phosphorus Diffusions Using Suprem-Iii, Craig R. Printy

Journal of the Microelectronic Engineering Conference

Carborundum PH-1025 Solid Planar Diffusion Sources were used to perform a statistically designed diffusion matrix. The data taken from this matrix included junction depth, sheet resistance and transferred glass thickness. Modifications to the existing SUPREM-Ill diffusion model failed to produce good correlation between SUPREM-Ill and the experimental data.

Go to article

Device Fabrication Using A Double Level Polysilicon Self-Aligned Pmos Process, Sally A. Plevniak Jan 1990

Device Fabrication Using A Double Level Polysilicon Self-Aligned Pmos Process, Sally A. Plevniak

Journal of the Microelectronic Engineering Conference

A double level polysilicon self-aligned PMOS process was used to fabricate an integrator circuit using a switch capacitor configuration at the input of an op amp. This process includes a spin-on dopant step to dope the first level of polysilicon while also doping the source and drain of the transistors on the design, thus creating self-aligned gates. The dielectric for the double polysilicon capacitors was a dry oxide on doped polysilicon which also served as the contact cut mask. Electrical testing included several test structures to evaluate process level performance. Problems with doping of the first polysilicon layer did not …

Go to article

Calibration And Characterization Of A Resist Process Through Linewidth Measurement On Wafers, Suchai Saksiriwatekul Jan 1990

Calibration And Characterization Of A Resist Process Through Linewidth Measurement On Wafers, Suchai Saksiriwatekul

Journal of the Microelectronic Engineering Conference

A simple method to evaluate photoresist sensitivity and development/exposure latitude was developed to compare 2 linewidths in positive photoresist under equivalent processing conditions. This method was based on image size measurement by a Nanoline measurement system as a function of exposure and development. In addition, the system was complicated by a variety of materials and a corresponding wide variation in optical parameters, complex refractive indices and thicknesses used in manufacture of integrated circuits. If processing proceeds with controlled oxide thickness, photoresist material, and processing conditions, the linewidth measurements would slightly be affected by the optical variations. It was necessary to …

Go to article

Standard Cell Realization For The Mentor Graphics Cad Environment, Bion Pohl Jan 1990

Standard Cell Realization For The Mentor Graphics Cad Environment, Bion Pohl

Journal of the Microelectronic Engineering Conference

A common way of designing microelectronic circuits is by the use of standard cells. In advance systems the circuit can be read from a schematic diagram and the computer will select and place the cells and layout the signal paths automatically. In order to do so the computer needs a representation of these cells and a description of the routing design rules. The format and content of these descriptions were investigated for the Mentor Graphics IDEA system and a procedure for building libraries of standard cells was developed. The related data files were then developed to allow the creation of …

Go to article

Positive Photoresist Hardening Using Formaldehyde Soak Methods, Brian E. Stricker Jan 1990

Positive Photoresist Hardening Using Formaldehyde Soak Methods, Brian E. Stricker

Journal of the Microelectronic Engineering Conference

KTI-820, a positive photoresist, was hardened using a formaldehyde and hydrochloric acid solution consisting of five parts hydrochloric acid (HC1)and one part formaldehyde. The experiment involved varying the duration of the bath from three to ten minutes and varying the temperature of the bath from 70 to 100 degrees centigrade. The results of this process showed resist flow and thickness loss. The thickness loss was a result of the EC1 attacking the resist during the soak in the HC1 and formaldehyde solution.

Go to article

The Effects Of Premetalization Clean On Electromigration In Al-Si Thin Films On Si02 And Polysilicon Substrates, Peter R. Stubler Jan 1990

The Effects Of Premetalization Clean On Electromigration In Al-Si Thin Films On Si02 And Polysilicon Substrates, Peter R. Stubler

Journal of the Microelectronic Engineering Conference

The effects of premetalization cleaning on electromigration in Al-Si thin films was studied. Premetalization cleaning, divided into a standard RCA clean, DC glow discharge plasma clean, and no clean, were performed on oxide and polysilicon substrates Test structures were subjected to high current densities of 10e6 A/cm2 and monitored for changes in current resulting from electromigration induced defects. The test station employed in this experiment was subject to current losses which the 5Oftware erroneously interpreted as electromigration failures, thus completing the test.

Go to article

Design And Fabrication Of A Pn Junction Photodiode Array, Richard Rogoff Jan 1990

Design And Fabrication Of A Pn Junction Photodiode Array, Richard Rogoff

Journal of the Microelectronic Engineering Conference

An array of photodiodes consisting of various areas and/or metallization schemes were fabricated for use in a photodiode array. The two gate metals used were Aluminum and Aluminum/Ytterbium. The standard RIT PMOS process was modified to obtain a shallow junction depth for the photodiode. All the diodes generated a photocurrent when illuminated, but the Aluminum metal scheme produced better results due to higher open circuit voltages and short circuit currents. The fill factor was also much better on these diodes.

Go to article

Preliminary Formation Of Deep Trench Capacitors, Christopher J. Waskiewicz Jan 1990

Preliminary Formation Of Deep Trench Capacitors, Christopher J. Waskiewicz

Journal of the Microelectronic Engineering Conference

A Tegal 700 plasma etcher was used to etch trenches in (100) p-type silicon wafers using a SF6102 plasma. Silicon etch rates of approximately 1.17 microns/minute and a Si:Si02 selectivity ratio of 22.0 were obtained. Scanning Electron Micrographs show the etch was isotropic in nature with an aspect ratio of approximately 2:1.

Go to article

Scientific Method, Anti-Foundationalism, And Public Decision-Making, Kristin Shrader-Frechette Jan 1990

Scientific Method, Anti-Foundationalism, And Public Decision-Making, Kristin Shrader-Frechette

RISK: Health, Safety & Environment (1990-2002)

An examination of the legitimacy of attacks on lay assessments of environmental or other technological Risk. The case is made that rational policy requires an epistemology in which what we believe about Risk is bootstrapped onto how we should act concerning Risk.

Go to article

Art, Science, Or Trade, Robert A. Green Jan 1990

Art, Science, Or Trade, Robert A. Green

Journal of the Arkansas Academy of Science

Several definitions of the term "engineer" are presented, discussed, and contrasted with the term "scientist". These definitions demonstrate the fundamental differences between engineers and scientists and their professions The engineering method is compared with the scientific method and the value of each is discussed. Several aspects of engineering education are covered. The need for more liberally educated engineers is emphasized and the impact of computers on engineering education and the engineering profession is discussed. The value of a good science foundation in an undergraduate engineering program is also stressed. An engineering education is only as good as the engineering educators …

Go to article

Enhancing An Engineering Learning Environment, Paul J. Palazolo, Patricia Brackin Jan 1990

Enhancing An Engineering Learning Environment, Paul J. Palazolo, Patricia Brackin

Journal of the Arkansas Academy of Science

No abstract provided.

Go to article

Economics Of Interceptor Drains : A Case Study, Andrew Bathgate, Ian Evans Jan 1990

Economics Of Interceptor Drains : A Case Study, Andrew Bathgate, Ian Evans

Journal of the Department of Agriculture, Western Australia, Series 4

This case study determines the most likely rate of return to capital invested in constructing seepage interceptor drains to reduce the effect of waterlogging on crop and pasture yields. The analysis of a farm in the Denbarker region, west of Albany, determined what increases were needed in pasture growth to justify the cost of constructing drains across four adjacent paddocks. The benefits of changing rotations to include lupins were also determined, as growing lupins was unprofitable before the construction of drains.

Go to article

Principles And Clinical Applications Of Magnetic Resonance, Rao P. Gullapalli, Teresa T. Evans, Roger M. Hawk Jan 1990

Principles And Clinical Applications Of Magnetic Resonance, Rao P. Gullapalli, Teresa T. Evans, Roger M. Hawk

Journal of the Arkansas Academy of Science

A review is presented which covers the basic theory of nuclear magnetic resonance (NMR) with regard to angular momentum, magnetic moments, and the classical mechanical description of the NMR experiment. Longitudinal (T,) and Transverse (T2) relaxation times are defined as well as the basic pulse sequences used for their measurement. In particular, the 180°-t-90° and the Hahn Spin Echo pulse sequences are described in detail. Basic Magnetic Resonance Imaging (MRI) theory is discussed with regard to slice selection, frequency encoding, and phase encoding to define the imaged volume element. The equations defining the amount of Tt , T2 , and …

Go to article

Irish Building Services News Jan 1990

Irish Building Services News

Building Services Engineering

No abstract provided.

Go to article

First Prev Next Last