Computer and Systems Architecture Commons^™

Data Transport System, Rahav Dor

All Computer Science and Engineering Research

To facilitate the WU Smart Home research [21] we built a system that collects data from sensors and uploads the data to the cloud. The system supports data collection from multiple locations (typically apartments) that are independent from each other, endowing the system with two benefit: distributed data collection and alleviating privacy concerns. Each location is managed by a local micro-server (μServer) that is responsible for receiving data packets from sensors and managing their transient storage. Periodically the μServer triggers a data transport process that moves the data to a cloud server where it is stored in a centralized database. …

A Deep Search Architecture For Capturing Product Ontologies, Tejeshwar Sangameswaran

Graduate Theses and Dissertations

This thesis describes a method to populate very large product ontologies quickly. We discuss a deep search architecture to text-mine online e-commerce market places and build a taxonomy of products and their corresponding descriptions and parent categories. The goal is to automatically construct an open database of products, which are aggregated from different online retailers. The database contains extensive metadata on each object, which can be queried and analyzed. Such a public database currently does not exist; instead the information currently resides siloed within various organizations. In this thesis, we describe the tools, data structures and software architectures that allowed …

Design And Implementation Of An Instruction Set Architecture And An Instruction Execution Unit For The Rez9 Coprocessor System, Daniel Spencer Anderson

UNLV Theses, Dissertations, Professional Papers, and Capstones

While the use of RNS has provided groundbreaking theory and progress in this field, the applications still lack viable testing platforms to test and verify the theory. This Thesis outlines the processing of developing an instruction set architecture (ISA) and an instruction execution unit (IEU) to help make the first residue based general processor a viable testing platform to address the mentioned problems.

Consider a 32-bit ripple adder. The delay on this device will be 32N where N is the delay for each adder to complete its operation. The delay of this process is due to the need to propagate …

Study Of Parallel Programming Models On Computer Clusters With Accelerators, Chenggang Lai

Graduate Theses and Dissertations

In order to reach exascale computing capability, accelerators have become a crucial part in developing supercomputers. This work examines the potential of two latest acceleration technologies, Intel Many Integrated Core (MIC) Architecture and Graphics Processing Units (GPUs). This thesis applies three benchmarks under 3 different configurations, MPI+CPU, MPI+GPU, and MPI+MIC. The benchmarks include intensely communicating application, loosely communicating application, and embarrassingly parallel application. This thesis also carries out a detailed study on the scalability and performance of MIC processors under two programming models, i.e., offload model and native model, on the Beacon computer cluster.

According to different benchmarks, the results …

Designing A Bayer Filter With Smooth Hue Transition Interpolation Using The Xilinx System Generator, Zhiqiang Li, Peter Revesz

School of Computing: Conference and Workshop Papers

This paper describes the design of a Bayer filter with smooth hue transition using the System Generator for DSP. We describe and compare experimentally two different designs, one based on a MATLAB implementation and the other based on a modification of the Bayer filter using bilinear interpolation.

Cama: Efficient Modeling Of The Capture Effect For Low Power Wireless Networks, Behnam Dezfouli, Marjan Radi, Kamin Whitehouse, Shukor Abd Razak, Hwee-Pink Tan

Research Collection School Of Computing and Information Systems

Network simulation is an essential tool for the design and evaluation of wireless network protocols, and realistic channel modeling is essential for meaningful analysis. Recently, several network protocols have demonstrated substantial network performance improvements by exploiting the capture effect, but existing models of the capture effect are still not adequate for protocol simulation and analysis. Physical-level models that calculate the signal-to-interference-plus-noise ratio (SINR) for every incoming bit are too slow to be used for large-scale or long-term networking experiments, and link-level models such as those currently used by the NS2 simulator do not accurately predict protocol performance. In this article, …

Analysis And Detection Of Heap-Based Malwares Using Introspection In A Virtualized Environment, Salman Javaid

LSU New Orleans Theses and Dissertations

Malware detection and analysis is a major part of computer security. There is an arm race between security experts and malware developers to develop various techniques to secure computer systems and to find ways to circumvent these security methods. In recent years process heap-based attacks have increased significantly. These attacks exploit the system under attack via the heap, typically by using a heap spraying attack. The main drawback with existing techniques is that they either consume too many resources or are complicated to implement. Our work in this thesis focuses on new methods which offloads process heap analysis for guest …

Reputation Computation In Social Networks And Its Applications, Jooyoung Lee

Dissertations - ALL

This thesis focuses on a quantification of reputation and presents models which compute reputation within networked environments. Reputation manifests past behaviors of users and helps others to predict behaviors of users and therefore reduce risks in future interactions. There are two approaches in computing reputation on networks- namely, the macro-level approach and the micro-level approach. A macro-level assumes that there exists a computing entity outside of a given network who can observe the entire network including degree distributions and relationships among nodes. In a micro-level approach, the entity is one of the nodes in a network and therefore can only …

Software Porting Of A 3d Reconstruction Algorithm To Razorcam Embedded System On Chip, Kevin Curtis Gunn

Graduate Theses and Dissertations

A method is presented to calculate depth information for a UAV navigation system from Keypoints in two consecutive image frames using a monocular camera sensor as input and the OpenCV library. This method was first implemented in software and run on a general-purpose Intel CPU, then ported to the RazorCam Embedded Smart-Camera System and run on an ARM CPU onboard the Xilinx Zynq-7000. The results of performance and accuracy testing of the software implementation are then shown and analyzed, demonstrating a successful port of the software to the RazorCam embedded system on chip that could potentially be used onboard a …

Forensicloud: An Architecture For Digital Forensic Analysis In The Cloud, Cody Miller, Dae Glendowne, David Dampier, Kendall Blaylock

Computer Sciences and Electrical Engineering Faculty Research

The amount of data that must be processed in current digital forensic examinations continues to rise. Both the volume and diversity of data are obstacles to the timely completion of forensic investigations. Additionally, some law enforcement agencies do not have the resources to handle cases of even moderate size. To address these issues we have developed an architecture for a cloud-based distributed processing platform we have named Forensicloud. This architecture is designed to reduce the time taken to process digital evidence by leveraging the power of a high performance computing platform and by adapting existing tools to operate within this …

Ultimate Codes: Near-Optimal Mds Array Codes For Raid-6, Zhijie Huang, Hong Jiang, Chong Wang, Ke Zhou, Yuhong Zhao

School of Computing: Technical Reports

As modern storage systems have grown in size and complexity, RAID-6 is poised to replace RAID-5 as the dominant form of RAID architectures due to its ability to protect against double disk failures. Many excellent erasure codes specially designed for RAID-6 have emerged in recent years. However, all of them have limitations. In this paper, we present a class of near perfect erasure codes for RAID-6, called the Ultimate codes. These codes encode, update and decode either optimally or nearly optimally, regardless of what the code length is. This implies that utilizing these codes we can build highly efficient and …

S-Code: Lowest Density Mds Array Codes For Raid-6, Zhijie Huang, Hong Jiang, Ke Zhou, Yuhong Zhao, Chong Wang

School of Computing: Technical Reports

RAID, a storage architecture designed to exploit I/O parallelism and provide data reliability, has been deployed widely in computing systems as a storage building block. In large scale storage systems, in particular, RAID-6 is gradually replacing RAID-5 as the dominant form of disk arrays due to its capability of tolerating concurrent failures of any two disks. MDS (maximum distance separable) array codes are the most popular erasure codes that can be used for implementing RAID-6, since they enable optimal storage efficiency and efficient encoding and decoding algorithms. In this paper, we propose a new class of MDS array codes called …

Power Management In The Cluster System, Leping Wang

School of Computing: Dissertations, Theses, and Student Research

With growing cost of electricity, the power management of server clusters has become an important problem. However, most previous researchers have only addressed the challenge in traditional homogeneous environments. Considering the increasing popularity of heterogeneous and virtualized systems, this thesis develops a series of efficient algorithms respectively for power management of heterogeneous soft real-time clusters and a virtualized cluster system. It is built on simple but effective mathematical models. When deployed to a new platform, the software incurs low configuration cost because no extensive performance measurements and profiling are required. Built upon optimization, queuing theory and control theory techniques, our …

System-Wide Performance Analysis For Virtualization, Deron Eugene Jensen

Dissertations and Theses

With the current trend in cloud computing and virtualization, more organizations are moving their systems from a physical host to a virtual server.

Although this can significantly reduce hardware, power, and administration costs, it can increase the cost of analyzing performance problems. With virtualization, there is an initial performance overhead, and as more virtual machines are added to a physical host the interference increases between various guest machines. When this interference occurs, a virtualized guest application may not perform as expected. There is little or no information to the virtual OS about the interference, and the current performance tools in …

Regen: Optimizing Genetic Selection Algorithms For Heterogeneous Computing, Scott Kenneth Swinkleb Winkleblack

Master's Theses

GenSel is a genetic selection analysis tool used to determine which genetic markers are informational for a given trait. Performing genetic selection related analyses is a time consuming and computationally expensive task. Due to an expected increase in the number of genotyped individuals, analysis times will increase dramatically. Therefore, optimization efforts must be made to keep analysis times reasonable.

This thesis focuses on optimizing one of GenSel’s underlying algorithms for heterogeneous computing. The resulting algorithm exposes task-level parallelism and data-level parallelism present but inaccessible in the original algorithm. The heterogeneous computing solution, ReGen, outperforms the optimized CPU implementation achieving a …

Implementing A Robust Data Storage Software System For Cp9, Stuart Andrew Weickgenant

Computer Engineering

This project focuses on the continuation of the CP9 CubeSat project, specifically the software which will be running on the satellite when it goes into space. This project mostly goes into designing a robust system which stores the data collected from the sensors on board CP9, whose purpose is to collect vibrations data from its launch vehicle during its ascent into space, into an easy to analyze system once the data is downlinked to PolySat’s ground station after launch. One other thing this system does is to prevent CP9 from collecting unnecessary data after launch. Testing was done on this …

Virtual Reality Engine Development, Varun Varahamurthy

Master's Theses

With the advent of modern graphics and computing hardware and cheaper sensor and display technologies, virtual reality is becoming increasingly popular in the fields of gaming, therapy, training and visualization. Earlier attempts at popularizing VR technology were plagued by issues of cost, portability and marketability to the general public. Modern screen technologies make it possible to produce cheap, light head-mounted displays (HMDs) like the Oculus Rift, and modern GPUs make it possible to create and deliver a seamless real-time 3D experience to the user. 3D sensing has found an application in virtual and augmented reality as well, allowing for a …

Chromium Os On Freescale I.Mx6q, Pushpal Sidhu

Computer Engineering

This projects intention is to get Chromium OS running on a Freescale i.MX6q processor, a processor based on the ARM® Cortex™-A9 architecture. The development board I used is the Ventana GW5400 by Gateworks. This project inherently meant using Chromium OS's development system which meant I created a board specific package for the Ventana single board computer. This project is a proof of concept that can mean extending Chromium OS to various implementations of the ARM® Cortex™-A9 architecture.

Team Omnimouse, Derek J. Halman, Josh B. Porter, Steven A. Silver, Ian S. Stemper

Computer Engineering

INFORMATION, DATA, FIGURES AND DRAWINGS EMBODIED IN THIS DOCUMENT ARE STRICTLY CONFIDENTIAL AND ARE SUPPLIED ON THE UNDERSTANDING THAT THEY WILL NOT BE DISCLOSED TO THIRD PARTIES WITHOUT THE PRIOR WRITTEN CONSENT OF QUALITY OF LIFE PLUS.

Ecs Game Engine Design, Daniel Masamune Hall

Computer Engineering

Game programming design and organization can be difficult and complicated. To simplify the development process, frameworks with an array of tools and utilities known as game engines are used. The main goal of this project is to explore game engine designs and develop a design for a modular and expandable game engine. The designs covered in this paper are Object Oriented Programing (OOP) and two Entity Component System (ECS). OOP designs, commonly used in computer science, use a hierarchy of objects to share functionality. ECS designs are based off of the concepts Composition over inheritance in which objects contain features …