Systems Architecture Commons^™

Confidential, Attestable, And Efficient Inter-Cvm Communication With Arm Cca, Sina Abdollahi, Amir Al Sadi, Marios Kogias, Hamed Haddadi, David Kotz

Other Faculty Materials

Confidential Virtual Machines (CVMs) are increasingly adopted to protect sensitive workloads from privileged adversaries such as the hypervisor. While they provide strong isolation guarantees, existing CVM architectures lack first-class mechanisms for inter-CVM data sharing due to their disjoint memory model, making inter-CVM data exchange a performance bottleneck in compartmentalized or collaborative multi-CVM systems. Under this model, a CVM's accessible memory is either shared with the hypervisor or protected from both the hypervisor and all other CVMs. This design simplifies reasoning about memory ownership; however, it fundamentally precludes plaintext data sharing between CVMs because all inter-CVM communication must pass through hypervisor-accessible …

Tl-Convlstm: A Transfer-Learning-Based Convolutional Lstm To Identify And Forecast Traffic In The Nextg Environments, Bikash Chandra Singh, Peter Foytik, Rafael Diaz, Sachin Shetty

School of Cybersecurity Faculty Publications

Forecasting and categorizing cellular traffic flows and their types are essential functions in intelligent network systems to ensure efficient network optimization. The ever-evolving nature of 5G networks results in fluctuations in traffic patterns over time, leading to a phenomenon known as model drift. Consequently, accurately predicting and identifying cellular traffic patterns becomes a complex task. To tackle this challenge, this article introduces an innovative approach called TL-ConvLSTM, which combines transfer learning with convolutional long short-term memory (ConvLSTM) to effectively combat model drift and provide precise forecasting and recognition of cellular traffic within the network. To accomplish this, we initiate the …

Kangaroo: Dynamic Fusion Of Branch Instructions In A Pipelined Uniprocessor, Sarah E. Larkin

Dissertations, Master's Theses and Master's Reports

Small pipelined processors are becoming more common as a complement to superscalars in a multi-core chip. However, current uniprocessors offer little in the way of ILP. We present kangaroo, a novel approach to instruction fusion in a pipelined processor. Kangaroo dynamically fuses two adjacent instructions to create a pair that travels through the pipeline as a unit. The instructions re-enter the pipeline as a pair the next time the first instruction is fetched. Unlike in prior art, an instruction, once fused, is not fetched again. Any pair of adjacent instructions can be fused using this technique, including dependent instructions. …

Introduction To Computer Architecture And Operating Systems, Kevin Preston

Open Educational Resources (OER)

Computer architecture is a set of rules and methods that describe the functionality, organization, and implementation of computer systems. The architecture of a system refers to its structure in terms of separately specified components of that system and their interrelationships.

In a similar manner to other uses of the word architecture, computer architecture is focused on determining the needs of the user/system/technology and creating a logical design and standards based on those requirements.

The goals for this course include:

• To learn how to write advanced ARM Assembly Language programs for the Raspberry Pi and the relationship of these instructions to …

Analyzing Microarchitectural Residue In Various Privilege Strata To Identify Computing Tasks, Tor J. Langehaug

Theses and Dissertations

Modern multi-tasking computer systems run numerous applications simultaneously. These applications must share hardware resources including the Central Processing Unit (CPU) and memory while maximizing each application’s performance. Tasks executing in this shared environment leave residue which should not reveal information. This dissertation applies machine learning and statistical analysis to evaluate task residue as footprints which can be correlated to identify tasks. The concept of privilege strata, drawn from an analogy with physical geology, organizes the investigation into the User, Operating System, and Hardware privilege strata. In the User Stratum, an adversary perspective is taken to build an interrogator program that …

Modeling And Architectural Simulations Of The Statistical Static Timing Analysis Of The Variation Sources For Vlsi Circuits, Abu M. Baker

College of Engineering: Graduate Celebration Programs

As CMOS technology scales down, process variation introduces significant uncertainty in power and performance to VLSI circuits and significantly affects their reliability. Although Static-Timing Analysis (STA) remains an excellent tool, current trends in process scaling have imposed significant difficulties to STA. As one of the promising solutions, Statistical static timing analysis (SSTA) has become the frontier research topic in recent years in combating such variation effects. This poster will be focusing on two aspects of SSTA and its applications in VLSI designs: (1) Statistical timing modeling and analysis; and (2) Architectural implementations of the atomic operations (max and add) using …

Pvw: Designing Virtual World Server Infrastructure, Francis Chang, C. Mic Bowman, Wu-Chi Feng

Computer Science Faculty Publications and Presentations

This paper presents a high level overview of PVW (Partitioned Virtual Worlds), a distributed system architecture for the management of virtual worlds. PVW is designed to support arbitrarily large and complex virtual worlds while accommodating dynamic and highly variable user population and content distribution density. The PVW approach enables the task of simulating and managing the virtual world to be distributed over many servers by spatially partitioning the environment into a hierarchical structure. This structure is useful both for balancing the simulation load across many nodes, as well as features such as geometric simplification and distribution of dynamic content.

Xpu: A Distributed Architecture For Metaverses, Francis Chang, C. Mic Bowman, Wu-Chi Feng

Computer Science Faculty Publications and Presentations

A significant problem of designing 3D virtual worlds (such as metaverses) is developing a scalable architecture that can manage millions of simultaneous users in an interactive 3D environment. This paper presents XPU (Extremely Partitioned Universe), a hierarchical client-server architecture for developing highly scalable metaverses. This design addresses the problem of dynamically partitioning the world to manage network and computing resources.

Multi-Core Processors And The Future Of Parallelism In Software, Ryan Christopher Youngman

Theses Digitization Project

The purpose of this thesis is to examine multi-core technology. Multi-core architecture provides benefits such as less power consumption, scalability, and improved application performance enabled by thread-level parallelism.

Keynote: Emerging Era Of Cooperative Empowerment: Grid, Peer-To-Peer, And Community Computing, Dr. Javed I. Khan

International Conference on Information and Communication Technologies

In this paper we discuss an emerging trend in high performance computing-the social or community computing. The emergence of screensaver computing, grid computing, peer-to-peer systems, and their demonstrated ability to garner computing power as potent as the supercomputers seems to be auspicious. In this paper we discuss the new phenomenon of community computing-including their potential applications in solving a new set of grand challenge problems. We also discuss the previously uncharted technological challenges architects of these new paradigms are addressing.

Implementing Simple Protocols In Multiple Processors Control Applications, Steve Hsiung, Tyson Mccall, Corinne Ransberger

Engineering Technology Faculty Publications

Using microprocessor/microcontroller in various control applications is not only one of the major topics in Engineering Technology curricula, but also of interest in industry applications. To accomplish it correctly the process of designing application programs starts from the individual module development through extensive testing, verification, and modification. Applying these developed modules in a useful manner requires the links and integrations that lead to the practical project implementation. Frequently, in students' senior project designs and faculty's research plans, the microprocessor/microcontroller resources become scarce or cause conflicts during the modules' integration stage. To accommodate the shortfall of the resources and resolve any …

Creating Enterprise Simulations Using High Level Architecture, Anton R. Lidums

Electrical & Computer Engineering Theses & Dissertations

Despite an established need, there are two remaining roadblocks to building distributed simulations and enterprise simulation systems. First, commercial simulation packages and engineering modeling tools are not readily distributable across multiple computers and have traditionally had very little impetus for utilizing a distributable format. Second, although HLA simulations have been built and there are tools to facilitate those efforts, very little has been done or written that specifically describes a "non-standard" integration implementation in sufficient detail to make the process reusable or repeatable. This thesis introduces a proof of concept prototype that was developed to integrate simulations. The paper presents …

A Multi-Agent Architecture For Internet Distributed Computing System, Rodelyn Reyes Samson

Theses Digitization Project

This thesis presents the developed taxonomy of the agent-based distributed computing systems. Based on this taxonomy, a design, implementation, analysis and distribution protocol of a multi-agent architecture for internet-based distributed computing system was developed. A prototype of the designed architecture was implemented on Spider III using the IBM Aglets software development kit (ASDK 2.0) and the language Java.

A Study Of Dynamic Optimization Techniques: Lessons And Directions In Kernel Design, Calton Pu, Jonathan Walpole

Computer Science Faculty Publications and Presentations

The Synthesis kernel [21,22,23,27,28] showed that dynamic code generation, software feedback, and fine-grain modular kernel organization are useful implementation techniques for improving the performance of operating system kernels. In addition, and perhaps more importantly, we discovered that there are strong interactions between the techniques. Hence, a careful and systematic combination of the techniques can be very powerful even though each one by itself may have serious limitations. By identifying these interactions we illustrate the problems of applying each technique in isolation to existing kernels. We also highlight the important common under-pinnings of the Synthesis experience and present our ideas on …

Smimd - A Synchronous Multiple Instruction Multiple Data Computer Architecture, Cathy C. Roberts

Computer Science Theses & Dissertations

This thesis assesses the feasibility of utilizing a hypercube interconnect topology to link a heterogeneous processor array in a very long instruction word (VLIW) computer architecture. The research focused upon the selection of a suitable arrangement of processors for the computer and the subsequent demonstration of the architecture's capability to handle simple loop iterations. Previous attempts at VLIW computer design are summarized, the new SMIMD architecture is presented, and suggestions for future research are given. The thesis concludes with results of the initial performance evaluations of the architecture design.

Software Tools For Performance Evaluation Of Concurrent Processing, Rodrogo A. Obando

Electrical & Computer Engineering Theses & Dissertations

The development and use of software tools for performance evaluation of concurrent processing is presented in this thesis. The particular concurrent processing architecture proposed by Stoughton and Mielke is investigated. The modelling of this architecture is based on Petri net theory and it can be studied making use of circuit theory. Computation of lower bounds for Time Between Outputs (TBO) and Time Between Input and Output (TBIO) can be accomplished by using principles of circuit theory, among others. This new modelling needs to be deeply evaluated and studied. This evaluation and study is accomplished with the tools developed and presented …