VLSI and Circuits, Embedded and Hardware Systems Commons^™

Smart Wall Plug Design For The Dc House Project, Edward Constant Sibal

Master's Theses

The DC House project at Cal Poly State University faces a challenge of supplying DC voltage to household appliances. Each appliance in the DC House constitutes a DC load that has a unique voltage and power rating, hence the need to develop a smart DC wall plug that will automatically adjust to the operating voltage required by any DC load. This thesis entails a proof of concept design of the smart DC wall plug which can automatically detect an appliance’s voltage rating. The design employs a dc-dc converter in conjunction with a microcontroller to sense load current to properly adjust …

Touchspice Vs. Reactive-Spice: A Human-Computer Interaction Perspective, Joshua Martin O'Hara

Master's Theses

Traditional SPICE simulation tools and applications of circuit theory lack real-time interaction and feedback. The goal of this thesis was to create an interactive physical environment to allow the manipulation and simulation of discrete electrical components in near-real-time while optimizing and streamlining the human-computer interaction (HCI) elements to make the user experience as positive and transparent as possible. This type of HCI and near-real-time simulation feedback would allow for the instant realization of how the parameters of each discrete component or hardware module affect the overall simulation and response of the circuit.

The scope of this thesis is to research, …

Adaptive Energy Management Scheme In Real-Time Energy Harvesting Embedded Systems, Shruti Khare

Master's Theses

The main purpose of this thesis was to develop an online adaptive energy management scheme for energy harvesting embedded systems. Two energy prediction schemes were used, namely Exponentially Weighted Moving Average (EWMA) and Adaptive Forward Prediction (AFP), to schedule all the tasks with least deadline miss rate. The AFP scheme has a mean relative error of 6-10% which is much lower than exponentially weighted moving average (EWMA) algorithm with an error of 30%. The large difference in the error percentage between the two prediction algorithms is due to the adaptive nature of AFP as it tracks small changes in input …

Reliable Software Updates For On-Orbit Cubesat Satellites, Sean Fitzsimmons

Master's Theses

CubeSat satellites have redefined the standard solution for conducting missions in space due to their unique form factor and cost. The harsh environment of space necessitates examining features that improve satellite robustness and ultimately extend lifetime, which is typical and vital for mission success. The CubeSat development team at Cal Poly, PolySat, has recently redefined its standard avionics platform to support more complex mission capabilities with this robustness in mind. A significant addition was the integration of the Linux operating system, which provides the flexibility to develop much more elaborate protection mechanisms within software, such as support for remote on-orbit …

Linear Power-Efficient Rf Amplifier With Partial Positive Feedback, Matthew E. King

Master's Theses

Over the last decade, the number of mobile wireless devices on the market has increased substantially. New “multi-carrier” modulation schemes, such as OFDM, WCDMA, and WiMAX, have been developed to accommodate the increasing number of wireless subscribers and the demand for faster data rates within the limited commercial frequency spectrum. These complex modulation schemes create signals with high peak-to-average power ratios (PAPR), exhibiting rapid changes in the signal magnitude. To accommodate these high-PAPR signals, RF power amplifiers in mobile devices must operate under backed-off gain conditions, resulting in poor power efficiency. Various efficiency-enhancement solutions have been realized for backed-off devices …

Full Custom Vlsi Design Of On-Line Stability Checkers, Chris Y. Lee

Master's Theses

A stability checker is a clocked storage element, much like a flip-flop, which detects unstable and late signals in the pipeline of a digital system. The On-line stability checker operates concurrently with its associated circuit-under-test (CUT). This thesis describes the full custom very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course at Cal Poly.

A method for concurrent fault testing called On-line Stability Checking …

Asynchronous Mips Processors: Educational Simulations, Robert L. Webb

Master's Theses

The system clock has been omnipresent in most mainstream chip designs. While simplifying many design problems the clock has caused the problems of clock skew, high power consumption, electromagnetic interference, and worst-case performance. In recent years, as the timing constraints of synchronous designs have been squeezed ever tighter, the efficiencies of asynchronous designs have become more attractive. By removing the clock, these issues can be mitigated. How- ever, asynchronous designs are generally more complex and difficult to debug. In this paper I discuss the advantages of asynchronous processors and the specifics of some asynchronous designs, outline the roadblocks to asynchronous …

Design Techniques To Improve Time Dependent Dielectric Breakdown Based Failure For Cmos Circuits, Emanuel S. Tarog

Master's Theses

This project investigates the failure of various CMOS circuits as a result of Time Dependent Dielectric Breakdown (TDDB) and explores design techniques to increase the mean time to failure (MTTF) of large-scale circuits. Time Dependent Dielectric Breakdown is a phenomenon where the oxide underneath the gate degrades as a result of the electric field in the material. Currently, there are few well documented design techniques that can increase lifetime, but with a tool chain I created called the MTTF Analyzing Program, or MAP, I was able to test circuits under various conditions in order to identify weak links, discover relationships, …