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Articles 1 - 10 of 10
Full-Text Articles in Signal Processing
A Sindy Hardware Accelerator For Efficient System Identification On Edge Devices, Michael Sean Gallagher
A Sindy Hardware Accelerator For Efficient System Identification On Edge Devices, Michael Sean Gallagher
Master's Theses
The SINDy (Sparse Identification of Non-linear Dynamics) algorithm is a method of turning a set of data representing non-linear dynamics into a much smaller set of equations comprised of non-linear functions summed together. This provides a human readable system model the represents the dynamic system analyzed. The SINDy algorithm is important for a variety of applications, including high precision industrial and robotic applications. A Hardware Accelerator was designed to decrease the time spent doing calculations. This thesis proposes an efficient hardware accelerator approach for a broad range of applications that use SINDy and similar system identification algorithms. The accelerator is …
Accelerating Machine Learning Inference For Satellite Component Feature Extraction Using Fpgas., Andrew Ekblad
Accelerating Machine Learning Inference For Satellite Component Feature Extraction Using Fpgas., Andrew Ekblad
Theses and Dissertations
Running computer vision algorithms requires complex devices with lots of computing power, these types of devices are not well suited for space deployment. The harsh radiation environment and limited power budgets have hindered the ability of running advanced computer vision algorithms in space. This problem makes running an on-orbit servicing detection algorithm very difficult. This work proposes using a low powered FPGA to accelerate the computer vision algorithms that enable satellite component feature extraction. This work uses AMD/Xilinx’s Zynq SoC and DPU IP to run model inference. Experiments in this work centered around improving model post processing by creating implementations …
An Fpga-Based Hardware Accelerator For The Digital Image Correlation Engine, Keaten Stokke
An Fpga-Based Hardware Accelerator For The Digital Image Correlation Engine, Keaten Stokke
Graduate Theses and Dissertations
The work presented in this thesis was aimed at the development of a hardware accelerator for the Digital Image Correlation engine (DICe) and compare two methods of data access, USB and Ethernet. The original DICe software package was created by Sandia National Laboratories and is written in C++. The software runs on any typical workstation PC and performs image correlation on available frame data produced by a camera. When DICe is introduced to a high volume of frames, the correlation time is on the order of days. The time to process and analyze data with DICe becomes a concern when …
Controlling And Processing Core For Wireless Implantable Telemetry System, Naeeme Modir
Controlling And Processing Core For Wireless Implantable Telemetry System, Naeeme Modir
Electronic Thesis and Dissertation Repository
Wireless implantable telemetry systems are suitable choices for monitoring various physiological parameters such as blood pressure and volume. These systems typically compose of an internal device implanted into a living body captures the physiological data and sends them to an external base station located outside of the body for further processing. The internal device usually consists of a sensor interface to convert the collected data to electrical signals; a digital core to digitize the analog signals, process them and prepare them for transmission; an RF front-end to transmit the data outside the body and to receive the required commands from …
Digital Graphic Equalizer Implemented Using An Fpga, Anthony Giardina
Digital Graphic Equalizer Implemented Using An Fpga, Anthony Giardina
Electrical Engineering
A graphic equalizer is a device that adjusts the tonal quality of an audio signal. When sound is converted from a digital format to analog sound waves, there are amplification and transducing steps in-between the two formats. Common devices to perform these tasks are speakers, amplifiers, DACs, etc. Many of these devices exhibit a non-uniform frequency response over the range of human hearing. Thus, it is possible that certain frequency ranges of the audio signal will be amplified and others will be attenuated. To counteract this, an audio equalizer can be used to boost and attenuate certain frequency ranges within …
Design, Implementation, And Analysis Of A Time Of Arrival Measurement System For Rotating Machinery, Bryan Will Hayes
Design, Implementation, And Analysis Of A Time Of Arrival Measurement System For Rotating Machinery, Bryan Will Hayes
Masters Theses
The Non-contact Stress Measurement System (NSMS) acquires critical time of arrival data from multiple optical probes viewing a rotating piece of machinery, such as blades on a turbine engine rotor. The signal from each probe must be converted from light energy to an electrical signal, conditioned, and timed by a high speed counter to measure the time of arrival of the rotating machinery. This thesis describes, in detail, the design and analysis of the photo-detector electronics, analog signal conditioning electronics, and the timing electronics utilized in measuring the time of arrival. To measure the time of arrival with precision, the …
Turbo Bayesian Compressed Sensing, Depeng Yang
Turbo Bayesian Compressed Sensing, Depeng Yang
Doctoral Dissertations
Compressed sensing (CS) theory specifies a new signal acquisition approach, potentially allowing the acquisition of signals at a much lower data rate than the Nyquist sampling rate. In CS, the signal is not directly acquired but reconstructed from a few measurements. One of the key problems in CS is how to recover the original signal from measurements in the presence of noise. This dissertation addresses signal reconstruction problems in CS. First, a feedback structure and signal recovery algorithm, orthogonal pruning pursuit (OPP), is proposed to exploit the prior knowledge to reconstruct the signal in the noise-free situation. To handle the …
The Effect Of The Digit Slicing Architecture On The Fft Butterfly, Yazan Samir, Rozita Teymourzadeh
The Effect Of The Digit Slicing Architecture On The Fft Butterfly, Yazan Samir, Rozita Teymourzadeh
Dr. Rozita Teymourzadeh, CEng.
Vlsi Implementation Of Novel Class Of High Speed Pipelined Digital Signal Processing Filter For Wireless Receivers, Rozita Teymourzadeh, Yazan Samir, Shabuil Islam, Masuri Othman, Mok Vh
Vlsi Implementation Of Novel Class Of High Speed Pipelined Digital Signal Processing Filter For Wireless Receivers, Rozita Teymourzadeh, Yazan Samir, Shabuil Islam, Masuri Othman, Mok Vh
Dr. Rozita Teymourzadeh, CEng.
On-Chip Implementation Of High Resolution High Speed Floating Point Adder/Subtractor With Reducing Mean Latency For Ofdm, Rozita Teymourzadeh, Yazan Samir, Nooshin Mahdavi, Masuri Othman
On-Chip Implementation Of High Resolution High Speed Floating Point Adder/Subtractor With Reducing Mean Latency For Ofdm, Rozita Teymourzadeh, Yazan Samir, Nooshin Mahdavi, Masuri Othman
Dr. Rozita Teymourzadeh, CEng.