Electrical and Computer Engineering Commons^™

Modernization Of Laboratory Curriculum For The Undergraduate Digital Systems Course, Brolyne H. Onyango

Electrical Engineering Theses

We introduce a novel hybrid approach to modernize the curriculum for the Digital Systems course, using traditional circuit construction, simulation software and implementation of circuits using reconfigurable logic. The NI Multisim circuit simulation software and a Digilent Basys-3 board are utilized. Students will use a breadboard and chips to construct basic combinational circuits using logic gates. Next, they will use the NI Multisim to build and simulate circuits that are difficult to build physically. Finally, an FPGA board will be utilized to implement the most complex circuits. Typically, the use of FPGA technology requires knowledge of HDL, which is considered …

Neutron Beam Testing Methodology And Results For A Complex Programmable Multiprocessor Soc, Jordan Daniel Anderson

Theses and Dissertations

The Xilinx Multiprocessor System-on-Chip (MPSoC) is a complex device that uses 16nm FinFET technology to combine multiple processors, a large amount of FPGA resources, and many I/O interfaces on a single chip die. These features make the MPSoC a high-performance and architecturally flexible device. The potential computing power makes the MPSoC ideal for many embedded applications including terrestrial and space applications. The MPSoC, however, does not have extensive radiation history as many other devices have. The extent of the effect that ionized particles may have on the MPSoC is not well established. To solve this problem, neutron radiation testing can …

Compact Hardware Implementation Of A Sha-3 Core For Wireless Body Sensor Networks, Yi Yang, Debiao He, Neeraj Kumar, Sherali Zeadally

Information Science Faculty Publications

One of the most important Internet of Things applications is the wireless body sensor network (WBSN), which can provide universal health care, disease prevention, and control. Due to large deployments of small scale smart sensors in WBSNs, security, and privacy guarantees (e.g., security and safety-critical data, sensitive private information) are becoming a challenging issue because these sensor nodes communicate using an open channel, i.e., Internet. We implement data integrity (to resist against malicious tampering) using the secure hash algorithm 3 (SHA-3) when smart sensors in WBSNs communicate with each other using the Internet. Due to the limited resources (i.e., storage, …

A Flexible Fpga-Assisted Framework For Remote Attestation Of Internet Connected Embedded Devices, Jared Russell Patten

Theses and Dissertations

Embedded devices permeate our every day lives. They exist in our vehicles, traffic lights, medical equipment, and infrastructure controls. In many cases, improper functionality of these devices can present a physical danger to their users, data or financial loss, etc. Improper functionality can be a result of software or hardware bugs, but now more than ever, is often the result of malicious compromise and tampering, or as it is known colloquially "hacking". We are beginning to witness a proliferation of cyber-crime, and as more devices are built with internet connectivity (in the so called "Internet of Things"), security should be …

Towards Tools For Achieving Third-Party Ip Assurance, Sean Talbot Jensen

Theses and Dissertations

Intellectual Property (IP) is used to speed up the design process and save money. The use of IP and complex CAD tools reduce visibility into the design and what is actually happening during synthesis and implementation. All of the complexity makes it easier for an attacker to insert malicious logic or tamper with the design in ways that are difficult to detect. Not very much work has been done towards the creation of tools to facilitate the safe use of 3rd-party IP. This work presents Physical and Functional Assurance, two approaches that aim to accomplish this task through physically and …

Highly Accurate And Sensitive Short Read Aligner, Mehmet Yağmur Gök, Sezer Gören Uğurdağ, Cem Ünsalan, Mahmut Şami̇l Sağiroğlu

Turkish Journal of Electrical Engineering and Computer Sciences

Next-generation sequencing generates large numbers of short reads from DNA. This makes it difficult to process and store. Therefore, efficient sequence alignment and mapping techniques are needed in bioinformatics. Alignment and mapping are the basic steps involved in genetic data analysis. The Smith-Waterman (SW) algorithm, a well-known dynamic programming algorithm, is often used for this purpose. In this work, we propose to utilize Phred quality scores in Gotoh's affine gap model to increase the accuracy and sensitivity of the SW algorithm. Hardware platforms such as FPGAs and GPUs are commonly used to solve computationally expensive problems. In this work, a …

Fpga-Based On-Board Geometric Calibration For Linear Ccd Array Sensors, Guoqing Zhou, Linjun Jiang, Jingjin Huang, Rongting Zhang, Dequan Liu, Xiang Zhou, Oktay Baysal

Mechanical & Aerospace Engineering Faculty Publications

With increasing demands in real-time or near real-time remotely sensed imagery applications in such as military deployments, quick response to terrorist attacks and disaster rescue, the on-board geometric calibration problem has attracted the attention of many scientists in recent years. This paper presents an on-board geometric calibration method for linear CCD sensor arrays using FPGA chips. The proposed method mainly consists of four modules—Input Data, Coefficient Calculation, Adjustment Computation and Comparison—in which the parallel computations for building the observation equations and least squares adjustment, are implemented using FPGA chips, for which a decomposed matrix inversion method is presented. A Xilinx …

Fpga-Based Ir Localization Sensor, Samuel I. Susanto

Browse all Theses and Dissertations

Pursuit-evasion scenarios are common in both natural and man-made systems. Often times, the pursuer and evader maneuver in response to each others actions using relative information based on the geometry of the agents and potential obstacles within the environment. The pursuer needs the target's bearing angle in order to plan a trajectory or path to capture it. We propose an FPGA-based infrared sensor array to detect up to 6 agents' bearing angles simultaneously. The final output of the sensor is the bearing angle of other agents. The sensor was tested and validated experimentally. Implementing the sensor and transmitter pair on …

Analysis Of High Performance Scientific Programming Workflows, Withana Kankanamalage Umayanganie Klaassen

Open Access Theses & Dissertations

Substantial time is spent on building, optimizing and maintaining large-scale software that is run on supercomputers. However, little has been done to utilize overall resources efficiently when it comes to including expensive human resources. The community is beginning to acknowledge that optimizing the hardware performance such as speed and memory bottlenecks contributes less to the overall productivity than does the development lifecycle of high-performance scientific applications. Researchers are beginning to look at overall scientific workflows for high performance computing. Scientific programming productivity is measured by time and effort required to develop, configure, and maintain a simulation experiment and its constituent …

Des And Tdes Performance Evaluation For Non-Pipelined And Pipelined Implementations In Vhdl Using The Cyclone Ii Fpga Technology, Edni Del Rosal

Theses and Dissertations

Two ongoing issues that engineers must face in the new era of data analytics are performance and security. Field Programmable Gate Arrays (FPGAs) offer a new solution for optimizing the performance of applications while the Data Encryption Standard (DES) and the Triple Data Encryption Standard (TDES) offer a mean to secure information. In this thesis we present a Non-Pipelined and Pipelined, in Electronic Code Book (EBC) mode, implementations in VHDL of these two commonly utilized cryptography schemes. Using Altera Cyclone II FPGA as our platform, we design and verify the implementations with the EDA tools provided by Altera. We gather …

Energy-Efficient Fpga-Based Parallel Quasi-Stochastic Computing, Ramu Seva, Prashanthi Metku, Minsu Choi

Electrical and Computer Engineering Faculty Research & Creative Works

The high performance of FPGA (Field Programmable Gate Array) in image processing applications is justified by its flexible reconfigurability, its inherent parallel nature and the availability of a large amount of internal memories. Lately, the Stochastic Computing (SC) paradigm has been found to be significantly advantageous in certain application domains including image processing because of its lower hardware complexity and power consumption. However, its viability is deemed to be limited due to its serial bitstream processing and excessive run-time requirement for convergence. To address these issues, a novel approach is proposed in this work where an energy-efficient implementation of SC …

A Fast Fpga Implementation For Triple Des Encryption Scheme, Edni Del Rosal, Sanjeev Kumar

Electrical and Computer Engineering Faculty Publications

In cryptography, the Triple DES (3DES, TDES or officially TDEA) is a symmetric-key block cipher which applies the Data Encryption Standard (DES) cipher algorithm three times to each data block. Electronic payment systems are known to use the TDES scheme for the encryption/decryption of data, and hence faster implementations are of great significance. Field Programmable Gate Arrays (FPGAs) offer a new solution for optimizing the performance of applications meanwhile the Triple Data Encryption Standard (TDES) offers a mean to secure information. In this paper we present a pipelined implementation in VHDL, in Electronic Code Book (EBC) mode, of this commonly …

A Gps Signal Generator Using A Roach Fpga Board, Kurt L. Pedrosa

Doctoral Dissertations and Master's Theses

A Global Positioning System (GPS) signal simulator is a valuable testing tool. It allows for testing of GPS receivers, systems, and anti-spoofing algorithms. With the increased popularity of software defined radios (SDRs) merging GPS signal simulators and SDRs is a natural choice. A detailed review of the construction of a GPS signal generator using the ROACH processing board is presented herein. The ROACH, developed by the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER) team, is a processing board that can be configure to function as a SDR. In this research, the ROACH was transformed to function as a …

Academic Packing For Commercial Fpga Architectures, Travis D. Haroldsen

Theses and Dissertations

With a few exceptions, academic packing algorithms for FPGAs are typically applied solely to theoretical architectures. This has allowed the algorithms to focus on the basic components of packing while abstracting away many of the details dictated by real hardware. As commercially available FPGAs have advanced, however, the academic algorithms and architectures have diverged significantly from their commercial counterparts. In this dissertation, the RapidSmith 2 framework is presented. This framework accurately reflects the architecture of Xilinx FPGAs and provides support for integrating custom tools into the commercial CAD tools. Using this framework, the RSVPack packing algorithm is implemented. The RSVPack …

Vivado Design Interface: Enabling Cad-Tool Design For Next Generation Xilinx Fpga Devices, Thomas James Townsend

Theses and Dissertations

The popularity of field-programmable gate arrays (FPGA) has grown in recent years due to their potential performance advantages over sequential software, and as a prototyping platform for application-specific integrated circuits (ASIC). Vendors such as Xilinx offer automated tool suites that can be used to program FPGAs based on a RTL description. These tool suites are sufficient forgeneral users, but they usually don't provide the opportunity to integrate custom computer-aideddesign (CAD) tools into the regular design flow. Xilinx first offered this capability in their ISE tool suite with the Xilinx Design Language (XDL). Using XDL, a Xilinx design could be extracted …

General-Purpose Digital Filter Platform, Michael Cheng

Electrical Engineering

This senior project provides a platform for high-speed, general-purpose digital filter implementation. EE 459 currently implements digital filters using reprogrammable digital signal processor boards. These aging digital signal processors serially calculate each difference equation term. Operating at 1 Mega-sample per second, the new general-purpose platform simultaneously processes at least ten digital filtering difference equation coefficients. The platform also features an audio jack input and BNC connectors for viewing input and output signals. The filter digitizes single channel audio signals at 44.1 kHz sampling rate with 16-bit precision or 1 MHz sampling at 8-bit precision. The new reprogrammable platform includes a …

Using On-Chip Error Detection To Estimate Fpga Design Sensitivity To Configuration Upsets, Andrew Mark Keller

Theses and Dissertations

SRAM-based FPGAs provide valuable computation resources and reconfigurability; however, ionizing radiation can cause designs operating on these devices to fail. The sensitivity of an FPGA design to configuration upsets, or its SEU sensitivity, is an indication of a design's failure rate. SEU mitigation techniques can reduce the SEU sensitivity of FPGA designs in harsh radiation environments. The reliability benefits of these techniques must be determined before they can be used in mission-critical applications and can be determined by comparing the SEU sensitivity of an FPGA design with and without these techniques applied to it. Many approaches can be taken to …

High-Speed Programmable Fpga Configuration Memory Access Using Jtag, Ammon Bradley Gruwell

Theses and Dissertations

Over the past couple of decades Field Programmable Gate Arrays (FPGAs) have become increasingly useful in a variety of domains. This is due to their low cost and flexibility compared to custom ASICs. This increasing interest in FPGAs has driven the need for tools that both qualify and improve the reliability of FPGAs for applications where the reconfigurability of FPGAs makes them vulnerable to radiation upsets such as in aerospace environments. Such tools ideally work with a wide variety of devices, are highly programmable but simple to use, and perform tasks at relatively high speeds. Of the various FPGA configuration …

Architecture, Simulation, And Implementation Of Commodity Computer Components In Software Defined Radio Systems, Amean Al-Safi

Dissertations

Radio communications have evolved through an extended history of theoretical and practical component development into modern devices most often envisioned as the ubiquitous smart phones found in almost everyone’s hand on a university campus. During this development, radios have evolved from analog devices operating at low frequencies into nearly all digital processing systems referred to as Software Defined Radio (SDR) operating in frequency bands over 1 Gigahertz. Although specific forms and types of communication are fiercely pursued by commercial communication companies and industry, there remain numerous concepts where further advancement is possible, and applications, possibly less commercially viable, where advancements …

A Reconfigurable Trusted Platform Module, Matthew David James

Theses and Dissertations

A Trusted Platform Module (TPM) is a security device included in most modern desktop and laptop computers. It helps keep the computing environment secure by isolating cryptographic functions and data from the CPU. A TPM is usually implemented with a small microcontroller which is near the main processor. In addition to a microcontroller, it may employ hardware acceleration to assist in cryptographic computations. When vulnerabilities are found, or new algorithms developed, TPMs become obsolete because the hardware accelerators cannot be upgraded. This thesis presents a proof of concept implementation of a TPM on an FPGA. By using an FPGA, the …

Modeling And Control Of A Permanent-Magnet Brushless Dc Motor Drive Using A Fractional Order Proportional-Integral-Derivative Controller, Swapnil Khubalkar, Anjali Junghare, Mohan Aware, Shantanu Das

Turkish Journal of Electrical Engineering and Computer Sciences

This paper deals with the speed control of a permanent-magnet brushless direct current (PMBLDC) motor. A fractional order PID (FOPID) controller is used in place of the conventional PID controller. The FOPID controller is a generalized form of the PID controller in which the order of integration and differentiation is any real number. It is shown that the proposed controller provides a powerful framework to control the PMBLDC motor. Parameters of the controller are found by using a novel dynamic particle swarm optimization (dPSO) method. The frequency domain pole-zero (p-z) interlacing method is used to approximate the fractional order operator. …

Implementation Of A Java Processor On A Fpga, Omkar Joshi

Electrical Engineering Theses - Archive

Java, a programming language developed by Sun Microsystems in 1991, now managed by Oracle, has become one of the most popular computer languages for application development. This popularity can be credited to Java being architectural neutral and portable. It means that a Java program executed on any computer will yield the same result, irrespective of the underlying hardware. When a Java program is compiled it creates a Java class file. The class file contains instructions known as Bytecodes, which are executed by the Java Virtual Machine (JVM). The JVM is an abstract processor, which interprets and translates the bytecodes into …

Automatic Arrhythmia Beat Detection: Algorithm, System, And Implementation, Wisnu Jatmiko, I Md. Agus Setiawan, Muhammad Ali Akbar, Muhammad Eka Suryana, Yulistiyan Wardhana, Muhammad Febrian Rachmadi

Makara Journal of Technology

Cardiac disease is one of the major causes of death in the world. Early diagnose of the symptoms depends on abnormality on heart beat pattern, known as Arrhythmia. A novel fuzzy neuro generalized learning vector quantization for automatic Arrhythmia heart beat classification is proposed. The algorithm is an extension from the GLVQ algorithm that employs a fuzzy logic concept as the discriminant function in order to develop a robust algorithm and improve the classification performance. The algorithm is tested against MIT-BIH arrhythmia database to measure the performance. Based on the experiment result, FN-GLVQ is able to increase the accuracy of …

Duplicate With Choose: Using Statistics For Fault Mitigation, Jon-Paul Anderson

Theses and Dissertations

This dissertation presents a novel technique called duplicate with choose (DWCh) which is a modification of the fault detection technique duplicate with compare (DWC). DWCh adds a smart decider block to DWC that monitors the duplicated circuits and decides which circuit is fault free when a fault occurs. If chosen correctly, DWCh is able to mask faults at a lower cost than conventional techniques like TMR.This dissertation derives reliability expressions for DWCh showing that under ideal conditions its reliability exceeds the most commonly used fault masking technique for spacecraft, triple modular redundancy. For non-ideal conditions, DWCh provides a lower cost …

A Parameterized Implementation Of A Hybrid Fuzzy Boolean Finite State Machine Using An Fpga, Sean T. Fuller

Masters Theses

A fuzzy system based on the extended Hybrid Fuzzy Boolean Finite State Machine (HFBFSM) model is designed and implemented in a Xilinx Zynq® all programmable System on Chip (SoC). The system allows for a single dominant crisp state and multiple non-dominant states to be activated simultaneously. A method is proposed to calculate the degree of membership of non-dominant states, β, by the distance of defuzzified fuzzy inputs to state transition trigger mechanisms.

The HFB-FSM is was realized by the author using custom logic written in VHDL (Very High Speed Integrated Circuit (VHSIC) Hardware Description Language) in the Programmable Logic (PL) …

Using Source-To-Source Transformations To Add Debug Observability To Hls-Synthesized Circuits, Joshua Scott Monson

Theses and Dissertations

This dissertation introduces a novel approach for exposing the internal, source-level expressions of circuits generated by high-level synthesis (HLS) for in-circuit debug. The approach uses source-to-source transformations to instrument specific source-level expressions with debug ports. These debug ports allow a user to connect a debugging instrument (e.g. an embedded logic analyzer) to record the activity of the expression corresponding to the debug port. This dissertation demonstrates that a debugging solution based on these source-to-source transformations is feasible and that individual debug ports can be added for a cost of a 1-2% increase in circuit area on average. It also introduces …

Measuring Soft Error Sensitivity Of Fpga Soft Processor Designs Using Fault Injection, Nathan Arthur Harward

Theses and Dissertations

Increasingly, soft processors are being considered for use within FPGA-based reliable computing systems. In an environment in which radiation is a concern, such as space, the logic and routing (configuration memory) of soft processors are sensitive to radiation effects, including single event upsets (SEUs). Thus, effective tools are needed to evaluate and estimate how sensitive the configuration memories of soft processors are in high-radiation environments. A high-speed FPGA fault injection system and methodology were created using the Xilinx Radiation Test Consortium's (XRTC's) Virtex-5 radiation test hardware to conduct exhaustive tests of the SEU sensitivity of a design within an FPGA's …

Gnu Radio Companion (Grc) On Software Defined Radio Platforms, Jacob Ramey, James Begemann, Richard Hite

Capstone Design Expo Posters

Software defined radio (SDR) is a method to design radio frequency (RF) signal systems using software to implement radio components that are normally implemented in hardware. Several examples of components that can be designed in SDR include RF signal filters, signal amplifiers, and signal resamplers. SDR applications include amateur radio transmission, aircraft and ship tracking, RF communications, and radio astronomy, to name a few. A great advantage of implementing a RF system in software is that the system developed in software is more flexible and upgradeable than a system designed with hardware alone.

QRC Technologies offers a wide range of …

An Alternative Carry-Save Arithmetic For New Generation Field Programmable Gate Arrays, Uğur Çi̇ni̇, Mustafa Aktan, Avni̇ Morgül

Turkish Journal of Electrical Engineering and Computer Sciences

In this work, a double carry-save addition operation is proposed, which is efficiently synthesized for 6-input LUT-based field programmable gate arrays (FPGAs). The proposed arithmetic operation is based on redundant number representation and provides carry propagation-free addition. Using the proposed arithmetic operation, a compact and fast multiply and accumulate unit is designed. To our knowledge, the proposed design provides the fastest multiply-add operation for 6-input LUT-based FPGA systems. A finite impulse response filter implementation is given to show the performance of the proposed structure. The proposed implementation provides a dramatic performance increase, which is at least 2 times faster than …

High Dynamic Performance Of A Bldc Motor With A Front End Converter Using An Fpga Based Controller For Electric Vehicle Application, Praveen Yadav, Rajesh Poola, Khaja Najumudeen

Turkish Journal of Electrical Engineering and Computer Sciences

This paper focus on a novel operation of a brushless dc (BLDC) motor fed by a proportional integral (PI) controlled buck--boost converter supplemented with a battery to provide the required power to drive the BLDC motor. The operational characteristics of the proposed BLDC motor drive system for constant as well as step changes in dc link voltage of a front end converter controlled by a Xilinx System Generator (XSG) based PI controller for two quadrant operations are derived. Thus a field programmable gate array (FPGA) based PI controller manages the energy flow through the battery and the front end converter. …