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Articles 61 - 90 of 150
Full-Text Articles in Hardware Systems
Towards Qos-Based Embedded Machine Learning, Tom Springer, Erik Linstead, Peiyi Zhao, Chelsea Parlett-Pelleriti
Towards Qos-Based Embedded Machine Learning, Tom Springer, Erik Linstead, Peiyi Zhao, Chelsea Parlett-Pelleriti
Engineering Faculty Articles and Research
Due to various breakthroughs and advancements in machine learning and computer architectures, machine learning models are beginning to proliferate through embedded platforms. Some of these machine learning models cover a range of applications including computer vision, speech recognition, healthcare efficiency, industrial IoT, robotics and many more. However, there is a critical limitation in implementing ML algorithms efficiently on embedded platforms: the computational and memory expense of many machine learning models can make them unsuitable in resource-constrained environments. Therefore, to efficiently implement these memory-intensive and computationally expensive algorithms in an embedded computing environment, innovative resource management techniques are required at the …
A Memory-Centric Customizable Domain-Specific Fpga Overlay For Accelerating Machine Learning Applications, Atiyehsadat Panahi
A Memory-Centric Customizable Domain-Specific Fpga Overlay For Accelerating Machine Learning Applications, Atiyehsadat Panahi
Graduate Theses and Dissertations
Low latency inferencing is of paramount importance to a wide range of real time and userfacing Machine Learning (ML) applications. Field Programmable Gate Arrays (FPGAs) offer unique advantages in delivering low latency as well as energy efficient accelertors for low latency inferencing. Unfortunately, creating machine learning accelerators in FPGAs is not easy, requiring the use of vendor specific CAD tools and low level digital and hardware microarchitecture design knowledge that the majority of ML researchers do not possess. The continued refinement of High Level Synthesis (HLS) tools can reduce but not eliminate the need for hardware-specific design knowledge. The designs …
Accelerating Graphics Rendering On Risc-V Gpus, Joshua Simpson
Accelerating Graphics Rendering On Risc-V Gpus, Joshua Simpson
Master's Theses
Graphics Processing Units (GPUs) are commonly used to accelerate massively parallel workloads across a wide range of applications from machine learning to cryptocurrency mining. The original application for GPUs, however, was to accelerate graphics rendering which remains popular today through video gaming and video rendering. While GPUs began as fixed function hardware with minimal programmability, modern GPUs have adopted a design with many programmable cores and supporting fixed function hardware for rasterization, texture sampling, and render output tasks. This balance enables GPUs to be used for general purpose computing and still remain adept at graphics rendering. Previous work at the …
Cloudbots: Autonomous Atmospheric Explorers, Akash Binoj
Cloudbots: Autonomous Atmospheric Explorers, Akash Binoj
Honors Scholar Theses
The CloudBot is an autonomous weather balloon that operates on the principle of variable buoyancy to ascend and descend in the atmosphere. This project aims to develop a device that will collect atmospheric measurements and communicate them mid-flight. The apparatus consists of a helium-filled balloon, the robotic payload, and an air cell. The fixed-volume helium balloon at the top provides an upwards buoyancy force, while the air cell at the bottom can hold a variable amount of pressure to adjust the weight of the CloudBot. By doing so, it is able to travel in storm conditions and collect valuable atmospheric …
Chapter 3: Basis, Basis Vectors, And Inner Product, Hiu Yung Wong
Chapter 3: Basis, Basis Vectors, And Inner Product, Hiu Yung Wong
Faculty Research, Scholarly, and Creative Activity
No abstract provided.
Chapter 27: Bloch Sphere And Single-Qubit Arbitrary Unitary Gate, Hiu Yung Wong
Chapter 27: Bloch Sphere And Single-Qubit Arbitrary Unitary Gate, Hiu Yung Wong
Faculty Research, Scholarly, and Creative Activity
No abstract provided.
Chapter 28: Quantum Phase Estimation, Hiu Yung Wong
Chapter 28: Quantum Phase Estimation, Hiu Yung Wong
Faculty Research, Scholarly, and Creative Activity
No abstract provided.
Side-Channel Analysis On Post-Quantum Cryptography Algorithms, Tristen Teague
Side-Channel Analysis On Post-Quantum Cryptography Algorithms, Tristen Teague
Computer Science and Computer Engineering Undergraduate Honors Theses
The advancements of quantum computers brings us closer to the threat of our current asymmetric cryptography algorithms being broken by Shor's Algorithm. NIST proposed a standardization effort in creating a new class of asymmetric cryptography named Post-Quantum Cryptography (PQC). These new algorithms will be resistant against both classical computers and sufficiently powerful quantum computers. Although the new algorithms seem mathematically secure, they can possibly be broken by a class of attacks known as side-channels attacks (SCA). Side-channel attacks involve exploiting the hardware that the algorithm runs on to figure out secret values that could break the security of the system. …
Structural Checking Tool Restructure And Matching Improvements, Derek Taylor
Structural Checking Tool Restructure And Matching Improvements, Derek Taylor
Graduate Theses and Dissertations
With the rising complexity and size of hardware designs, saving development time and cost by employing third-party intellectual property (IP) into various first-party designs has become a necessity. However, using third-party IPs introduces the risk of adding malicious behavior to the design, including hardware Trojans. Different from software Trojan detection, the detection of hardware Trojans in an efficient and cost-effective manner is an ongoing area of study and has significant complexities depending on the development stage where Trojan detection is leveraged. Therefore, this thesis research proposes improvements to various components of the soft IP analysis methodology utilized by the Structural …
A Method For Monitoring Operating Equipment Effectiveness With The Internet Of Things And Big Data, Carl D. Hays Iii
A Method For Monitoring Operating Equipment Effectiveness With The Internet Of Things And Big Data, Carl D. Hays Iii
Master's Theses
The purpose of this paper was to use the Overall Equipment Effectiveness productivity formula in plant manufacturing and convert it to measuring productivity for forklifts. Productivity for a forklift was defined as being available and picking up and moving containers at port locations in Seattle and Alaska. This research uses performance measures in plant manufacturing and applies them to mobile equipment in order to establish the most effective means of analyzing reliability and productivity. Using the Internet of Things to collect data on fifteen forklift trucks in three different locations, this data was then analyzed over a six-month period to …
Inventory Locating With Quuppa: The Design And Development Of A Real-Time Process Monitoring Web Application Solution, Dylan C. Moreland, Trevor J. Howell, John W. Takiff, Patrick S. Dillon, Theo E. Fritz, William K. Mcintyre
Inventory Locating With Quuppa: The Design And Development Of A Real-Time Process Monitoring Web Application Solution, Dylan C. Moreland, Trevor J. Howell, John W. Takiff, Patrick S. Dillon, Theo E. Fritz, William K. Mcintyre
Industrial and Manufacturing Engineering
Viasat, Inc. requires precise inventory tracking at their production facility in San Diego, CA. Viasat has installed the Quuppa indoor real-time locating system (RTLS), which it uses to track the real-time position of high-value work-in-process items. In its current state, the system only displays in-the-moment location information, with no available functionality for storing historical data for review, analysis, or visualization. In addition, the data displayed is noisy and prone to significant random error. This paper provides an overview of RTLS methods and technologies, assesses alternative solutions to Viasat’s issue, demonstrates our RTLS integrated web app solution, analyzes its impact, and …
Non-Volatile Memory Adaptation In Asynchronous Microcontroller For Low Leakage Power And Fast Turn-On Time, Jean Pierre Thierry Habimana
Non-Volatile Memory Adaptation In Asynchronous Microcontroller For Low Leakage Power And Fast Turn-On Time, Jean Pierre Thierry Habimana
Graduate Theses and Dissertations
This dissertation presents an MSP430 microcontroller implementation using Multi-Threshold NULL Convention Logic (MTNCL) methodology combined with an asynchronous non-volatile magnetic random-access-memory (RAM) to achieve low leakage power and fast turn-on. This asynchronous non-volatile RAM is designed with a Spin-Transfer Torque (STT) memory device model and CMOS transistors in a 65 nm technology. A self-timed Quasi-Delay-Insensitive 1 KB STT RAM is designed with an MTNCL interface and handshaking protocol. A replica methodology is implemented to handle write operation completion detection for long state-switching delays of the STT memory device. The MTNCL MSP430 core is integrated with the STT RAM to create …
Cognitive Digital Twins For Smart Manufacturing, Muhammad Intizar Ali, Pankesh Patel, John G. Breslin, Ramy Harik, Amit Sheth
Cognitive Digital Twins For Smart Manufacturing, Muhammad Intizar Ali, Pankesh Patel, John G. Breslin, Ramy Harik, Amit Sheth
Publications
Smart manufacturing or Industry 4.0, a trend initiated a decade ago, aims to revolutionize traditional manufacturing using technology-driven approaches. Modern digital technologies such as the Industrial Internet of Things (IIoT), Big Data Analytics, Augmented/Virtual Reality, and Artificial Intelligence (AI) are the key enablers of new smart manufacturing approaches. The digital twin is an emerging concept whereby a digital replica can be built of any physical object. Digital twins are becoming mainstream; many organizations have started to rely on digital twins to monitor, analyze, and simulate physical assets and processes. The current use of digital twins for smart manufacturing is largely …
Machine Learning Meets Internet Of Things: From Theory To Practice, Bharath Sudharsan, Pankesh Patel
Machine Learning Meets Internet Of Things: From Theory To Practice, Bharath Sudharsan, Pankesh Patel
Publications
Standalone execution of problem-solving Artificial Intelligence (AI) on IoT devices produces a higher level of autonomy and privacy. This is because the sensitive user data collected by the devices need not be transmitted to the cloud for inference. The chipsets used to design IoT devices are resource-constrained due to their limited memory footprint, fewer computation cores, and low clock speeds. These limitations constrain one from deploying and executing complex problem-solving AI (usually an ML model) on IoT devices. Since there is a high potential for building intelligent IoT devices, in this tutorial, we teach researchers and developers; (i) How to …
Annual Report 2020-2021, Depaul University College Of Computing And Digital Media
Annual Report 2020-2021, Depaul University College Of Computing And Digital Media
CDM Annual Reports
LETTER FROM THE DEAN
As I write this letter during the beginning of the 2021–22 academic year, we have started to welcome the majority of our students to campus— many for the very first time, and some for the first time in a year and a half. It has been wonderful to be together, in-person, again. Four quarters of learning and working remotely was challenging, to be sure, but I have been consistently amazed by the resilience, innovation, and hard work of our students, faculty, and staff, even in the most difficult of circumstances. This annual report, covering the 2020–21 …
Enabling Machine Learning On The Edge Using Sram Conserving Efficient Neural Networks Execution Approach, Bharath Sudharsan, Pankesh Patel, John G. Breslin, Muhammad Intizar Ali
Enabling Machine Learning On The Edge Using Sram Conserving Efficient Neural Networks Execution Approach, Bharath Sudharsan, Pankesh Patel, John G. Breslin, Muhammad Intizar Ali
Publications
Edge analytics refers to the application of data analytics and Machine Learning (ML) algorithms on IoT devices. The concept of edge analytics is gaining popularity due to its ability to perform AI-based analytics at the device level, enabling autonomous decision-making, without depending on the cloud. However, the majority of Internet of Things (IoT) devices are embedded systems with a low-cost microcontroller unit (MCU) or a small CPU as its brain, which often are incapable of handling complex ML algorithms.
In this paper, we propose an approach for the ecient execution of already deeply compressed, large neural networks (NNs) on tiny …
Light Loaded Automated Guided Vehicle, Marcus Radtka, Nazar Paramashchuk, Lawrence Shevock
Light Loaded Automated Guided Vehicle, Marcus Radtka, Nazar Paramashchuk, Lawrence Shevock
Williams Honors College, Honors Research Projects
The objective of the locomotion system was to design and implement the mechanical, electrical, and software related functions to ensure the LLAGV had the capability of maneuvering its surroundings. The LLAGV’s motors were represented in an open loop transfer function to utilize RPM feedback and a compensator when needed. The modeled compensator helped control the LLAGV’s speed and acceleration, enabling further control of the LLAGV. The internal circuitry has the means to properly distributed power to all components and allowed the user to control the LLAGV to their desire. The application software within the LLAGV locomotion system (LLAGV-LS) had consideration …
Energy Harvesting And Sensor Based Hardware Security Primitives For Cyber-Physical Systems, Carson Labrado
Energy Harvesting And Sensor Based Hardware Security Primitives For Cyber-Physical Systems, Carson Labrado
Theses and Dissertations--Electrical and Computer Engineering
The last few decades have seen a large proliferation in the prevalence of cyber-physical systems. Although cyber-physical systems can offer numerous advantages to society, their large scale adoption does not come without risks. Internet of Things (IoT) devices can be considered a significant component within cyber-physical systems. They can provide network communication in addition to controlling the various sensors and actuators that exist within the larger cyber-physical system. The adoption of IoT features can also provide attackers with new potential avenues to access and exploit a system's vulnerabilities. Previously, existing systems could more or less be considered a closed system …
A General Framework For Characterizing And Evaluating Attacker Models For Cps Security Assessment, Christopher S. Deloglos, Christopher Deloglos
A General Framework For Characterizing And Evaluating Attacker Models For Cps Security Assessment, Christopher S. Deloglos, Christopher Deloglos
Theses and Dissertations
Characterizing the attacker’s perspective is essential to assessing the security posture and resilience of cyber-physical systems. The attacker’s perspective is most often achieved by cyber-security experts (e.g., red teams) who critically challenge and analyze the system from an adversarial stance. Unfortunately, the knowledge and experience of cyber-security experts can be inconsistent leading to situations where there are gaps in the security assessment of a given system. Structured security review processes (such as TAM, Mission Aware, STPA-SEC, and STPA-SafeSec) attempt to standardize the review processes to impart consistency across an organization or application domain. However, with most security review processes, the …
Improve The Prototype Of Low-Cost Near-Infrared Diffuse Optical Imaging System, Chen Xu, Mohammed Z. Shakil
Improve The Prototype Of Low-Cost Near-Infrared Diffuse Optical Imaging System, Chen Xu, Mohammed Z. Shakil
Publications and Research
Diffuse Optical Tomography (DOT) and Optical Spectroscopy using near-infrared (NIR) diffused light has demonstrated great potential for the initial diagnosis of tumors and in the assessment of tumor vasculature response to neoadjuvant chemotherapy. The aims of this project are 1) to test the different types of LEDs in the near-infrared range, and design the driving circuit, and test the modulation of LEDs at different frequencies; 2) to test the APDs as a detector, and build the receiver system and compare efficiency with pre-built systems. In this project, we are focusing on creating a low-cost infrared transmission system for tumor and …
Investigating Single Precision Floating General Matrix Multiply In Heterogeneous Hardware, Steven Harris
Investigating Single Precision Floating General Matrix Multiply In Heterogeneous Hardware, Steven Harris
McKelvey School of Engineering Graduate Student Theses & Dissertations
The fundamental operation of matrix multiplication is ubiquitous across a myriad of disciplines. Yet, the identification of new optimizations for matrix multiplication remains relevant for emerging hardware architectures and heterogeneous systems. Frameworks such as OpenCL enable computation orchestration on existing systems, and its availability using the Intel High Level Synthesis compiler allows users to architect new designs for reconfigurable hardware using C/C++. Using the HARPv2 as a vehicle for exploration, we investigate the utility of several of the most notable matrix multiplication optimizations to better understand the performance portability of OpenCL and the implications for such optimizations on this and …
Otter Vector Extension, Alexis A. Peralta
Otter Vector Extension, Alexis A. Peralta
Computer Engineering
This paper offers an implementation of a subset of the "RISC-V 'V' Vector Extension", v0.7.x. The "RISC-V 'V' Vector Extension" is the proposed vector instruction set for RISC-V open-source architecture. Vectors are inherently data-parallel, allowing for significant performance increases. Vectors have applications in fields such as cryptography, graphics, and machine learning. A vector processing unit was added to Cal Poly's RISC-V multi-cycle architecture, known as the OTTER. Computationally intensive programs running on the OTTER Vector Extension ran over three times faster when compared to the baseline multi-cycle implementation. Memory intensive applications saw similar performance increases.
Nonlinear Least Squares 3-D Geolocation Solutions Using Time Differences Of Arrival, Michael V. Bredemann
Nonlinear Least Squares 3-D Geolocation Solutions Using Time Differences Of Arrival, Michael V. Bredemann
Mathematics & Statistics ETDs
This thesis uses a geometric approach to derive and solve nonlinear least squares minimization problems to geolocate a signal source in three dimensions using time differences of arrival at multiple sensor locations. There is no restriction on the maximum number of sensors used. Residual errors reach the numerical limits of machine precision. Symmetric sensor orientations are found that prevent closed form solutions of source locations lying within the null space. Maximum uncertainties in relative sensor positions and time difference of arrivals, required to locate a source within a maximum specified error, are found from these results. Examples illustrate potential requirements …
Efficient Hardware/Software Partitioning Techniques For A Cloud-Scale Cpu-Fpga Platform, Samah Ziyad Rahamneh
Efficient Hardware/Software Partitioning Techniques For A Cloud-Scale Cpu-Fpga Platform, Samah Ziyad Rahamneh
Dissertations
The diversity of workload characteristics has stimulated the deployment of heterogeneous architectures to accommodate workloads’ requirements disparity in cloud data centers. In heterogeneous computing, co-processors are utilized to support Central Processing Units (CPUs) in fulfilling workload demands. Field Programmable Gate Arrays (FPGAs) have advantages over other accelerators because of their power, performance and re-configurability benefits. In order to achieve the most benefit of a heterogeneous platform, efficient partitioning of workload between the CPU and the FPGA is a crucial demand.
This dissertation first presents a design and implementation of cooperative CPU-FPGA execution techniques, which include code and data partitioning, of …
Tiny Disco: A Cost-Effective, High-Fidelity Wireless Audio System, Luke Martin Liberatore
Tiny Disco: A Cost-Effective, High-Fidelity Wireless Audio System, Luke Martin Liberatore
Computer Engineering
The Tiny Disco is a WiFi based concert system, featuring improvements on popular “Silent Disco” concerts. Rather than being tied to compression and bandwidth restrictions present in traditional silent disco systems, the Tiny Disco system can deliver 320kbps+ audio quality, and allows listeners to bring their own headphones, further lending to the high quality audio experience.
Tiny Disco uses a Raspberry Pi as the audio server, and Espressif ESP32 microcontrollers as audio receivers/clients. The Tiny Disco is primarily geared toward smaller concerts and niche events where audio quality is valued, though due to its WiFi-based architecture, it can be expanded …
Annual Report 2019-2020, Depaul University College Of Computing And Digital Media
Annual Report 2019-2020, Depaul University College Of Computing And Digital Media
CDM Annual Reports
LETTER FROM THE DEAN
As I write this letter wrapping up the 2019-20 academic year, we remain in a global pandemic that has profoundly altered our lives. While many things have changed, some stayed the same: our CDM community worked hard, showed up for one another, and continued to advance their respective fields. A year that began like many others changed swiftly on March 11th when the University announced that spring classes would run remotely. By March 28th, the first day of spring quarter, we had moved 500 CDM courses online thanks to the diligent work of our faculty, staff, …
Terraria Server On A Raspberry Pi, Bradley Stoldt
Terraria Server On A Raspberry Pi, Bradley Stoldt
Williams Honors College, Honors Research Projects
My senior project is designed to display some of the material I have learned throughout the four years at The University of Akron, as well as explore into a newer piece of technology. I will be researching and documenting myself setting up a live network at my house that will have a raspberry pi running on it as a game server. The goal of this project is to get internal users to connect to the server, as well as users that are outside of my home network.
Demand-Driven Execution Using Future Gated Single Assignment Form, Omkar Javeri
Demand-Driven Execution Using Future Gated Single Assignment Form, Omkar Javeri
Dissertations, Master's Theses and Master's Reports
This dissertation discusses a novel, previously unexplored execution model called Demand-Driven Execution (DDE), which executes programs starting from the outputs of the program, progressing towards the inputs of the program. This approach is significantly different from prior demand-driven reduction machines as it can execute a program written in an imperative language using the demand-driven paradigm while extracting both instruction and data level parallelism. The execution model relies on an executable Single Assignment Form which serves both as the internal representation of the compiler as well as the Instruction Set Architecture (ISA) of the machine. This work develops the instruction set …
Hardware-Entangled Software Execution Using Dynamic Pufs, Wenjie Xiong
Hardware-Entangled Software Execution Using Dynamic Pufs, Wenjie Xiong
Yale Day of Data
Low-end computing devices are becoming increasingly ubiquitous, especially due to the widespread deployment of Internet-of-Things products. There is, however, much concern about sensitive data being processed on these low-end devices which have limited protection mechanisms in place. This paper proposes a Hardware-Entangled Software Protection (HESP) scheme that leverages hardware features to protect software code from malicious modification before or during run-time. It also enables implicit hardware authentication. Thus, the software will execute correctly only on an authorized device and if the timing of the software, e.g., control flow, was not changed through malicious modifications. The proposed ideas are based on …
Planr.: Planar Learning Autonomous Navigation Robot, Gabrielle S. Santamorena, Daniel Kasman, Jesus Mercado, Ben Klave, Andrew Weisman, Anthony Fortner
Planr.: Planar Learning Autonomous Navigation Robot, Gabrielle S. Santamorena, Daniel Kasman, Jesus Mercado, Ben Klave, Andrew Weisman, Anthony Fortner
Computer Engineering
PLANR is a self-contained robot capable of mapping a space and generating 2D floor plans of a building while identifying objects of interest. It runs Robot Operating System (ROS) and houses four main hardware components. An Arduino Mega board handles the navigation, while an NVIDIA Jetson TX2, holds most of the processing power and runs ROS. An Orbbec Astra Pro stereoscopic camera is used for recognition of doors, windows and outlets and the RPLiDAR A3 laser scanner is able to give depth for wall detection and dimension measurements. The robot is intended to operate autonomously and without constant human monitoring …