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Articles 121 - 150 of 150
Full-Text Articles in Hardware Systems
Hadoop Based Data Intensive Computation On Iaas Cloud Platforms, Sruthi Vijayakumar
Hadoop Based Data Intensive Computation On Iaas Cloud Platforms, Sruthi Vijayakumar
UNF Graduate Theses and Dissertations
Cloud computing is a relatively new form of computing which uses virtualized resources. It is dynamically scalable and is often provided as pay for use service over the Internet or Intranet or both. With increasing demand for data storage in the cloud, the study of data-intensive applications is becoming a primary focus. Data intensive applications are those which involve high CPU usage, processing large volumes of data typically in size of hundreds of gigabytes, terabytes or petabytes. The research in this thesis is focused on the Amazon’s Elastic Cloud Compute (EC2) and Amazon Elastic Map Reduce (EMR) using HiBench Hadoop …
Chromium Os On Freescale I.Mx6q, Pushpal Sidhu
Chromium Os On Freescale I.Mx6q, Pushpal Sidhu
Computer Engineering
This projects intention is to get Chromium OS running on a Freescale i.MX6q processor, a processor based on the ARM® Cortex™-A9 architecture. The development board I used is the Ventana GW5400 by Gateworks. This project inherently meant using Chromium OS's development system which meant I created a board specific package for the Ventana single board computer. This project is a proof of concept that can mean extending Chromium OS to various implementations of the ARM® Cortex™-A9 architecture.
Design Of Cpu Simulation Software For Armv7 Instruction Set Architecture, Dillon Tellier
Design Of Cpu Simulation Software For Armv7 Instruction Set Architecture, Dillon Tellier
Computer Engineering
Simulations have long been a part of the engineering process in both the professional and academic domain. From a pedagogic standpoint, simulations allow students to explore the dynamics of engineering scenarios by controlling variables, taking measurements, and observing behavior which would be difficult or impossible without simulation. One such tool is a CPU simulator used in Cal Poly’s Computer Architecture classes; this software simulates an instruction accurate operation of a computer processor and reports statistics regarding the execution of the supplied compiled machine code. For the last several years Cal Poly’s computer architecture classes have used a previous version of …
A Federated Architecture For Heuristics Packet Filtering In Cloud Networks, Ibrahim M. Waziri Jr
A Federated Architecture For Heuristics Packet Filtering In Cloud Networks, Ibrahim M. Waziri Jr
College of Graduate Studies: Theses & Dissertations
The rapid expansion in networking has provided tremendous opportunities to access an unparalleled amount of information. Everyone connects to a network to gain access and to share this information. However when someone connects to a public network, his private network and information becomes vulnerable to hackers and all kinds of security threats. Today, all networks needs to be secured, and one of the best security policies is firewall implementation.
Firewalls can be hardware or cloud based. Hardware based firewalls offer the advantage of faster response time, whereas cloud based firewalls are more flexible. In reality the best form of firewall …
On High-Performance Parallel Fixed-Point Decimal Multiplier Designs, Ming Zhu
On High-Performance Parallel Fixed-Point Decimal Multiplier Designs, Ming Zhu
UNLV Theses, Dissertations, Professional Papers, and Capstones
High-performance, area-efficient hardware implementation of decimal multiplication is preferred to slow software simulations in a number of key scientific and financial application areas, where errors caused by converting decimal numbers into their approximate binary representations are not acceptable.
Multi-digit parallel decimal multipliers involve two major stages: (i) the partial product generation (PPG) stage, where decimal partial products are determined by selecting the right versions of the pre-computed multiples of the multiplicand, followed by (ii) the partial product accumulation (PPA) stage, where all the partial products are shifted and then added together to obtain the final multiplication product. In this thesis, …
Vehicular Motion Sensor: Developing A Wide-Range Motion Sensing Alarm System, Joshua Isaacson
Vehicular Motion Sensor: Developing A Wide-Range Motion Sensing Alarm System, Joshua Isaacson
Senior Honors Theses
Vehicular safety has become a serious concern in recent years. Many drivers have difficulty backing out of parking spaces, especially when large trucks and sport utility vehicles block the peripheral view from smaller vehicles. This can lead to accidents and pedestrian injuries when drivers are unable to see or do not pay careful attention to their surroundings.
Vehicular motion sensor systems can alert drivers of approaching obstacles when attempting to back out of parking spaces with limited visibility. This thesis aims to explain the limitations of current systems and the research conducted by the author to develop a prototype for …
Bluelock: A Secure Bluetooth Operated Padlock, Trever Mckee
Bluelock: A Secure Bluetooth Operated Padlock, Trever Mckee
Computer Engineering
For this project a secure, battery operated, Bluetooth operated padlock was created. The project included both the hardware to integrate with a padlock and an Android application used to interface with the hardware. In order to make the padlock secure both AES encryption and challenge response authentication were used for secure message passing between the device and the Android phone. The project also included power consumption and sustainability tuning including exploring Arduino sleep states and integrating the project with a solar charging unit.
A New Simplified Federated Single Sign-On System, Chen Liang
A New Simplified Federated Single Sign-On System, Chen Liang
Masters
The work presented in this MPhil thesis addresses this challenge by developing a new simplified FSSO system that allows end-users to access desktop systems, web-based services/applications and non-web based services/applications using one authentication process. This new system achieves this using two major components: an “Authentication Infrastructure Integration Program (AIIP)" and an “Integration of Desktop Authentication and Web-based Authentication (IDAWA)." The AIIP acquires Kerberos tickets (for end-users who have been authenticated by a Kerberos single sign-on system in one net- work domain) from Kerberos single sign-on systems in different network domains without establishing trust between these Kerberos single sign-on systems. The …
An Investigation Of Distributed Schema Free Tabular Data Storage Technologies On Google App Engine And Microsoft Azure, Conor Mcgrath, Gary Clynch
An Investigation Of Distributed Schema Free Tabular Data Storage Technologies On Google App Engine And Microsoft Azure, Conor Mcgrath, Gary Clynch
Conference Papers
This paper examines schema free non-relational tabular storage for two important emerging Platform as a Service (PaaS) environments, where Google App Engine applications persist data to the Google Datastore, and Microsoft Azure applications store data in Azure Tables. A simple mobile web application was initially developed for both platforms, to understand how an application could be developed and deployed. Java Data Objects (JDO) was selected for Google App Engine and Windows Communication Foundation (WCF) in C# for Microsoft Azure. Many applications have a requirement to store complex data that is organised in relations in the order of One to One, …
Frg Turbojet, Tyler Vitti
Frg Turbojet, Tyler Vitti
Computer Engineering
Members of the Cal Poly SLO campus club FRG work together with students of several different disciplines to build a functional turbojet engine. Engineering approaches include design, fabrication, testing, and computer sensing, control, and integration. The goal of the project is to produce a running turbojet engine monitored and controlled by embedded hardware and specialized PC software. This project is to be used by later groups for further research and development.
Lyfi, Kianoosh Salami, Justin Cotton, Elush Shirazpour
Lyfi, Kianoosh Salami, Justin Cotton, Elush Shirazpour
Electrical Engineering
This paper will cover the steps necessary to design, build, and manage networkable smart light switches over WiFi via a mobile application. It contains a microcontroller running a real time operating system, a WiFi module, a Java server with SQLite databasing, and a mobile phone application.
LyFi is designed to turn on/off and dim household lights while only requiring the same installation procedure as a less capable dimmer switch. Once installed and connected to a network, LyFi will self-discover and configure. The server automatically propogates a database of nodes where any mobile device running an application can receive an updated …
The Uconn Vpc: A Collaborative Story About Desktop Virtualization, Tony Molloy, Jeremy Pollack, Ed Swindelles
The Uconn Vpc: A Collaborative Story About Desktop Virtualization, Tony Molloy, Jeremy Pollack, Ed Swindelles
UConn Library Presentations
The UConn vPC is a collaborative IT project among the UConn School of Business, the School of Engineering, and the University Libraries. The project delivered virtual desktops to UConn students beginning the fall semester of 2011. Students now have access to UConn-licensed applications from their PCs, Macs, and mobile devices from anywhere in the world where they have Internet access. This session discusses both the technology behind the service and the collaboration between the academic units that built a scalable, centralized service. An overview of the service can be found at http://vpc.uconn.edu.
Bluemote!, Philip Kaye
Bluemote!, Philip Kaye
Computer Engineering
In today’s society, our mobile phones are an extremely useful device when we are on the go and away from our homes; however, when we return home, our smart phone becomes just a communication tool again. Home automation is inevitable, and it will find its way into every house. The first person to commercialize it to the point where it is as easy to set-up and as affordable as a home router will end up breaking this slow trend. The key to this success is the smart phone; this should end up being the most expensive piece of hardware for …
Erasure Techniques In Mrd Codes, Florentin Smarandache, W.B. Vasantha Kandasamy, R. Sujatha, R.S. Raja Durai
Erasure Techniques In Mrd Codes, Florentin Smarandache, W.B. Vasantha Kandasamy, R. Sujatha, R.S. Raja Durai
Branch Mathematics and Statistics Faculty and Staff Publications
In this book the authors study the erasure techniques in concatenated Maximum Rank Distance (MRD) codes. The authors for the first time in this book introduce the new notion of concatenation of MRD codes with binary codes, where we take the outer code as the RD code and the binary code as the inner code. The concatenated code consists of the codewords of the outer code expressed in terms of the alphabets of the inner code. These new class of codes are defined as CRM codes. This concatenation techniques helps one to construct any CRM code of desired minimum distance …
Architecture For A Flexible And Scalable Simulation Engine, Robert C. Holcomb Jr.
Architecture For A Flexible And Scalable Simulation Engine, Robert C. Holcomb Jr.
Computational Modeling & Simulation Engineering Theses & Dissertations
Simulation is used by many different industries to gain insight on actions and decisions that may be too dangerous or costly to perform in reality. Although the use of computers to assist with modeling and simulation has been studied for quite a while, computer infrastructure, hardware, and capabilities are changing at a rapid pace. Computer software once written is difficult and costly to change, especially in order to take advantage of the advances in computer hardware. This thesis focuses on the design and implementation of a software simulation architecture that allows flexibility in the modeling conducted and scalability in the …
Detection Of Breathing And Infant Sleep Apnea, Brian Berg
Detection Of Breathing And Infant Sleep Apnea, Brian Berg
Computer Engineering
Sleep apnea is a condition where people pause while breathing in their sleep; this can be of great concern for infants and premature babies. Current monitoring systems either require physical attachment to a user or may be unreliable. This project is meant to develop a device that can accurately detect breathing through sound and issue appropriate warnings upon its cessation. The device produced is meant to be a standalone device and thus was developed as an embedded systems project on a Xilinx Spartan 6 FPGA.
Project 308: Augmented Reality Mario Kart, Joseph Abad, David Allender, Joryl Calizo, Ryan Gaspar, Gavin Lee
Project 308: Augmented Reality Mario Kart, Joseph Abad, David Allender, Joryl Calizo, Ryan Gaspar, Gavin Lee
Computer Engineering
Mario Kart is a popular go-kart racing game developed by Nintendo. The premise of the game is simple: drive a go-kart along a racetrack and reach the finish line before the other players. What makes this game unique, however, is the inclusion of weapons, traps, and other projectiles that a player can use to gain an advantage in the race. We have taken on the challenge of not only recreating this amazing game, but using the art of Augmented Reality to fully immerse the player in the full experience. Rather than play the game on a television screen with a …
Optical Network-On-Chip Architectures And Designs, Lei Zhang
Optical Network-On-Chip Architectures And Designs, Lei Zhang
UNLV Theses, Dissertations, Professional Papers, and Capstones
As indicated in the latest version of ITRS roadmap, optical wiring is a viable interconnection technology for future SoC/SiC/SiP designs that can provide broad band data transfer rates unmatchable by the existing metal/low-k dielectric interconnects. In this dissertation study, a set of different optical interconnection architectures are presented for future on-chip optical micro-networks.
Three Optical Network-on-Chip (ONoC) architectures, i.e., Wavelength Routing Optical Network-on-Chip (WRON), Redundant Wavelength Routed Optical Network (RDWRON) and Recursive Wavelength Routed Optical Network (RCWRON) are proposed. They are fully connected networks designed based on passive switching Microring Resonator (MRR) optical switches. Given enough different routing optical wavelengths, …
Reconfigurable Systems: A Potential Solution To The Von Neumann Bottleneck, Damian L. Miller
Reconfigurable Systems: A Potential Solution To The Von Neumann Bottleneck, Damian L. Miller
Senior Honors Theses
The difficulty of overcoming the disparity between processor speeds and data access speeds, a condition known as the von Neumann bottleneck, has been a source of consternation for computer hardware developers for many years. Although a number of temporary solutions have been proposed and implemented in modern machines, these solutions have only managed to treat the major symptoms, rather than solve the root problem. As the number of transistors on a chip roughly doubles every two years, the von Neumann bottleneck has continued to tighten in spite of these solutions, prompting some computer hardware professionals to advocate a paradigm shift …
Increasing Efficiency In Boundary Security With Wireless Sensor Networks And Geospatial Information Systems Using Homology Theory, Luis Berumen^, Eric Chaidez^, Hamide Dogan*, Jose Gerardo Rosiles**
Increasing Efficiency In Boundary Security With Wireless Sensor Networks And Geospatial Information Systems Using Homology Theory, Luis Berumen^, Eric Chaidez^, Hamide Dogan*, Jose Gerardo Rosiles**
COURI Symposium Abstracts, Spring 2011
As part of an institutional investigation, we attempt to address the challenges the US customs and Border protection agency faces in the El Paso region. Our research focuses on defining a system for the surveillance application, and the use of mathematical models employed to achieve a greater efficiency of such architecture. With the use of the defined system, we apply homology theory through the algebraic process of topology, to accomplish an independent coordinate-free based system, which covers the surveillance area, with lesser quantity of sensor nodes. Our architecture makes the use of an operating system for wireless sensor networks; TinyOS, …
Dynamic Polymorphic Reconfiguration To Effectively “Cloak” A Circuit’S Function, Jeffrey L. Falkinburg
Dynamic Polymorphic Reconfiguration To Effectively “Cloak” A Circuit’S Function, Jeffrey L. Falkinburg
Theses and Dissertations
Today's society has become more dependent on the integrity and protection of digital information used in daily transactions resulting in an ever increasing need for information security. Additionally, the need for faster and more secure cryptographic algorithms to provide this information security has become paramount. Hardware implementations of cryptographic algorithms provide the necessary increase in throughput, but at a cost of leaking critical information. Side Channel Analysis (SCA) attacks allow an attacker to exploit the regular and predictable power signatures leaked by cryptographic functions used in algorithms such as RSA. In this research the focus on a means to counteract …
Development Of A Cubesat Payload To Model Particle Dampening In Space: Design And Implementation Of Software For Cp7, Daniel Walker
Development Of A Cubesat Payload To Model Particle Dampening In Space: Design And Implementation Of Software For Cp7, Daniel Walker
Computer Engineering
The California Polytechnic State University CubeSat student research & development group, PolySat, is currently in a mature development stage of a single unit CubeSat designated CP7. The CP7 mission implements a scientific payload designed to characterize particle dampers in microgravity conditions. When subjected to vibration, the momentum exchanges and frictional forces of the particles create a damping effect that can be optimized to suit a number of applications over a broad frequency and amplitude range. In space based applications, particle dampers would serve as a robust and simple device to eliminate jitter in optical assemblies and other sensitive instrumentation. This …
Data Routing In Multicore Processors Using Dimension Increment Method, Arpita H. Kadakia
Data Routing In Multicore Processors Using Dimension Increment Method, Arpita H. Kadakia
UNLV Theses, Dissertations, Professional Papers, and Capstones
A Deadlock-free routing algorithm can be generated for arbitrary interconnection network using the concept of virtual channels but the virtual channels will lead to more complex algorithms and more demands of NOC resource.
In this thesis, we study a Torus topology for NOC application, design its structure and propose a routing algorithm exploiting the characteristics of NOC. We have chosen a typical 16 (4 by 4) routers Torus and propose the corresponding route algorithm. In our algorithm, all the channels are assigned 4 different dimensions (n0,n1,n2 & n3). By following the dimension increment method, we break the dependent route circles, …
Ultrasonic Shark-Tag Locator System For Iver2 Auv, Nathaniel Garcia
Ultrasonic Shark-Tag Locator System For Iver2 Auv, Nathaniel Garcia
Computer Engineering
The purpose of this project is to develop a system for tracking an ultrasonic underwater transmitter that can be integrated into an IVER2 AUV to allow it to follow and monitor tagged sharks in the ocean for scientific research.
The system consists of a four main components including a shark-tag, two hydrophones, a filter/amplifier & threshold detector circuit, and a microcontroller.
This project, while not completing field testing and integration with the IVER2, is a proof of concept of a system that utilizes passive sonar to determine a bearing from the system to a shark-tag transmitter. Additionally, it devised several …
Pretty Lights, Nicholas (Nick) Delmas, Matthew (Matt) Maniaci
Pretty Lights, Nicholas (Nick) Delmas, Matthew (Matt) Maniaci
Computer Engineering
Digital media players often include a visualization component that allows a user to watch a visualization synchronized to their music or videos. This project uses the visualization plugin API of an existing media playback program (WinAmp) but it displays its visuals using physical LED lights. Instead of outputting visuals to the computer screen, data is sent over USB to a micro controller that runs the LED lights. This project aims to give users a more visceral visual experience than traditional visualizations on the computer screen.
Where Does Your Institution Stand?, Wendell Brase, Mark Askren
Where Does Your Institution Stand?, Wendell Brase, Mark Askren
Information Technology Services: Publications
Media coverage of sustainability and "green" issues is hard to ignore these days. But less clear is a specific understanding of what this agenda means within higher ed IT organizations. For starters, it's useful to self-assess whether your campus is a leading innovator on all things "green" or satisfied to remain inconspicuous in the middle of the pack. If your institution is trailing but wants to assert a leadership role in environmental stewardship, you need to get engaged to understand what it will take to catch up and how IT can be a leader, not just a contributor, to such …
A Pipelined Architecture For Real Time Correction Of Barrel Distortion In Wide-Angle Camera Images, Hau Trung Ngo
A Pipelined Architecture For Real Time Correction Of Barrel Distortion In Wide-Angle Camera Images, Hau Trung Ngo
Electrical & Computer Engineering Theses & Dissertations
Images captured by wide-angle cameras show barrel type spatial distortion due to wide-angle configuration of the camera lens where image regions farther from the center are compressed in a nonlinear fashion. The barrel distortion correction technique based on least squares estimation attempts to correct a distorted image by expanding it nonlinearly so that straight lines in the object space remain straight in the image space. The intensity value of a pixel in the expanded image is calculated by back mapping its position to the corresponding position in the distorted image and performing linear interpolation on the neighboring pixels. Distorted images …
Ua3/8/5 Wku Network Campus Map, Wku President's Office-Meredith
Ua3/8/5 Wku Network Campus Map, Wku President's Office-Meredith
WKU Administration Documents
Map of WKU campus computer networking project.
A Systolic Simulation And Transformation System, Ronald I. Greenberg, H.-C. Oh
A Systolic Simulation And Transformation System, Ronald I. Greenberg, H.-C. Oh
Computer Science: Faculty Publications and Other Works
This paper presents a CAD tool, SystSim, to ease the design of systolic systems. Given a high-level, functional description of processors, and a high-level description of their interconnection, SystSim will perform simulations and provide graphical output. SystSim will also perform transformations such as retiming, which eases use of the methodology of Leiserson and Saxe of designing a system with broadcasting and then obtaining a systolic system through retiming.
Simulator For Concurrent Processing Data Flow Architectures, Mahyar R. Malekpour
Simulator For Concurrent Processing Data Flow Architectures, Mahyar R. Malekpour
Electrical & Computer Engineering Theses & Dissertations
A software simulator capable of simulating execution of an algorithm graph on a given system under the Algorithm To Architecture Mapping Model (ATAMM) rules is presented in this thesis. ATAMM is capable of modeling the execution of large-grained algorithms on distributed data flow architectures. Investigating the behavior and determining the performance of an ATAMM based system requires the aid of software tools. The ATAMM Simulator presented in this thesis is capable of determining the behavior, performance, and reliability of a system without having to build a hardware prototype. Case studies are performed on four algorithms to demonstrate the capabilities of …