Hardware Systems Commons^™

Ai Cyber First Responders: Bottleneck Analysis Of Heterogeneous Cpu–Gpu Pipelines For Security Operations Center Triage, Christine Pierce

Harrisburg University Other Works

Abstract — Modern Security Operations Centers (SOCs) must continuously process massive volumes of heterogeneous security telemetry while meeting stringent throughput, latency, and operational continuity requirements. Although transformer-based artificial intelligence has significantly improved threat detection and alert prioritization, most cybersecurity research evaluates model accuracy rather than the end-to-end behavior of AI-enabled operational pipelines. Consequently, relatively little is known about how heterogeneous CPU–GPU coordination, scheduling overhead, memory movement, and synchronization collectively influence operational SOC performance. This paper presents the AI Cyber First Responder, a heterogeneous SOC triage architecture that integrates GPU-accelerated transformer inference with CPU-based doctrine-driven reasoning to investigate end-to-end pipeline behavior …

System Integration And Validation Of The Cal Poly Spacecraft Attitude Dynamics Simulator Mk. Iv, Bricen S. Rigby

Master's Theses

The Cal Poly Spacecraft Attitude Dynamics Simulator (SADS) is an ongoing project that seeks to enable the simulation and validation of sensors, actuators, and control logic related to spacecraft attitude control. The SADS platform rests atop a spher- ical air-bearing device which allows for nearly frictionless rotation in all three axes. The orientation of the platform is controlled by four reaction wheels arranged in a pyramidal configuration. Over the past few years, there have been significant updates to the reaction wheel subsystem, as well as requests for a more capable central com- puter. Therefore, a new system architecture for the …

Reproducing And Evaluating Charger Surfing: Robustness Of Smartphone Charging-Line Side-Channels, Colby M. Watts

Master's Theses

Smartphones are frequently connected to external, untrusted charging hardware, creating opportunities for side-channel attacks that do not require malware or direct access to device data. Charger Surfing, a recently proposed charging-line power analysis side-channel attack, reported high accuracy in inferring touchscreen input from voltage measurements collected from a smartphone’s charging cable; however, the reproducibility and robustness of these results under different conditions remain unclear. This thesis presents an independent replication and evaluation of Charger Surfing, including the development of an end-to-end data collection pipeline consisting of a modified charging cable, oscilloscope-based recordings, custom Android app, automated trace processing, and convolutional …

Autonomous Vision-Based Litter Collection Rover, Dante Michael Benedetti, Benjamin Scott Tavares, Nathan Heil

Electrical Engineering

This report documents the design, implementation, and testing of an autonomous litter-collection rover developed as a Senior Project Design Lab (EE 460/463/464) at California Polytechnic State University. The rover integrates autonomy, computer vision, embedded real-time control, mecanum-wheel omnidirectional mobility, and a two-degree-of-freedom robotic arm to detect, approach, and collect small ground-level litter such as bottles, wrappers, and paper fragments.

The system uses a two-layer compute architecture: an NVIDIA Jetson Orin Nano running ROS 2 for perception, SLAM, and path planning, paired with an STM32L4A6ZG microcontroller for real-time motor control and odometry. The robot is built on a multi-level aluminum frame …

Gps Tracking Smart Dash Cam Capstone Review, Simrah Saleem

University Honors Theses

This thesis details our design, implementation, and collaborative development of an intelligent vehicle logging system built on a Raspberry Pi 5. Unlike standard consumer dash cams that act as closed "black boxes," our system uses a dual-camera stereo vision setup integrated with centimeter-level accuracy. While we successfully built a functional Proof of Concept capable of event-triggered recording, dual-monitor visualization, and smart detection and recognition, this paper focuses on our engineering journey and the real-world challenges we faced. Using an Agile framework, we split into three specialized sub-teams to handle hardware, database, and interface design in parallel. This structure created unique …

Exploration Of Real-Time Power Electronic Simulation On Amd Npu, Shouyu Du

All Theses

The rapid electrification of the automotive and data center sectors has created a critical demand for high-fidelity, real-time simulation of complex power electronic systems. While Hardware- in-the-Loop (HIL) simulation on Field-Programmable Gate Arrays (FPGAs) is the current industry standard, it presents significant challenges regarding development complexity and memory limita- tions. This dissertation investigates the feasibility of utilizing Neural Processing Units (NPUs)— specifically the AMD AI Engine (AIE) XDNA2 architecture—as a novel platform for real-time, deterministic circuit simulation. This study establishes a comprehensive automated modeling framework based on graph theory and Massarini’s method to derive linear state-space representations for arbitrary circuit …

A Full System Co-Simulation Platform For Evaluating Edge Machine Learning Inference Using Compute-In-Memory, Belsen Lee

Electrical Engineering and Computer Science (MS) Theses

We present a full-system co-simulation platform for evaluating embedded machine learning (ML) inference using compute-in-memory (CIM). CIM architectures aim to reduce data movement overhead by performing matrix operations in memory, but end-to-end benefits depend on system-level integration costs that are difficult to assess with isolated hardware models alone. To address this gap, we develop an integrated RISC-V QEMU-SystemC co-simulation environment that allows standard embedded Linux to interact with a transaction-level CIM accelerator model via memory-mapped I/O, direct memory access (DMA), and interrupts. To evaluate performance, we benchmark an MNIST image inference workload and a synthetic fully connected neural network, comparing …

Robust Hardware Trojan Detection Leveraging Dual‑Domain Features And Stacked Ensemble Learning, Sefatun-Noor Puspa

All Theses

In Cyber-physical systems rely on sensors, communication, and computing, all powered by integrated circuits (ICs). These ICs are vulnerable to malicious hardware attacks, with hardware Trojans being one of the stealthiest threats. Trojans are malicious implants in the circuitry, which are often inserted during design or fabrication stages. This stealthy addition remains dormant until triggered and might cause functional disruptions or sensitive information leakage once triggered. Traditional IC validation methods, such as functional testing and logic analysis, usually fail to capture these subtle anomalies because hardware Trojans are intentionally designed to mimic normal circuit behavior. They often remain dormant under …

Virtualized And Distributed Neighborhood Data Centers, Benjamin T. Niccum

Computer Science and Engineering Theses

This thesis evaluates whether PCIe-fabric-based resource pooling can support a decentralized neighborhood micro-data-center model under real implementation constraints. The work combines architecture design, prototype deployment, performance benchmarking, and security assessment. Results show strong prototype-scale feasibility with low-latency and high-throughput behavior, while also identifying deployment-blocking security gaps and operational maturity requirements. The thesis contributes an evidence-traceable path from concept validation to deployment-grade roadmap planning.

Analyzing Network Traffic And Data Exfiltration Via Smb In Post-Vm Escape Scenarios, Noah M. Disanza

Williams Honors College, Honors Research Projects

Virtual machines (VMs) play a crucial role in modern IT infrastructure environments by providing isolation and enhanced security, among other things, for both personal and corporate systems. VMs are heavily rely upon to safely test malware, manage infrastructure, and reduce risk to host systems. This reliance is so substantial that the idea of reducing risk to the host system is believed to be erasing risk entirely. However, this mindset has shown to be challenged time and time again by the emergence of exploits known as virtual machine escapes. These exploits allow malicious actors to break out of the virtualized environment …

Automated Pill Dispenser, Ryan Oderkirk, Connor Beaven, Rachelle Labrie, Josue Panchana

Williams Honors College, Honors Research Projects

The project we propose is an automated system for dispensing dosages of medication throughout the day. It will be able to alert a user when their pills need to be taken and give them the correct dosages of up to four different medications. These dosages are configurable as well as the scheduled time they are to be taken. In addition, the pill dispenser will alert users when they are low on medications and need to refill the machine.

Nanomagnet Based Reservoir Computing And Quantum Control, Fahim F. Chowdhury

Theses and Dissertations

Conventional CMOS scaling has driven remarkable advances in computing but faces increasing physical and energy constraints, motivating alternative computing paradigms that integrate memory and computation while improving energy efficiency. Nanoscale magnetic systems offer a promising platform for such approaches because their intrinsic nonlinear dynamics and localized magnetic fields can support both classical and quantum information processing. This thesis investigates nanomagnetic systems for physical reservoir computing and, with primary emphasis, for localized quantum control of spin qubits.

The first part explores dipole-coupled nanomagnet arrays as physical reservoirs. Micromagnetic simulations demonstrate nonlinear dynamical behavior with high short-term memory and parity-check capacity, enabling …

Memory-Efficient Acceleration For Emerging Applications Via Hardware/Software Co-Design, Shilin Tian

Graduate Studies Theses and Dissertations 2026

Emerging artificial-intelligence and data-intensive scientific workloads increasingly face a memory wall: irregular access patterns and large intermediate data volumes make data movement, rather than arithmetic, the primary constraint on performance and energy efficiency. This dissertation develops a memory-centric hardware/software co-design methodology that jointly reshapes algorithms, architectures, and dataflows to retain frequently reused data on chip. The methodology is demonstrated through three accelerators and an RTL design tool. VITA replaces multi-head attention in vision-transformer-based 3D human mesh recovery with hardware-friendly average pooling and maps the resulting operators to a reconfigurable datapath, achieving 5.05-fold and 69.12-fold speedups over a state-of-the-art GPU and …

Hpc Configuration And Automated System Administration, Matty Witt, Deep Singh, Christopher Imirian

College of Engineering Summer Undergraduate Research Program

With the exponential growth in the use of computing, there is a growing need for undergraduate students to enter the workforce with experience with more complicated computing architectures. The CFD research group in the Aerospace Engineering Department received an HPC system and related computing hardware through the Air Force Research Lab. This system consists of three components: (1) a cluster compute engine with 256 CPU cores, 3.2 TB of RAM, 4 Tesla A100 GPUs, and 200 Gbps InfiniBand network backplane; (2) a high performance storage platform with 540 TB of raw storage, 200 Gbps InfiniBand network, and BeeGFS parallel cluster …

Accelerating Gnn Inference On Multi-Core Systems, Binglin Ji

McKelvey School of Engineering Graduate Student Theses & Dissertations

Graph Neural Networks (GNNs) are becoming increasingly popular, with their applications expanding across diverse domains. As the scale of graph data continues to grow, including larger numbers of nodes, edges, and higher embedding dimensions, standardized libraries such as DGL and PyG have been developed to facilitate GNN computation. However, with the rapid increase in the number of processor cores and the evolution of multi-core architectures, these libraries often show poor scalability and fail to execute GNN inference efficiently on the latest multi-core systems, particularly those with upwards of a hundred cores. To address this limitation, we present FGI, a Fast …

True-Bsg: A True Random Bit-Stream Generator For Fast And Efficient Stochastic Computing, Mehran Shoushtari Moghadam, M. Hassan Najafi

Faculty Scholarship

Stochastic computing (SC) leverages random bitstreams to perform arithmetic operations, offering ultra-lowcost, fault-tolerant, and highly parallelizable computations. The quality of these bit-streams is crucial for the accuracy and reliability of SC. This paper introduces TRUE-BSG, a novel true random bit-stream generator designed for fast and energyefficient SC. Unlike state-of-the-art (SoTA) pseudo-random and quasi-random bit-stream generators, TRUE-BSG utilizes a highquality true random number generator (TRNG), capable of producing random bits at a rate of 1 Gigabit per second. Our TRNG ensures high entropy and minimal correlation. TRUE-BSG shows comparable accuracy to software-based generators and better energy efficiency than SoTA bit-stream generators, …

Breaking New Ground: Division Directly In Memory, M. Hassan Najafi, Mehran Shoushtari Moghadam

Faculty Scholarship

In-memory computing (IMC) has emerged as a promising paradigm for overcoming the limitations of traditional von Neumann architectures by reducing data movement and enhancing computational efficiency. Despite significant advancements in this area, implementing complex arithmetic operations, such as division, directly within memory has remained an elusive challenge. This paper introduces a pioneering technique for performing division operations directly in memory, representing the first successful integration of such functionality into the IMC framework. Our approach leverages an innovative circuit based on an unconventional model of computing–stochastic computing (SC). Our technique extends the computational capabilities of IMC systems and paves the way …

Modality Distillation Using A Sam-Guided Multimodal Teacher For Unimodal Wildfire Segmentation And Temperature Prediction, Michael N. Marinaccio

All Theses

Wildfires are one of the world’s most devastating natural disasters that affect the environment, communities, and more critically, humans that live in and around those communities. Due to the threat of large-scale destruction in landscapes and human inhabited areas, it has become increasingly more important to develop wildfire detection, management, and suppression strategies to mitigate and prevent these negative outcomes. Wildfire research encompasses many different areas. Most notably, the development of communication, navigation, remote sensing, and monitoring systems. In wildfire monitoring, limitations discovered in-ground and satellite observation have shifted the focus toward Unmanned Aerial Vehicle (UAV) based wildfire research, which …

Design Considerations Of A Gpu, Nicholas M. Devilliers

Electrical Engineering and Computer Science Undergraduate Honors Theses

With the current era of AI technology, the era of single instruction multiple data has become an increasingly viable solution to accelerate training. The problem is that while software to use GPUs and other hardware accelerators, designing GPUs and ASIC devices has become increasingly more expensive and there aren’t great examples of generic GPUs that anyone can use and modify. In this thesis, there are four design considerations that will be discussed and how they affect the result of a generic GPU. The four considerations that were talked about in the thesis are, word width, arithmetic type, number of stages, …

Lightlink: Visible Light Communication For Batteryless Devices With Variable Computational Load, Charles Phillips

All Theses

Visible Light Communication (VLC) devices have been experimentally proven to work as a suitable communication medium for batteryless devices. However, the effects of practical load have yet to be fully explored. To that end, we have developed LightLink, a new MAC and PHY layer protocol for VLC within batteryless devices, and have studied various ways that computational load can affect transmission accuracy in realistic scenarios. Our key findings point us towards an adaptive VLC reception system based on inferred environmental variables.

Evaluating Hyper-V Vs Proxmox: Performance Comparison For Virtualization*, Ivan Vakal, Edwin Regalado

Campus Research Month

Virtual environments play a significant role in the IT industry, with many companies relying on this technology. With VMware’s increasing licensing costs following its acquisition by Broadcom, many businesses are seeking alternative virtualization solutions. This study evaluates the performance of Proxmox and Hyper-V by implementing a three-node high-availability cluster for each platform and conducting benchmarking tests on CPU performance, storage efficiency, and network throughput. Our results indicate that Hyper-V performs better with Windows-based virtual machines, while Proxmox demonstrates superior performance with Linux-based workloads. Additionally, Proxmox offers a more user-friendly cluster setup, whereas Hyper-V requires greater technical expertise.

Design And Implementation Of Uvm-Based Verification Framework For Deep Learning Accelerators, Randa Ahmed Hussein Aboudeif

Theses and Dissertations

Recent advancements in deep learning (DL) have made hardware accelerators, known as deep learning accelerators (DLAs), a preferred solution for numerous high-performance computing (HPC) applications, including speech recognition, computer vision, and image classification. DLAs are composed of hundreds of parallel processing engines to speed up computations and can gain access to pre-trained networks from the cloud or through on-chip memory to implement the DNN inference process. DLA verification is becoming an important and challenging phase. The verification process is required to handle the complex DLA design. Moreover, the reliability of DLAs is critical for assessment as they are involved in …

An Evaluation Of Reinforcement Learning Algorithms In Video Game Development, Isaac Lockwood

Masters Theses & Specialist Projects

Reinforcement Learning (RL) has demonstrated substantial promise for creating adaptive, responsive AI in complex environments such as video games. Yet despite growing academic interest, industry adoption remains limited due to computational overhead, reward-design challenges, and unpredictable AI behaviors. This thesis investigates how RL algorithms—specifically Advantage Actor-Critic (A2C), Deep Q-Network (DQN), and Proximal Policy Optimization (PPO)—can be applied to three different genres of video games. Those being first-person shooter (fps), fighting, and strategy.

Through a combination of scenario-based experimentation and comprehensive analysis, this work explores the feasibility and design considerations crucial for integrating RL-driven AI into commercial games. Key factors examined …

Optimizing Architecture And Software For Next-Generation Memory Systems, Lingfeng Xiang

Computer Science and Engineering Dissertations - Archive

The rapid advancement of memory technologies presents new challenges and opportunities for system software and architectural design. This dissertation investigates how to optimize modern computing systems for next-generation memory, mostly focusing on persistent memory and Compute Express Link (CXL)-based memory. First, we conduct a detailed characterization of Intel Optane DC Persistent Memory, identifying the distinct behaviors of its on-DIMM read and write buffers and analyzing their impact on application performance. These insights motivate optimizations that decouple read and write paths, revealing that random read latency—especially in pointer-chasing workloads—is a dominant performance bottleneck. Second, we present NOMAD, a page management framework …

Ultrasonic Sensor-Based Sound Synthesis Using Raspberry Pi Pico W, Niraj Jaishwal

Williams Honors College, Honors Research Projects

At the intersection of Human Computer Interaction and digital art, this project transforms simple motion into musical expression. It explores an interactive real-time sound synthesis system using ultrasonic sensors to generate continuous audio. The objective is to design a system that maps physical distances into musical parameters such as pitch and amplitude, which will create a responsive audio environment. Two ultrasonic sensors are used in combination with the Raspberry Pi Pico W microcontroller running CircuitPython and Adafruit Audio Hat for real-time sound output. One sensor controls the pitch of the generated tone, while the other controls volume. This enables expressive …

Implementation Of A Neural Network Execution Framework For Generalized And Cross-Platform Deep Learning Deployment And Inference On Spacecraft Systems, Rafael Polanco Segovia

Graduate Theses, Dissertations, and Problem Reports (ETD)

Recent advances in hardware and software technology have made it possible to implement more resource-demanding deep learning algorithms in constrained hardware environments. This creates opportunities to use deep learning for aerospace applications on increasingly smaller aerospace vehicles. This work presents the implementation of a Neural Network Execution Framework (NNEF), which aims to provide a cross-platform and reusable framework to deploy and execute trained neural networks for deep learning aerospace applications. The NNEF executes any neural network inference process regardless of the original deep learning framework in which it was created, for supported flight software platforms, and space-like computer boards. Users …

Fail-Safe Logic Design Strategies Within Modern Fpga Architectures, Priya A. Bhakta

Electrical and Computer Engineering ETDs

Field Programmable Gate Arrays (FPGAs) are vulnerable to radiation-induced single event upsets (SEUs) and fault injection attacks, requiring the use of redundancy techniques such as fail-safe computing. Fail-safe computing refers to computing systems that revert to a non-operational safe state when a fault occurs. This work investigates circuit-level techniques and implements fail-safe computing processes as mitigation for SEUs and fault injection attacks on FPGAs. The analysis reveals vulnerabilities that exist in FPGAs over those in application-specific integrated circuits (ASIC); thus, requiring a more elaborate network of redundant circuits and checking logic. The reconfiguration capability of FPGAs adds complexity to fail-safe …

Exploring Smart Thermostat, Don P. Dang

2024 Fall Honors Capstone Projects - Archive

This study examines the security, privacy, and compatibility challenges associated with smart thermostats in smart home systems. Smart thermostats, as part of the growing Internet of Things (IoT) ecosystem, face vulnerabilities such as unauthorized access, data breaches, and inconsistent security protocols. Using a mixed-methods approach, this research evaluates encryption techniques, communication protocols (Zigbee, Z-Wave, Wi Fi), and user behaviors that impact system security and efficiency. Key findings indicate that 35% of users are concerned about hacking risks, while 25% express data privacy concerns. Many users lack awareness of security measures, such as firmware updates and password management, which increases vulnerabilities. …

Leveraging P4 Programmable-Hardware Switches For In-Network Pmu Packet Recovery, Evan Michael Bonar

Electrical Engineering and Computer Science Undergraduate Honors Theses

Phasor Measurement Unit (PMU) systems are essential for real-time power grid monitor- ing but often face data loss due to network delays, equipment malfunctions, or transmis- sion errors. Traditional centralized recovery solutions introduce significant latency and scalability challenges. This thesis presents a P4-based in-network recovery mechanism that embeds detection and recovery directly into the data plane of P4-enabled programmable switches, significantly reducing recovery time and infrastructure complexity. Using the Aurora 610 switch, the system detects missing packets via sequence number analysis and recovers magnitudes with an efficient register-based algorithm.

Evaluation demonstrates high accuracy and low latency, achieving a mean absolute …

Bonsai Merkle Tree Streams: Bulk Memory Verification Unit For Trusted Program Verification System, Richard J. Rios

Master's Theses

Today, all modern computing systems are undoubtedly vulnerable to numerous types of attacks that could be targeted toward any layer of the system from dedicated hardware to highly abstracted software. Unfortunately, many devices and systems naturally contain inadequately protected components or software modules that un- dermine their security as a whole. Additionally, security is heavily variable system to system, and has a huge dependence on adequate implementation and ongoing support from device and software manufacturers. To address these various security issues in a very general way, TrustGuard, a containment security system utilizing an external device called the Sentry that would …