Digital Circuits Commons^™

Estimation On Gibbs Entropy For An Ensemble, Lekhya Sai Sake

Electronic Theses, Projects, and Dissertations

In this world of growing technology, any small improvement in the present scenario would create a revolution. One of the popular revolutions in the computer science field is parallel computing. A single parallel execution is not sufficient to see its non-deterministic features, as same execution with the same data at different time would end up with a different path. In order to see how non deterministic a parallel execution can extend up to, creates the need of the ensemble of executions. This project implements a program to estimate the Gibbs Entropy for an ensemble of parallel executions. The goal is …

Universal Uav Payload Interface, Nolan Reker, David Troy Jr, Drew Troxell

Computer Engineering

Unmanned Aerial Vehicle (UAV) technology is becoming increasingly accessible for civilian use. Both open-source and commercial-purpose UAVs can be obtained affordably or even built. However, the platforms available are very segmented in their customization to a specific application (i.e. land surveying, payload delivery). This project aims to create a Universal Payload Interface (UPI) mounted to the underside of multi-rotors or other UAVs to enable the attachment of customizable sensor payloads. These payloads allow a single UAV to be rapidly reconfigured to perform a multitude of tasks.

The Universal Payload Interface facilitates communication between the payload, onboard flight controller, and operator …

Forest Sign Maker, Victor Espinosa Iii, Kevin Ly, Lisa Yip

Mechanical Engineering

Executive Summary:

The Inyo National Forest is arguably one of the most beautiful locations in California, containing natural masterpieces such as Mount Whitney and the Ancient Bristlecone Pine Forest. Despite its magnificence, the Inyo National Forest can be a treacherous region. The Friends of the Inyo take pride in being able to facilitate the viewing experience for all outdoorsmen by maintaining the mountain trails, which includes providing adequate trail signage.

Unfortunately, there is a fundamental issue with the recent state of trail signage in the Inyo National Forest: the rate at which signs are being vandalized or naturally destroyed is …

Multiferroic Tunnel Junctions And Ferroelectric Control Of Magnetic State At Interface, Y. W. Yin, M. Raju, W. J. Hu, John D. Burton, Y.-M. Kim, A. Y. Borisevich, S. J. Pennycook, S. M. Yang, T. W. Noh, Alexei Gruverman, X. G. Li, Z. D. Zhang, Evgeny Y. Tsymbal, Qi Li

Alexei Gruverman Publications

As semiconductor devices reach ever smaller dimensions, the challenge of power dissipation and quantum effect place a serious limit on the future device scaling. Recently, a multiferroic tunnel junction (MFTJ) with a ferroelectric barrier sandwiched between two ferromagnetic electrodes has drawn enormous interest due to its potential applications not only in multi-level data storage but also in electric field controlled spintronics and nanoferronics. Here, we present our investigations on four-level resistance states, giant tunneling electroresistance (TER) due to interfacial magnetoelectric coupling, and ferroelectric control of spin polarized tunneling in MFTJs. Coexistence of large tunneling magnetoresistance and TER has been observed …

Design Of An All-In-One Embedded Flight Control System, Joel D. Elmore

Theses and Dissertations

This thesis describes an all-in-one flight control system (FCS) that was designed for unmanned aerial vehicles (UAVs). The project focuses on the embedded hardware aspect of a stand-alone system with low-cost and reliability in mind.

Technology Mapping, Design For Testability, And Circuit Optimizations For Null Convention Logic Based Architectures, Farhad Alibeygi Parsan

Graduate Theses and Dissertations

Delay-insensitive asynchronous circuits have been the target of a renewed research effort because of the advantages they offer over traditional synchronous circuits. Minimal timing analysis, inherent robustness against power-supply, temperature, and process variations, reduced energy consumption, less noise and EMI emission, and easy design reuse are some of the benefits of these circuits. NULL Convention Logic (NCL) is one of the mainstream asynchronous logic design paradigms that has been shown to be a promising method for designing delay-insensitive asynchronous circuits.

This dissertation investigates new areas in NCL design and test and is made of three sections. The first section discusses …

Efficient Fpga Architectures For Separable Filters And Logarithmic Multipliers And Automation Of Fish Feature Extraction Using Gabor Filters, Arjun Kumar Joginipelly

LSU New Orleans Theses and Dissertations

Convolution and multiplication operations in the filtering process can be optimized by minimizing the resource utilization using Field Programmable Gate Arrays (FPGA) and separable filter kernels. An FPGA architecture for separable convolution is proposed to achieve reduction of on-chip resource utilization and external memory bandwidth for a given processing rate of the convolution unit.

Multiplication in integer number system can be optimized in terms of resources, operation time and power consumption by converting to logarithmic domain. To achieve this, a method altering the filter weights is proposed and implemented for error reduction. The results obtained depict significant error reduction when …

Ad-Hoc Hid: Modular Wireless Human Interface Device, Joseph A. Mazzanti

Electrical Engineering

Ad-Hoc HID is a modular, reprogrammable Human Interface Device. This device is intended to function as a keyboard, gamepad, or mouse, according to the user's needs. The final project is intended to be switch agnostic, making the final product adaptable to the user’s needs.

Mos Current Mode Logic (Mcml) Analysis For Quiet Digital Circuitry And Creation Of A Standard Cell Library For Reducing The Development Time Of Mixed Signal Chips, David Marusiak

Master's Theses

Many modern digital systems use forms of CMOS logical implementation due to the straight forward design nature of CMOS logic and minimal device area since CMOS uses fewer transistors than other logic families. To achieve high-performance requirements in mixed-signal chip development and quiet, noiseless circuitry, this thesis provides an alternative toCMOSin the form of MOS Current Mode Logic (MCML). MCML dissipates constant current and does not produce noise during value changing in a circuit CMOS circuits do. CMOS logical networks switch during clock ticks and with every device switching, noise is created on the supply and ground to deal with …

Data Transfer Using Light, Ryan Thomas Suarez

Computer Engineering

A proof of concerpt for data transmission using light as a medium. Data is transferred by strobing and LED faster than the human eye can detect in an attempt to come up with a more secure alternate to in-building wifi.

Implementation Of Prediction Algorithms To Reduce Latency In Control Of Switching Converters, Brent Bell

Electrical Engineering Undergraduate Honors Theses

Using pulse-width modulation (PWM) to control switching converters such as a dual active bridge introduces latency into a system [1]. Latency in a switching converter decreases the effective bandwidth that the converter can be switched at and for the case of a closed loop control system decreases the effective closed loop system stability. This delay can be attributed to sampling of the control signal and calculation time for the PWM. If a prediction scheme is implemented in this calculation, the next switching time could be predicted to remove any latency. There are effectively two steps in order to achieve this …

Digital Control Board For Phased Array Antenna Beam Steering In Adaptive Communication Applications, Mayur Bansal

Master's Theses

The application of adaptive communication techniques for mobile communications has attracted considerable interest in the last decade. One example of these techniques is spatial filtering through planar antenna array beam forming.

This thesis describes the development of a digital system that adaptively controls a phased array antenna. The radiating structure of the phased antenna array is tetrahedral-shaped and contains four antenna elements on each of its three faces. The overall system comprises of a digital control board with an external computer interface, an RF control board, and the phased antenna array. The RF controls the main lobe direction on the …

Self-Timed Dram Data Interface, Rajesh Nerkar

Dissertations and Theses

A DRAM communicates with a processing unit via two interfaces: a data interface and a command interface. In today's DRAMs, also known as synchronous DRAMs (SDRAMs), both interfaces use a clock to communicate with the processing unit. The clock times the communication between the processing unit and the SDRAM on both the data interface and the command interface.

We propose a self-timed DRAM. The self-timed DRAM introduces more flexibility into the DRAM interface by eliminating the clock. The command interface and the data interface each communicate with the processing unit using a handshake protocol rather than a clock.

This thesis …

Analysis Of Parameter Tuning On Energy Efficiency In Asynchronous Circuits, Justin Thomas Roark

Graduate Theses and Dissertations

Power and energy consumption are the primary concern of the digital integrated circuit (IC) industry. Asynchronous logic, in the past several years, has increased in popularity due to its low power nature. This thesis analyzes a collection of array multipliers with different parameters to compare two asynchronous design paradigms, NULL Convention Logic (NCL) and Multi-Threshold NULL Convention Logic (MTNCL). Several commercially available pieces of software and custom scripts are used to analyze the asynchronous circuits and their components to provide the energy consumption estimation on various parts of each circuit. The analysis of the software results revealed that MTNCL circuits …

Cad Tool Design For Ncl And Mtncl Asynchronous Circuits, Vijay Mani Pillai

Graduate Theses and Dissertations

This thesis presents an implementation of a method developed to readily convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty compared to the all low-Vt implementation, and has negligible area overhead. The proposed tool utilizes industry-standard CAD tools. This research also presents an Automated Gate-Level Pipelining with Bit-Wise Completion (AGLPBW) method to maximize throughput of delay-insensitive full-word pipelined NCL circuits. These methods have been integrated into the Mentor Graphics and …

The Visual Representation Of Sound For The Hearing Impaired, Jonathan Brophy

Electrical Engineering

There are many difficulties that arise when one is faced with a hearing disability. New applications of advancing technology have the potential to enable designs capable of assisting the hearing impaired with the ability to see sound. This project seeks to provide a user with a visual representation of loud noises detected using small directional microphones. The microphones determine the location of the sound above a set decibel level and a microprocessor determines the approximate location of the sound source and displays a vertical colored bar on a video image in the direction of the noise using virtual reality glasses. …

Cad Tools For Synthesis Of Sleep Convention Logic, Parviz Palangpour

Graduate Theses and Dissertations

This dissertation proposes an automated flow for the Sleep Convention Logic (SCL) asynchronous design style. The proposed flow synthesizes synchronous RTL into an SCL netlist. The flow utilizes commercial design tools, while supplementing missing functionality using custom tools. A method for determining the performance bottleneck in an SCL design is proposed. A constraint-driven method to increase the performance of linear SCL pipelines is proposed. Several enhancements to SCL are proposed, including techniques to reduce the number of registers and total sleep capacitance in an SCL design.

Characterization Of Metal-Insulator-Transition (Mit) Phase Change Materials (Pcm) For Reconfigurable Components, Circuits, And Systems, Brent L. Danner

Theses and Dissertations

Many microelectromechanical systems (MEMS) use metal contact micro-switches as part of their reconfigurable device design. These devices utilize a mechanical component that can wear down and fail over time. Metal insulator transition (MIT) materials, also known as phase change materials (PCMs), exhibit a reversible transition that can be used to replace the mechanical component in reconfigurable devices. In the presence of a thermal or electric field stimuli, the PCMs will transition back and forth between a crystalline and amorphous state. During this transformation, the resistivity, reflectivity, and Young's modulus of the material drastically change. This research effort focuses on characterizing …

Caddy: A 2005 Roborodentia Entry With Vision And Path Planning Abilities, Taylor Braun-Jones

Computer Engineering

Roborodentia is an autonomous robotics competition held each year during Cal Poly’s Open House. For the 2005 competition, robot entries needed to navigate a maze searching for three randomly placed golf balls, collect them, and then deposit the balls in the “nest” at the end of the maze. A newly added aspect for the 2005 competition included two bonus balls that were placed on a platform behind the wall in two predetermined corners of the maze.

Caddy is a robot that was entered into the 2005 Roborodentia competition. Caddy included a vision system that allowed searching for balls down untraveled …

Wireless Networks-On-Chips: Architecture, Wireless Channel, And Devices, David W. Matolak, Avinash Kodi, Savas Kaya, Dominic Ditomaso, Soumyasanta Laha, William Rayess

Faculty Publications

Wireless networks-on-chips (WINoCs) hold substantial promise for enhancing multicore integrated circuit performance, by augmenting conventional wired interconnects. As the number of cores per IC grows, intercore communication requirements will also grow, and WINoCs can be used to both save power and reduce latency. In this article, we briefly describe some of the key challenges with WINoC implementation, and also describe our example design, iWISE, which is a scalable wireless interconnect design. We show that the integration of wireless interconnects with wired interconnects in NoCs can reduce overall network power by 34 percent while achieving a speedup of 2.54 on real …

Design And Simulation Of Interconnected H-Bridge Inverter, Samuel Muehleck

Computer Engineering

In this project, the research, design and simulation of an interconnected H-bridge single-phase inverter was explored. The inverter design was divided into three separate sections. First, a VHDL programmed CPLD was used to generate control signals for the transistors of the inverter circuit. Second, power electronics was used to create an inverter circuit to change a DC input to a 60 Hz AC output. Lastly, additional circuits were used to link the generated control signals to the MOSFET transistors of the inverter circuit. The operation of the three components was then validated with computer simulations. Results of computer simulation demonstrate …

Iphone Breathalyzer: Point Oh Wait!, Gurpal Bhoot

Electrical Engineering

This final year project combines hardware and software components to create an alcohol breathalyzer that is compatible with the iPhone. The final design of the circuit and the iPhone application is original and combines multiple components to create the final product. Most of those components are seen in a simplified version of a breathalyzer, while the added components take care of the interface to the iPhone.

Measurement And Modeling Of Passive Surface Mount Devices On Fr4 Substrates, Rahulkumar Sadanand Koche

Dissertations and Theses

Passive components like resistors, capacitors and inductors are used in every electronic system. These are the very basic components which affect the system performance at higher frequencies and it is necessary to understand and model the behavior of these components in a very accurate manner. This work focuses on utilizing Printed Circuit Board (PCB) test boards, or fixtures, made of FR4 for characterizing Surface Mount Device (SMD) components. Agilent's Advanced Design System (ADS) microwave circuit simulation software was used for designing the microstrip transmission lines as well as for generating the layout for manufacturing of the PCB. SMD resistors, capacitors …

Critical Information Technology On Fpgas Through Unique Device Specific Keys, Miles E. Mcgee

Theses and Dissertations

Field Programmable Gate Arrays (FPGAs) are being used for military and other sensitive applications, the threat of an adversary attacking these devices is an ever present danger. While having the ability to be reconfigured is helpful for development, it also poses the risk of its hardware design being cloned. Static random access memory (SRAM) FPGA's are the most common type of FPGA used in industry. Every time an SRAM-FPGA is powered up, its configuration must be downloaded. If an adversary is able to obtain that configuration, they can clone sensitive designs to other FPGAs. A technique that can be used …

Full Custom Vlsi Design Of On-Line Stability Checkers, Chris Y. Lee

Master's Theses

A stability checker is a clocked storage element, much like a flip-flop, which detects unstable and late signals in the pipeline of a digital system. The On-line stability checker operates concurrently with its associated circuit-under-test (CUT). This thesis describes the full custom very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course at Cal Poly.

A method for concurrent fault testing called On-line Stability Checking …

Programmable Household Led Light Fixture, Jordan Locano

Electrical Engineering

This report details the development and construction of a LED light fixture to be used for household lighting. This document details background information, design ideas, project specifications, production, assembly, testing, and conclusions involved with this project. The goals of this project is to design and build a cost-effective replacement for traditional room lighting that can perform better and last longer than traditional methods.

Project 308: Augmented Reality Mario Kart, Joseph Abad, David Allender, Joryl Calizo, Ryan Gaspar, Gavin Lee

Computer Engineering

Mario Kart is a popular go-kart racing game developed by Nintendo. The premise of the game is simple: drive a go-kart along a racetrack and reach the finish line before the other players. What makes this game unique, however, is the inclusion of weapons, traps, and other projectiles that a player can use to gain an advantage in the race. We have taken on the challenge of not only recreating this amazing game, but using the art of Augmented Reality to fully immerse the player in the full experience. Rather than play the game on a television screen with a …

Discrete Alarm Clock, Travis Moore, Collin Barth

Electrical Engineering

The standard alarm clock, as used daily by millions worldwide, has clear room for modification and improvement.  This paper documents an implementation that rectifies many of these flaws.  Improvements include adjustable snooze length, an IR remote for ease of use, and an RF headset for discrete alarm use or potential incorporation into a device much like a hearing aid.  The processes involved in creating a digital alarm clock, as well as the obstacles met in the implementation of the enhanced design, are detailed within.

Worse-Than-Rayleigh Fading: Experimental Results And Theoretical Models, David W. Matolak, Jeff Frolik

Faculty Publications

This article is motivated by the recent recognition that channel fading for new wireless applications is not always well described by traditional models used for mobile communication systems. In particular, fading data collected for vehicleto- vehicle and wireless sensor network applications has motivated new models for conditions in which channel fading statistics can be worse than Rayleigh. We review the use of statistical channel models, describe our example applications, and provide both measured and modeling results for these severe fading conditions.

Multi-Threshold Cmos Circuit Design Methodology From 2d To 3d, Ross Josiah Thian

Graduate Theses and Dissertations

A new and exciting approach in digital IC design in order to accommodate the Moore's law is 3D chip stacking. Chip stacking offers more transistors per chip, reduced wire lengths, and increased memory access bandwidths. This thesis demonstrates that traditional 2D design flow can be adapted for 3D chip stacking. 3D chip stacking has a serious drawback: heat generation. Die-on-die architecture reduces exposed surface area for heat dissipation. In order to reduce heat generation, a low power technique named Multi-Threshold CMOS (MTCMOS) was incorporated in this work. MTCMOS required designing a power management unit (to control when and which gates …