Computer and Systems Architecture Commons^™

Reliable Software Updates For On-Orbit Cubesat Satellites, Sean Fitzsimmons

Master's Theses

CubeSat satellites have redefined the standard solution for conducting missions in space due to their unique form factor and cost. The harsh environment of space necessitates examining features that improve satellite robustness and ultimately extend lifetime, which is typical and vital for mission success. The CubeSat development team at Cal Poly, PolySat, has recently redefined its standard avionics platform to support more complex mission capabilities with this robustness in mind. A significant addition was the integration of the Linux operating system, which provides the flexibility to develop much more elaborate protection mechanisms within software, such as support for remote on-orbit …

Lyfi, Kianoosh Salami, Justin Cotton, Elush Shirazpour

Electrical Engineering

This paper will cover the steps necessary to design, build, and manage networkable smart light switches over WiFi via a mobile application. It contains a microcontroller running a real time operating system, a WiFi module, a Java server with SQLite databasing, and a mobile phone application.

LyFi is designed to turn on/off and dim household lights while only requiring the same installation procedure as a less capable dimmer switch. Once installed and connected to a network, LyFi will self-discover and configure. The server automatically propogates a database of nodes where any mobile device running an application can receive an updated …

Location Of Processor Allocator And Job Scheduler And Its Impact On Cmp Performance, Dawid Zydek, Grzegorz Chmaj, Alaa Shawky, Henry Selvaraj

Electrical & Computer Engineering Faculty Research

High Performance Computing (HPC) architectures are being developed continually with an aim of achieving exascale capability by 2020. Processors that are being developed and used as nodes in HPC systems are Chip Multiprocessors (CMPs) with a number of cores. In this paper, we continue our effort towards a better processor allocation process. The Processor Allocator (PA) and Job Scheduler (JS) proposed and implemented in our previous works are explored in the context of its best location on the chip. We propose a system, where all locations on a chip can be analyzed, considering energy used by Network-on-Chip (NoC), PA and …

Decision Strategies For A P2p Computing System, Grzegorz Chmaj, Krzysztof Walkowiak

Electrical & Computer Engineering Faculty Research

Peer-to-Peer (P2P) computing (also called ‘public-resource computing’) is an effective approach to perform computation of large tasks. Currently used P2P computing systems (e.g., BOINC) are most often centrally managed, i.e., the final result of computations is created at a central node using partial results – what may be not efficient in the case when numerous participants are willing to download the final result. In this paper, we propose a novel approach to P2P computing systems. We assume that results can be delivered to all peers in a distributed way using three types of network flows: unicast, Peer-to-Peer and anycast. We …

Software Development Approach For Discrete Simulators, Grzegorz Chmaj, Dawid Maksymilian Zydek

Electrical & Computer Engineering Faculty Research

Simulation is the most common approach to perform the problem research. Among several types of simulation, the most common way is the discrete simulation, which assumes the division of the time scale into fixed length time slots. Depending on investigated problem, simulation packages may be used or it could be necessary to design and create own simulation system. In this paper, we propose the complete pre-study scheme and the most commonly appearing implementation problems with suggested solutions. We also describe how to implement the exemplary simulator in C++.

Full Custom Vlsi Design Of On-Line Stability Checkers, Chris Y. Lee

Master's Theses

A stability checker is a clocked storage element, much like a flip-flop, which detects unstable and late signals in the pipeline of a digital system. The On-line stability checker operates concurrently with its associated circuit-under-test (CUT). This thesis describes the full custom very-large-scale integration (VLSI) design and testing process of On-Line Stability Checkers. The goals of this thesis are to construct and test Stability Checker designs, and to create a design template for future class projects in the EE 431 Computer-Aided Design (CAD) of VLSI Devices course at Cal Poly.

A method for concurrent fault testing called On-line Stability Checking …

Calibration Of Complex System Dynamics Models: A Practioner's Report, Rod Walker, Wayne Wakeland

Complex Systems Faculty Publications and Presentations

This paper is not a typical academic paper that is solidly grounded in the literature. Instead, this paper reports practitioner’s experiences in rebuilding and calibrating a very large system dynamics model. A prior version of this model had been in use for over 10 years in an ongoing executive training simulation. That model had never worked correctly in several key areas, requiring the outputs to be manually adjusted by very experienced facilitators during the course of the simulation. The present project rebuilt the system dynamics model, redesigned the parts that weren’t working, and calibrated the resulting model to match the …

Project 308: Augmented Reality Mario Kart, Joseph Abad, David Allender, Joryl Calizo, Ryan Gaspar, Gavin Lee

Computer Engineering

Mario Kart is a popular go-kart racing game developed by Nintendo. The premise of the game is simple: drive a go-kart along a racetrack and reach the finish line before the other players. What makes this game unique, however, is the inclusion of weapons, traps, and other projectiles that a player can use to gain an advantage in the race. We have taken on the challenge of not only recreating this amazing game, but using the art of Augmented Reality to fully immerse the player in the full experience. Rather than play the game on a television screen with a …

Design And Implementation Of A Byzantine Fault Tolerance Framework For Non-Deterministic Applications, H. Zhang, Wenbing Zhao, Louise E. Moser, P. Michael Melliar-Smith

Electrical and Computer Engineering Faculty Publications

State-machine-based replication is an effective way to increase the availability and dependability of mission-critical applications. However, all practical applications contain some degree of non-determinism. Consequently, ensuring strong replica consistency in the presence of application non-determinism has been one of the biggest challenges in building dependable distributed systems. In this Study, the authors propose a classification of common types of application non-determinism with respect to the requirement of achieving Byzantine fault tolerance (BFT), and present the design and implementation of a BFT framework that controls these types of non-determinism in a systematic manner.

Increasing Efficiency In Boundary Security With Wireless Sensor Networks And Geospatial Information Systems Using Homology Theory, Luis Berumen^, Eric Chaidez^, Hamide Dogan*, Jose Gerardo Rosiles**

COURI Symposium Abstracts, Spring 2011

As part of an institutional investigation, we attempt to address the challenges the US customs and Border protection agency faces in the El Paso region. Our research focuses on defining a system for the surveillance application, and the use of mathematical models employed to achieve a greater efficiency of such architecture. With the use of the defined system, we apply homology theory through the algebraic process of topology, to accomplish an independent coordinate-free based system, which covers the surveillance area, with lesser quantity of sensor nodes. Our architecture makes the use of an operating system for wireless sensor networks; TinyOS, …

Dynamic Polymorphic Reconfiguration To Effectively “Cloak” A Circuit’S Function, Jeffrey L. Falkinburg

Theses and Dissertations

Today's society has become more dependent on the integrity and protection of digital information used in daily transactions resulting in an ever increasing need for information security. Additionally, the need for faster and more secure cryptographic algorithms to provide this information security has become paramount. Hardware implementations of cryptographic algorithms provide the necessary increase in throughput, but at a cost of leaking critical information. Side Channel Analysis (SCA) attacks allow an attacker to exploit the regular and predictable power signatures leaked by cryptographic functions used in algorithms such as RSA. In this research the focus on a means to counteract …

Universal Engineering Programmer – An In-House Development Tool For Developing And Testing Implantable Medical Devices In St. Jude Medical, Khoa Tat Do

Master's Theses

During development and testing of the functionality of the pacemaker and defibrillator device, engineers in the St. Jude Medical Cardiac Rhythm Management Division use an in-house development tool called Universal Engineering Programmer (UEP) to ensure the device functions as expected, before it can be used to test on an animal or a human during the implantation process.  In addition, some applications of UEP are incorporated into the official releases of the device product.  UEP has been developed and used by engineers across departments in the St. Jude Medical Cardiac Rhythm Management Division (CRMD).  This thesis covers the flexible and reusable …

Data Routing In Multicore Processors Using Dimension Increment Method, Arpita H. Kadakia

UNLV Theses, Dissertations, Professional Papers, and Capstones

A Deadlock-free routing algorithm can be generated for arbitrary interconnection network using the concept of virtual channels but the virtual channels will lead to more complex algorithms and more demands of NOC resource.

In this thesis, we study a Torus topology for NOC application, design its structure and propose a routing algorithm exploiting the characteristics of NOC. We have chosen a typical 16 (4 by 4) routers Torus and propose the corresponding route algorithm. In our algorithm, all the channels are assigned 4 different dimensions (n0,n1,n2 & n3). By following the dimension increment method, we break the dependent route circles, …

Asynchronous Mips Processors: Educational Simulations, Robert L. Webb

Master's Theses

The system clock has been omnipresent in most mainstream chip designs. While simplifying many design problems the clock has caused the problems of clock skew, high power consumption, electromagnetic interference, and worst-case performance. In recent years, as the timing constraints of synchronous designs have been squeezed ever tighter, the efficiencies of asynchronous designs have become more attractive. By removing the clock, these issues can be mitigated. How- ever, asynchronous designs are generally more complex and difficult to debug. In this paper I discuss the advantages of asynchronous processors and the specifics of some asynchronous designs, outline the roadblocks to asynchronous …

Scan Loss Pattern Synthesis For Adaptive Array Ground Stations, William C. Barott, Mary Ann Ingram, Paul G. Steffes

Publications

We present several techniques for maximizing the contact time between low Earth orbiting satellites (LEOs) and a ground station (GS). The GS comprises an adaptive array of electronically steered space-fed lenses (SFLs). Each SFL is manufactured as a low-cost printed circuit with the result that it exhibits scanning loss. By differently orienting the boresights of the SFLs in the adaptive array, the SFL's scanning losses can be made to optimally complement the path loss of the LEO, thereby reducing the cost of the GS while maximizing the download capacity of the satellite link. The optimization, implemented with a genetic algorithm …

Ultrasonic Shark-Tag Locator System For Iver2 Auv, Nathaniel Garcia

Computer Engineering

The purpose of this project is to develop a system for tracking an ultrasonic underwater transmitter that can be integrated into an IVER2 AUV to allow it to follow and monitor tagged sharks in the ocean for scientific research.

The system consists of a four main components including a shark-tag, two hydrophones, a filter/amplifier & threshold detector circuit, and a microcontroller.

This project, while not completing field testing and integration with the IVER2, is a proof of concept of a system that utilizes passive sonar to determine a bearing from the system to a shark-tag transmitter. Additionally, it devised several …

Touch Screen Sound Controller, James Fenley, Jonathan Law

Electrical Engineering

The Touch Screen Sound Controller sets out to explore the use of a touch screen as a sound control interface for the disk jockey profession. In addition, the project aims to provide an alternate means of transferring audio data by way of TCP/IP communications as opposed to MIDI. By applying our method, a user may stream pulse-code modulated data from a server onto a client’s RAM via an Ethernet connection. A 32bit, 200MHz ARM9 microprocessor addresses data from the RAM and proceeds with executing DSP instructions from the user. The connection between the touch screen and the central microprocessor is …

Developing A Filter Kit System Database: Procedure And Analysis, He Shi

Morehead State Theses and Dissertations

A thesis presented to the faculty of the College of Science and Technology at Morehead State University in partial fulfillment of the requirements for the Degree Master of Science by He Shi on April 30, 2010.

Processor Allocator For Chip Multiprocessors, Dawid Maksymilian Zydek

UNLV Theses, Dissertations, Professional Papers, and Capstones

Chip MultiProcessor (CMP) architectures consisting of many cores connected through Network-on-Chip (NoC) are becoming main computing platforms for research and computer centers, and in the future for commercial solutions. In order to effectively use CMPs, operating system is an important factor and it should support a multiuser environment in which many parallel jobs are executed simultaneously. It is done by the processor management system of the operating system, which consists of two components: Job Scheduler (JS) and Processor Allocator (PA). The JS is responsible for job scheduling that deals with selection of the next job to be executed, while the …

Flexible Computing Architecture For Real Time Skin Detection, Matthew P. Hornung

Theses and Dissertations

In both the Air Force and Search and Rescue Communities, there is a current need to detect and characterize persons. Existing methods use red-green-blue (RGB) imagery, but produce high false alarm rates. New technology in multi-spectral skin detection is better than the existing RGB methods, but lacks a control and processing architecture to make them efficient for real time problems. We hypothesize that taking a minimalistic approach to the software design, we can perform image preprocessing, feature computation, and skin detection in real time. A number of applications require accurate detection and characterization of persons, human measurement and signature intelligence …

Random Approach To Optimization Of Overlay Public-Resource Computing Systems, Grzegorz Chmaj, Krzysztof Walkowiak

Electrical & Computer Engineering Faculty Research

The growing need for computationally demanding systems triggers the development of various network-oriented computing systems organized in a distributed manner. In this work we concentrate on one kind of such systems, i.e. public-resource computing systems. The considered system works on the top of an overlay network and uses personal computers and other relatively simple electronic equipment instead of supercomputers. We assume that two kinds of network flows are used to distribute the data in the public-resource computing systems: unicast and peer-to-peer. We formulate an optimization model of the system. After that we propose random algorithms that optimize jointly the allocation …

Design And Implementation Of A Byzantine Fault Tolerance Framework For Web Services, Wenbing Zhao

Electrical and Computer Engineering Faculty Publications

Many Web services are expected to run with high degree of security and dependability. To achieve this goal, it is essential to use a Web services compatible framework that tolerates not only crash faults, but Byzantine faults as well, due to the untrusted communication environment in which the Web services operate. In this paper, we describe the design and implementation of such a framework, called BFT-WS. BFT-WS is designed to operate on top of the standard SOAP messaging framework for maximum interoperability. It is implemented as a pluggable module within the Axis2 architecture, as such, it requires minimum changes …

Proactive Service Migration For Long-Running Byzantine Fault-Tolerant Systems, Wenbing Zhao, H. Zhang

Electrical and Computer Engineering Faculty Publications

A proactive recovery scheme based on service migration for long-running Byzantine fault-tolerant systems is described. Proactive recovery is an essential method for ensuring the long-term reliability of fault-tolerant systems that are under continuous threats from malicious adversaries. The primary benefit of our proactive recovery scheme is a reduced vulnerability window under normal operation. This is achieved in two ways. First, the time-consuming reboot step is removed from the critical path of proactive recovery. Second, the response time and the service migration latency are continuously profiled and an optimal service migration interval is dynamically determined during runtime based on the observed …

Implementation Requirements For The Notice Architecture In Vehicular Communications, Dusadee Treeumnuk

Electrical & Computer Engineering Theses & Dissertations

Many studies have been focusing on Vehicular Ad-Hoc Networking (VANET) in order to increase the quality of traffic and life on the road. An important aspect in vehicular communications is maintaining the privacy and security of VANET. NOTICE is an emerging architecture promising efficient traffic notification as well as strong immunity to malicious attacks, leading to improvement of safety and reduction of traffic congestion on roadways. To enable secure traffic notification, the NOTICE system employs vehicle-to-infrastructure (V2I) communication rather than vehicle-to-vehicle (V2V) communication like in traditional VANET. The infrastructure consists of sensor belts which are embedded in the roadway and …

Where Does Your Institution Stand?, Wendell Brase, Mark Askren

Information Technology Services: Publications

Media coverage of sustainability and "green" issues is hard to ignore these days. But less clear is a specific understanding of what this agenda means within higher ed IT organizations. For starters, it's useful to self-assess whether your campus is a leading innovator on all things "green" or satisfied to remain inconspicuous in the middle of the pack. If your institution is trailing but wants to assert a leadership role in environmental stewardship, you need to get engaged to understand what it will take to catch up and how IT can be a leader, not just a contributor, to such …

Scheduling Architectures For Diffserv Networks With Input Queuing Switches, Mei Yang, Henry Selvaraj, Enyue Lu, Jianping Wang, S. Q. Zheng, Yingtao Jiang

Electrical & Computer Engineering Faculty Research

ue to its simplicity and scalability, the differentiated services (DiffServ) model is expected to be widely deployed across wired and wireless networks. Though supporting DiffServ scheduling algorithms for output-queuing (OQ) switches have been widely studied, there are few DiffServ scheduling algorithms for input-queuing (IQ) switches in the literaure. In this paper, we propose two algorithms for scheduling DiffServ DiffServ networks with IQ switches: the dynamic DiffServ scheduling (DDS) algorithm and the hierarchical DiffServ scheduling (HDS) algorithm. The basic idea of DDS and HDS is to schedule EF and AF traffic According to Their minimum service rates with the reserved bandwidth …

Dynamic Task Prediction For An Spmt Architecture Based On Control Independence, Komal Jothi

Dissertations and Theses

Exploiting better performance from computer programs translates to finding more instructions to execute in parallel. Since most general purpose programs are written in an imperatively sequential manner, closely lying instructions are always data dependent, making the designer look far ahead into the program for parallelism. This necessitates wider superscalar processors with larger instruction windows. But superscalars suffer from three key limitations, their inability to scale, sequential fetch bottleneck and high branch misprediction penalty. Recent studies indicate that current superscalars have reached the end of the road and designers will have to look for newer ideas to build computer processors.

Speculative …

Preliminary Study On Optimization Of Data Distribution In Resource Sharing Systems, Grzegorz Chmaj, Krzysztof Walkowiak

Electrical & Computer Engineering Faculty Research

Grid structures are increasingly considered as very convergent with peer-to-peer networks. This paper presents a model of network acting both as grid and peer-to-peer network, used for data computation and distribution. Presented PPLC algorithm is a complete solution for both grid and peer-to-peer points of view. Problem formulation is presented, as well as solution heuristic algorithm and research results.

Performance And Analysis Of Transfer Control Protocol Over Voice Over Wireless Local Area Network, Rajendra Patil

Morehead State Theses and Dissertations

A thesis presented to the faculty of the College of Science and Technology at Morehead State University in partial fulfillment of the requirements for the Degree Master of Science by Rajendra Patil in August of 2008.

A Reservation-Based Extended Transaction Protocol, Wenbing Zhao, Louise E. Moser, P. Michale Melliar-Smith

Electrical and Computer Engineering Faculty Publications

With the advent of the new generation of Internet-based technology, in particular, web services, the automation of business activities that are distributed across multiple enterprises becomes possible. Business activities are different from traditional transactions in that they are typically asynchronous, loosely coupled, and long running. Therefore, extended transaction protocols are needed to coordinate business activities that span multiple enterprises. Existing extended transaction protocols typically rely on compensating transactions to handle exceptional conditions. In this paper, we identify a number of issues with compensation-based extended transaction protocols and describe a reservation-based extended transaction protocol that addresses those issues. Moreover, we define …