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2001

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Articles 1291 - 1320 of 1795

Full-Text Articles in Engineering

Yellow And Green Luminescence In A Freestanding Gan Template, Michael A. Reshchikov, Hadis Morkoç, S. S. Park, K. Y. Lee Jan 2001

Yellow And Green Luminescence In A Freestanding Gan Template, Michael A. Reshchikov, Hadis Morkoç, S. S. Park, K. Y. Lee

Electrical and Computer Engineering Publications

We have studied a broad photoluminescence band in high-mobility freestanding 200-μm-thick GaN template prepared by hydride vapor-phase epitaxy. Variable-excitation intensity and energy experiments showed two defect-related bands: a yellow luminescence (YL) band at about 2.15 eV and a green luminescence (GL) band at about 2.43 eV. In contrast to epitaxial GaN samples prepared by both vapor-phase and molecular-beam epitaxy, the YL in the sample studied is weak and can be easily saturated. However, the GL is dominant. We attribute the GL to isolated defects involving galliumvacancies and the YL to the same defect, but bound to dislocations, or possibly to …

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Transient Photoluminescence Of Defect Transitions In Freestanding Gan, Michael A. Reshchikov, Hadis Morkoç, S. S. Park, K. Y. Lee Jan 2001

Transient Photoluminescence Of Defect Transitions In Freestanding Gan, Michael A. Reshchikov, Hadis Morkoç, S. S. Park, K. Y. Lee

Electrical and Computer Engineering Publications

Deep level defects responsible for the 2.4 eV photoluminescence (PL) band in a freestanding GaN template were studied by transient photoluminescence. A nonexponential decay of PL intensity observed at low temperature is attributed to a donor–acceptor pair recombination involving a shallow donor and a deep acceptor. At room temperature, a single-exponential PL decay with a lifetime of 30 μs was observed at the high-energy side of the band, whereas the second component with a lifetime of about 750 μs was detected at the low-energy side of the band. The PL decay and transformation of the PL spectrum at room temperature …

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Characterization Of Free-Standing Hydride Vapor Phase Epitaxy Gan, J. Jasinski, W. Sider, Z. Lilental-Weber, P. Visconti, K. M. Jones, Michael A. Reshchikov, F. Yun, Hadis Morkoç, S. S. Park, K. Y. Lee Jan 2001

Characterization Of Free-Standing Hydride Vapor Phase Epitaxy Gan, J. Jasinski, W. Sider, Z. Lilental-Weber, P. Visconti, K. M. Jones, Michael A. Reshchikov, F. Yun, Hadis Morkoç, S. S. Park, K. Y. Lee

Electrical and Computer Engineering Publications

A free-standing GaN template grown by hydride vapor phase epitaxy has been characterized by transmission electron microscopy(TEM). The TEM investigation was augmented by x-ray diffraction, defect delineation etching process followed by imaging with atomic force microscopy and variable temperature photoluminescence. The density of dislocations near the N face was determined to be, in order, 3±1×107, 4±1×107, and about 1×107 cm−2 by cross-sectional TEM, plan-view TEM, and a defect revealing etch, respectively. The same methods on the Ga face revealed the defect concentration to be, in order, less than 1×107 cm−2 by plan-view TEM, less than 5×106 cm−2 by cross-sectional TEM, …

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Deep Centers In A Free-Standing Gan Layer, Z.-Q. Fang, D. C. Look, P. Visconti, D.-F. Wang, C.-Z. Lu, F. Yun, Hadis Morkoç, S. S. Park, K. Y. Lee Jan 2001

Deep Centers In A Free-Standing Gan Layer, Z.-Q. Fang, D. C. Look, P. Visconti, D.-F. Wang, C.-Z. Lu, F. Yun, Hadis Morkoç, S. S. Park, K. Y. Lee

Electrical and Computer Engineering Publications

Schottky barrierdiodes, on both Ga and N faces of a ∼300-μm-thick free-standing GaN layer, grown by hydride vapor phase epitaxy(HVPE) on Al2O3 followed by laser separation, were studied by capacitance–voltage and deep level transient spectroscopy(DLTS) measurements. From a 1/C2 vs V analysis, the barrier heights of Ni/Au Schottky contacts were determined to be different for the two polar faces: 1.27 eV for the Ga face, and 0.75 eV for the N face. In addition to the four common DLTS traps observed previously in other epitaxial GaN including HVPE-grown GaN a new trap B′ with activation energyET=0.53 eV was found in …

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Blue Photoluminescence Activated By Surface States In Gan Grown By Molecular Beam Epitaxy, Michael A. Reshchikov, P. Visconti, Hadis Morkoç Jan 2001

Blue Photoluminescence Activated By Surface States In Gan Grown By Molecular Beam Epitaxy, Michael A. Reshchikov, P. Visconti, Hadis Morkoç

Electrical and Computer Engineering Publications

We have studied the broad blue band, which emerges in the photoluminescence(PL)spectrum of c-plane GaN layers after etching in hot H3PO4 and subsequent exposure to air. This band exhibited a 100 meV blueshift with increasing excitation intensity and a thermal quenching with activation energies of 12 and 100 meV. These observations led us to suggest that surface states may be formed on etchedsurfaces and cause bandbending, which leads to a shift in transition energy with excitation. The blue PL is related to transitions from the shallow donors filled with nonequilibrium electrons to the surface states, which capture the photogenerated …

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A Site Specific Impact Study: Valley Fill Construction Impacts On Water Chemistry And Benthic Macroinvertebrate Assemblages, Terry Morton Tomasek Jan 2001

A Site Specific Impact Study: Valley Fill Construction Impacts On Water Chemistry And Benthic Macroinvertebrate Assemblages, Terry Morton Tomasek

Theses, Dissertations and Capstones

Downstream impacts of contour surface mining and valley fill construction were evaluated utilizing both water chemistry and EPA approved Rapid Bioassessment Protocol III. Wiley Branch was sampled in February of 1999 before mining perturbation. Five downstream stations were established with benthic macroinvertebrates and water samples collected seasonally for a period of sixteen months. Water chemistry parameters, pH, total aluminum, iron, and manganese, total suspended solids, total dissolved solids, sulfates, alkalinity, acidity and specific conductivity fluctuated but generally remained within acceptable governmental limits. Initially, benthic macroinvertebrate communities were well balanced within the stream. There was a high abundance of EPT individuals …

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Entrance Capacity Of An Automated Highway System, Randolph W. Hall, Ali Nowroozi, Jacob Tsao Jan 2001

Entrance Capacity Of An Automated Highway System, Randolph W. Hall, Ali Nowroozi, Jacob Tsao

Faculty Publications

This paper evaluates the entrance capacity and queueing delay for Automated Highway Systems through use of simulations and analytical modeling. Queueing statistics are also used to determine the sustainable capacity of alternative concepts, taking trip length distribution and spacing between ramps into consideration. Based on safety-spacing headways (produced in a separate analysis), the most promising concept utilizes platoons both on the highway and on on-ramps. However, it is unclear whether comparable capacity can be achieved on exit, when vehicles must be decoupled from their platoons, and whether it is safe for vehicles to enter the highway in closely spaced platoons. …

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A Software Defined Radio Platform With Direct Conversion: Soprano, Shinichiro Haruyama, Robert H. Morelos-Zaragoza Jan 2001

A Software Defined Radio Platform With Direct Conversion: Soprano, Shinichiro Haruyama, Robert H. Morelos-Zaragoza

Faculty Publications

A new software defined radio platform with multiport-based direct conversion is proposed, named SOPRANO (Software Programmable and Hardware Reconfigurable Architecture for Network). The main features of SOPRANO are a high-level design methodology for digital circuits, a new mixer-less direct conversion method, and software algorithms for multi-band and multi-mode operation. We built the first prototype SOPRANO 1.0, which was able to receive PSK and QAM signals with two different carrier frequencies at 2.45 GHz and 5.25 GHz by changing signal processing software.

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Microelectronics Process Engineering: A Non-Traditional Approach To Ms&E (Ingeniería De Procesos Microelectrónicos: Un Acercamiento No Tradicional A La Ciencia De Materiales E Ingeniería), E. Allen, Stacy H. Gleixner, G. Young, David W. Parent, Yasser Dessouky, L. Vanasupa Jan 2001

Microelectronics Process Engineering: A Non-Traditional Approach To Ms&E (Ingeniería De Procesos Microelectrónicos: Un Acercamiento No Tradicional A La Ciencia De Materiales E Ingeniería), E. Allen, Stacy H. Gleixner, G. Young, David W. Parent, Yasser Dessouky, L. Vanasupa

Faculty Publications

Materials Science and Engineering straddles the fence between engineering and science. In order to produce more work-ready undergraduates, we offer a new interdisciplinary program to educate materials engineers with a particular emphasis on microelectronics-related manufacturing. The bachelor's level curriculum in Microelectronics Process Engineering (J1ProE) is interdisciplinary, drawing from materials, chemical, electrical and industrial engineering programs and tied together with courses, internships and projects which integrate thin film processing with manufacturing control methods. Our graduates are prepared for entry level engineering jobs that require knowledge and experience in microelectronics-type fabrication and statistics applications in manufacturing engineering. They also go on to …

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Attenuation Of Sound In Concentrated Suspensions: Theory And Experiments, Ashok S. Sangani, Peter D. M. Spelt, Michael A. Norato, Margaret S. Greenwood, Lawrence L. Tavarides Jan 2001

Attenuation Of Sound In Concentrated Suspensions: Theory And Experiments, Ashok S. Sangani, Peter D. M. Spelt, Michael A. Norato, Margaret S. Greenwood, Lawrence L. Tavarides

Biomedical and Chemical Engineering - All Scholarship

Ensemble-averaged equations are derived for small-amplitude acoustic wave propagation through non-dilute suspensions. The equations are closed by introducing effective properties of the suspension such as the compressibility, density, viscoelasticity, heat capacity, and conductivity. These effective properties are estimated as a function of frequency, particle volume fraction, and physical properties of the individual phases using a self-consistent, effective-medium approximation. The theory is shown to be in excellent agreement with various rigorous analytical results accounting for multiparticle interactions. The theory is also shown to agree well with the experimental data on concentrated suspensions of small polystyrene particles in water obtained by Allegra …

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Evaluation Of Source Geometry Using A Pinhole Camera, Marilyn Maloney Jan 2001

Evaluation Of Source Geometry Using A Pinhole Camera, Marilyn Maloney

Journal of the Microelectronic Engineering Conference

A pinhole camera was used to evaluate source geometry of the GCA6700 g-line stepper. To create the camera, a photomask with various pinhole sizes was placed in the stepper, in close proximity to a wafer to generate an image. The images were evaluated to determine the shape and observe the radial intensity of the source. The variation across the source was evaluated because varying intensity across the wafer results and contributes to changes in critical dimension. Dose was varied in order to show how an illumination source might be characterized. As dose increased, the pinhole image became larger. Stacking the …

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I-Line Resist Process Monitor, Joseph G. Perez Jan 2001

I-Line Resist Process Monitor, Joseph G. Perez

Journal of the Microelectronic Engineering Conference

In order to confidently reproduce results obtained from experimentation or standard processing, the stability of the involved equipment’s performance must be understood. Therefore, it is important to monitor, on a regular basis, the outputs of an equipment set which are delivering a desired process. In this paper, a qualification test or "qual” will be defined for RIT’s 150mm i-line photolithography process which utilizes a Canon FPA 2000-i1 exposure tool.

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Development Of Automated Alignment Methodology On The Canon I-Line Stepper, Domenico Dipaola Jan 2001

Development Of Automated Alignment Methodology On The Canon I-Line Stepper, Domenico Dipaola

Journal of the Microelectronic Engineering Conference

Lithography is one of the most crucial processes that is used in modern integrated circuit (IC) fabrication. Level to level alignment and overlay measurements are key factors within lithographic processes. A stepper with an automated level to level alignment system can significantly improve wafer throughput and therefore increase profit for a company. There are many factors that can either enhance or hinder a tool's ability to align one level on top of another. For the past couple of years, RIT has had a Canon FPA 2000 ill-line stepper in their possession and the automated alignment system has never been utilized, …

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Utilization Of The Hitachi S-6780 Sem For Critical Dimension Measurement, Timothy Footer Jan 2001

Utilization Of The Hitachi S-6780 Sem For Critical Dimension Measurement, Timothy Footer

Journal of the Microelectronic Engineering Conference

The necessity of being able to accurately measure sub-micron features in devices fabricated in RIT’s microelectronic manufacturing facility has resulted in the acquisition of a Hitachi S-6780 CD SEM The Hitachi SEM will remove all user error, completely automate the current CD measurement procedure, and yield more accurate results. This project entails learning the operations of this model of SEM and the creation of various instruction manuals to allow this tool to become a commonly used piece of equipment at RIT. Explained will be the different kinds of files and measurement techniques the S-6780 SEM uses. Various experiments were performed …

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Optical Emission Spectroscopy For Plasma Etch Endpoint Detection, Keith R. Miller Jan 2001

Optical Emission Spectroscopy For Plasma Etch Endpoint Detection, Keith R. Miller

Journal of the Microelectronic Engineering Conference

Optical Emission Spectroscopy was implemented for determining the endpoint of film removal through detecting shifts in plasma emission intensity during an etch process. A preliminary procedure has been developed for detecting endpoint with the factory nitride and oxide etch processes at RIT. In conjunction with the development of an endpoint process, the minimum sensitivity for the OES endpoint system was investigated. A minimum of 0.5% exposed nitride versus resist area is required for accurately detecting endpoint on Nitride, while 5% open area is necessary for Oxide.

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Cross Sectional Analysis Of Ic Devices Using Polishing Techniques And Sem Imaging, Peter G. Terrana Jan 2001

Cross Sectional Analysis Of Ic Devices Using Polishing Techniques And Sem Imaging, Peter G. Terrana

Journal of the Microelectronic Engineering Conference

The purpose of the project was to develop a universal procedure for obtaining a cross section of various IC devices, use a Scanning Electron Microscope (SEM) to document these devices, and identify different layers and try to obtain dimensions for the devices. The technique was developed using a mechanical polishing procedure followed by a chemical mechanical polishing step, and worked as expected, producing very good images of the cross section of various film stacks and devices. Wide ranges of devices were analyzed to test the robustness of the process. Film stacks could be measured in both thickness and composition (with …

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Incorporation Of Control Charts Into A Manufacturing Execution System, Charles J. Gruener Jan 2001

Incorporation Of Control Charts Into A Manufacturing Execution System, Charles J. Gruener

Journal of the Microelectronic Engineering Conference

The wafer fabrication facility at RIT has a primary goal of being a teaching facility. Tracking of the student run wafer lots is accomplished very effectively by MESA, a lot-tracking software package. The system is configured to collect information, but data base queries were not set up to display this information. MESA has the option of outputting information from the databases to a statistical software package called Quality Analyst. Quality Analyst displays control charts for the extracted data, providing quick, visual interpretation of the process in question. The adaptation of this software into the RIT Microelectronic Engineering fabrication facility has …

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Dry Etch Of Shadow Trench Isolation, Patrick W. Reece Jan 2001

Dry Etch Of Shadow Trench Isolation, Patrick W. Reece

Journal of the Microelectronic Engineering Conference

Shallow trench isolation (STI) planarized with chemical mechanical polishing (CMP) has replaced local oxidation of silicon (LOCOS) as the conventional isolation technique for sub-micron devices. STI increases transistor-packing density, allowing for more functionality and speed per unit area. STI offer superior latch-up immunity, smaller channel-width encroachment and better planarity. The implementation and feasibility of STI has been examined for device fabrication at RIT previously. The process utilized was etching of shallow trenches using SF6-02 dry chemistry and trench fill by TEOS (tetraethylorthosilicate) oxide deposition. The etch chemistry used did not yield anisotropic etching and appreciable undercutting was observed. …

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Cmp Process Development For Shallow Trench Isolation (Sti), Robert A. Selfridge Jan 2001

Cmp Process Development For Shallow Trench Isolation (Sti), Robert A. Selfridge

Journal of the Microelectronic Engineering Conference

Tool characterization and optimization was performed on a Westech Model 372 Polisher. A Rhodes ESM-U pad with a #5 groove with PSA and two slurries: a Rodel Klebosol 1501-50 silica based slurry and a proprietary cerium oxide slurry were utilized. Initial polishing of blanket thermal oxide wafers on the Westech produced %WIWNU greater than 80% using the Klebosol slurry. Following tool calibrations and modifications to machine configurations, %WIWNU dropped to approximately 5%. Characterization studies were performed for Removal Rate vs. Platen RPM and for Removal Rate vs. Down Force. An increase in removal rate was determined with an increase in …

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Polysilicon-Germanium Films Fabricated By Ge Sputtering, Jose L. Medina Jan 2001

Polysilicon-Germanium Films Fabricated By Ge Sputtering, Jose L. Medina

Journal of the Microelectronic Engineering Conference

Poly-SixGei..x films were fabricated on 500 A of oxide by a novel process. Values for X range from 0.86 to 0.45. This novel process consists of two steps as opposed to the single step polysilicon germanium deposition methods currently used in industry. Ge was deposited by PVD and polysilicon was deposited on top of the germanium by LPCVD in a silane ambient. The films were doped P~ with boron dopant and annealed at 1,000°C for 50 minutes in a nitrogen ambient. Films with 65 and 55% Ge suffered from voids and hillocks and film discontinuity. Films with 20 and 14% …

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The Effect Of Fluorine On Low Temperature Boron Activation In Ultra Shallow Junctions, Jeremy J. Kempisty Jan 2001

The Effect Of Fluorine On Low Temperature Boron Activation In Ultra Shallow Junctions, Jeremy J. Kempisty

Journal of the Microelectronic Engineering Conference

As CMOS device dimensions continue to shrink below 200nm, one of the major limiting factors in scaling size will become the drain and source junction depth. Using fluorine to create shallower p type junctions during ion implant is one way to decrease the junction depth. The effect of fluorine on the implant and subsequent anneal processes was studied. A low temperature annealing process was developed to decrease junction depths although sufficient dopant activation is being studied.

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Development Of Cosi2 Salicide Process, Oleg A. Kirillov Jan 2001

Development Of Cosi2 Salicide Process, Oleg A. Kirillov

Journal of the Microelectronic Engineering Conference

As RIT is continuously scaling CMOS technology to smaller dimension, the Self-Aligned Suicide (Salicide) process needs to be developed. The silicided metalization leads to low-resistivity gates, interconnections and contacts between the metal and silicon substrate. Currently, salicide processes, such as titanium silicide (TiSi2) and cobalt suicide (CoSi2), are widely used in advanced CMOS technologies. However, only CoSi2 salicide process is scalable to deep sub-micron technology, since the resistivity of CoSi2 phase is independent of the dimensions. CoSi2 salicide process using titanium nitride (TiN) as capping film has been developed. Electrical tests were performed: …

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Electrolytic Plating Of Copper, Keith M. Udut Jan 2001

Electrolytic Plating Of Copper, Keith M. Udut

Journal of the Microelectronic Engineering Conference

ReynoldsTech graciously donated a copperelectroplating tool to R.I.T., which speaks volumes and has far reaching potentials and challenges for, innovative research, patents and, incorporation of the damascene process into the thin film labs. Upon eventual integration into the classroom environment further designed experiments, process improvement and senior design projects, electroplating will eventually replace the existing aluminum metal layers with copper for the advanced 1.0 μm and O.5μm CMOS process currently used in the R.I.T. integrated circuit processing student run factory. From a ground zero approach with safety issues in mind the ramping up of this new tool had to be …

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Carbon Nanotubes: Cvd Reactor Deign And Growth Of Multi-Walled Carbon Nanotubes, Jun S. Hyun Jan 2001

Carbon Nanotubes: Cvd Reactor Deign And Growth Of Multi-Walled Carbon Nanotubes, Jun S. Hyun

Journal of the Microelectronic Engineering Conference

Carbon Nanotubes are researched to develop for new technology of transporting electrons in one dimension and have commercial potential as nanoscale transistors. Carbon Nanotubes need to be made by using chemical vapor deposition (CVD). This CVD technique is used to deposit thin film on substrates. As the gas decomposes, it frees up carbon atoms, which can recombine in the form of nanotubes. The conditions for the controlled and directed CVD growth of Nanotubes are planed being established with the use of thin film metal catalyst by using RIT’s CVD Reactor. This CVD reactor was designed and made for growing the …

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Ohmic Contact Formation On N-Type 6h-Sic Using Poly-Si And Silicides, Asuka E. Nomura Jan 2001

Ohmic Contact Formation On N-Type 6h-Sic Using Poly-Si And Silicides, Asuka E. Nomura

Journal of the Microelectronic Engineering Conference

Silicon Carbide with its wide bandgap, high thermal conductivity, and high breakdown electric field is an attractive material to be used for applications in high power, and high temperature semiconductor devices. For such applications, it is extremely important to be able to form stable ohmic contacts. Various metals have been attempted to form ohmic contacts on SiC such as Ni, Ti, and Al. However it has been observed that these metallization schemes have degraded performance due to carbon accumulation by forming carbides at the interface. In this study, polycide (poly Si + silicide) based metallizations have been investigated, using NiSi …

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Fabrication And Characterization Of 6h-Sic Photovoltaic Devices, Russell P. Ott Jan 2001

Fabrication And Characterization Of 6h-Sic Photovoltaic Devices, Russell P. Ott

Journal of the Microelectronic Engineering Conference

Silicon Carbide (SIC) photovoltaic (PV) devices have caught the interest for extra terrestrial endeavors. This is due to the excellent resistance to radiation, good thermal conductivity, and high quantum efficiency of such devices. Also the large band gap (of 2.9eV) makes it ideal for gathering high-energy UV photons thus creating a large power density. Using 1cm2 6H-SiC diode samples, photovoltaic cells were produced. Both P-on-N and Non- P were examined for this study. There are two samples for each type with varying doping concentrations. For the n-side of each sample, a multilayer of TiINiIAl metals was deposited to have …

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Design And Fabrication Of On-Chip Inductors, Robert K. Requa Jan 2001

Design And Fabrication Of On-Chip Inductors, Robert K. Requa

Journal of the Microelectronic Engineering Conference

An inductor is a conductor arranged in an appropriate shape (such as a conducting wire wound as a coil) to supply a certain amount of self-inductance. This passive device stores magnetic energy. Simple spiral planar inductors of varying geometry were designed and fabricated on a silicon substrate insolated by silicon oxide. The process chosen for fabrication of the devices was the copper damascene process. Line widths and spaces varied from 5μm to 20μm. Thickness of the copper wire was approximately 1.5 μm. The inductors were isolated from the silicon substrate by 0.5 μm of Si02 and wires were insolated …

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Full-Wafer Dmos Fabrication At Rit, Stephen Sudirgo, Alex Pamatat Jan 2001

Full-Wafer Dmos Fabrication At Rit, Stephen Sudirgo, Alex Pamatat

Journal of the Microelectronic Engineering Conference

A well understanding of basic structure of Double Diffused Metal Oxide Semiconductor (DMOS) and the concept of segmented large capacitor creates possibility to produce a full-wafer DMOS. Using the Mylar Mask Technology, the final metal layer can be patterned accordingly so that to leave out any damaged fragments. Thus, it will increase the possibility of higher yield. Most of the basic fabrication processes will be done at RIT microelectronics lab facilities, and the functionality tests will be conducted at Naval Research Lab. Therefore, this paper is intended to give a general overview of concepts involved and the fabrication processes.

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Reflection Transmission Modulator, Ti'ona I. Mccauley Jan 2001

Reflection Transmission Modulator, Ti'ona I. Mccauley

Journal of the Microelectronic Engineering Conference

Microelectromechanical systems (MEMS) have gained increasing importance in the semiconductor industry. The research done had three main goals. The first was to pattern a corrugated pattern in photoresist. The second was to obtain a variation in the stress of the materials used and the third was to fabricate a micro. The micro shutter is constructed using a stack consisting of Amorphous Carbon and Aluminum and is anchored at one end to the substrate. In this study two of the three goals were met however there were some difficulties with the fabrication of the micro shutter that will be discussed later …

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Design And Analysis Of A Cmos Based Mems Accelerometer, Matthew A. Zeleznik Jan 2001

Design And Analysis Of A Cmos Based Mems Accelerometer, Matthew A. Zeleznik

Journal of the Microelectronic Engineering Conference

Traditionally, microelectromechanical systems (MEMS) have been fabricated using standard surface micromachining or bulk micromachining processes with prior or subsequent CMOS incorporation. Recently, a new hybrid technique known as CMOS enicromachining has been developed allowing for parallel fabrication of mechanical and electrical components. A single axis and dual axis accelerometer have been designed for submission for an ASIMPS alpha run using the CMOS micromachining process. Electrical and mechanical analysis and simulations for the single axis accelerometer have been performed. The sensitivity of the single axis accelerometer has been calculated to be 19.66mV/g neglecting the effects of parasitic capacitance. The released die …

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