Hardware Systems Commons^™

A Secure Reconfigurable System-On-Programmable-Chip Computer System, William Herbert Collins

Masters Theses

A System-on-Programmable-Chip (SoPC) architecture is designed to meet two goals: to provide a role-based secure computing environment and to allow for user reconfiguration. To accomplish this, a secure root of trust is derived from a fixed architectural subsystem, known as the Security Controller. It additionally provides a dynamically configurable single point of access between applications developed by users and the objects those applications use. The platform provides a model for secrecy such that physical recovery of any one component in isolation does not compromise the system. Dual-factor authentication is used to verify users. A model is also provided for tamper …

Equivalence Checking For High-Assurance Behavioral Synthesis, Kecheng Hao

Dissertations and Theses

The rapidly increasing complexities of hardware designs are forcing design methodologies and tools to move to the Electronic System Level (ESL), a higher abstraction level with better productivity than the state-of-the-art Register Transfer Level (RTL). Behavioral synthesis, which automatically synthesizes ESL behavioral specifications to RTL implementations, plays a central role in this transition. However, since behavioral synthesis is a complex and error-prone translation process, the lack of designers' confidence in its correctness becomes a major barrier to its wide adoption. Therefore, techniques for establishing equivalence between an ESL specification and its synthesized RTL implementation are critical to bring behavioral synthesis …

Bluelock: A Secure Bluetooth Operated Padlock, Trever Mckee

Computer Engineering

For this project a secure, battery operated, Bluetooth operated padlock was created. The project included both the hardware to integrate with a padlock and an Android application used to interface with the hardware. In order to make the padlock secure both AES encryption and challenge response authentication were used for secure message passing between the device and the Android phone. The project also included power consumption and sustainability tuning including exploring Arduino sleep states and integrating the project with a solar charging unit.

Motion Sensing Fifa Controller, Anthony Agius, Jake Troychak

Computer Engineering

Our Project is designed to control the XBOX 360 video game FIFA Soccer by different kicking motions made by the user. This system consists of two pieces: the microcontroller attached to the XBOX 360 controller and the foot piece that is attached to the users foot in order to read all of the movements needed to control the game. Our project brings the soccer game to life by forcing the users to actually perform the different kicking motions that they want their game avatar to copy on the game. This project was designed for those who want to be more …

Motohud: Intelligent And Safe Navigational Data Presentation For Motorcyclists, Drew Bentz, William Budney

Computer Engineering

The system uses a GPS (Global Positioning System) sensor, Bluetooth modem, and OLED (organic light-emitting diode) screen to display navigational information to a motorcycle rider. Currently supported navigational information are speed and heading, with a framework in place for future turn-by-turn navigation. The system is powered by a lithium-ion battery pack and controlled by an Arduino Micro. For turn-by-turn navigation, an Android powered smartphone running our Android App is required. Our system aims to reduce safety hazards from having to tilt or move one’s head when trying to view speed on a motorcycle speedometer, which is usually mounted down by …

Design Of An Energy Efficient Virtual End Node Client Using Openadr2.0a And Smap, Kevin Navero

BioResource and Agricultural Engineering

Demand Response (DR) describes the set of actions taken to impose a reduction in electrical loads to stabilize the power grid and decrease costs. It is used when power grid emergencies or extremely high demand and congestion, threaten the electricity supply-demand balance. Automated Demand Response (ADR) describes a web-based control system that triggers DR events automatically by signaling other pre-programmed control systems. This project intends to use the OpenADR2.0 specifications provided by the OpenADR Alliance to construct an open source Virtual End Node (VEN) client to retrieve DR signals. The Simple Measurement and Actuation Profile (sMAP) software is also used …

The Visual Representation Of Sound For The Hearing Impaired, Jonathan Brophy

Electrical Engineering

There are many difficulties that arise when one is faced with a hearing disability. New applications of advancing technology have the potential to enable designs capable of assisting the hearing impaired with the ability to see sound. This project seeks to provide a user with a visual representation of loud noises detected using small directional microphones. The microphones determine the location of the sound above a set decibel level and a microprocessor determines the approximate location of the sound source and displays a vertical colored bar on a video image in the direction of the noise using virtual reality glasses. …

Buddy: A Breathalyzer For Iphone, Douglas Blaalid, Brandon Bevans

Electrical Engineering

Buddy is a Breathalyzer for the iPhone designed to be more a product than a project. Through proprietary hardware and a custom iOS application, Buddy provides users with a previously untapped link from the alcohol in their body to the display on their phones. Buddy uses an alcohol sensor connected to an Arduino Uno to accurately detect the BAC of the user’s breath. The BAC is then transmitted to an iPhone via the headphone jack where it is displayed and logged in a captivating app. The finished prototype successfully measured the approximate BAC of intoxicated users. The product website has …

Towards A Filmic Look And Feel In Real Time Computer Graphics, Sherief Farouk

Electronic Theses and Dissertations

Film footage has a distinct look and feel that audience can instantly recognize, making its replication desirable for computer generated graphics. This thesis presents methods capable of replicating significant portions of the film look and feel while being able to fit within the constraints imposed by real-time computer generated graphics on consumer hardware.

File Carving And Malware Identification Algorithms Applied To Firmware Reverse Engineering, Karl A . Sickendick

Theses and Dissertations

Modern society depends on critical infrastructure (CI) managed by Programmable Logic Controllers (PLCs). PLCs depend on firmware, though firmware security vulnerabilities and contents remain largely unexplored. Attackers are acquiring the knowledge required to construct and install malicious firmware on CI. To the defender, firmware reverse engineering is a critical, but tedious, process. This thesis applies machine learning algorithms, from the le carving and malware identification fields, to firmware reverse engineering. It characterizes the algorithms' performance. This research describes and characterizes a process to speed and simplify PLC firmware analysis. The system partitions binary firmwares into segments, labels each segment with …

Design And Analysis Of A Small Form Factor Desktop Computer Enclosure, Curt Adkins

Morehead State Theses and Dissertations

A thesis presented to the faculty of the College of Science and Technology at Morehead State University in partial fulfillment of the requirements for the Degree of Masters of Science Engineering Technology by Curt Adkins on March 13, 2013.

Low Cost Dynamic Architecture Adaptation Schemes For Drowsy Cache Management, Nitin Prakash

Masters Theses 1911 - February 2014

Energy consumption and speed of execution have long been recognized as conflicting requirements for processor design. In this work, we have developed a low-cost dynamic architecture adaptation scheme to save leakage power in caches. This design uses voltage scaling to implement drowsy caches. The importance of a dynamic scheme for managing drowsy caches, arises from the fact that not only does cache behavior change from one application to the next, but also during different phases of execution within the same application. We discuss various implementations of our scheme that provide a tradeoff between granularity of control and design complexity. …

Design Of An Open-Source Sata Core For Virtex-4 Fpgas, Cory Gorman

Masters Theses 1911 - February 2014

Many hard drives manufactured today use the Serial ATA (SATA) protocol to communicate with the host machine, typically a PC. SATA is a much faster and much more robust protocol than its predecessor, ATA (also referred to as Parallel ATA or IDE). Many hardware designs, including those using Field-Programmable Gate Arrays (FPGAs), have a need for a long-term storage solution, and a hard drive would be ideal. One such design is the high-speed Data Acquisition System (DAS) created for the NASA Surface Water and Ocean Topography mission. This system utilizes a Xilinx Virtex-4 FPGA. Although the DAS includes a SATA …

A New Simplified Federated Single Sign-On System, Chen Liang

Masters

The work presented in this MPhil thesis addresses this challenge by developing a new simplified FSSO system that allows end-users to access desktop systems, web-based services/applications and non-web based services/applications using one authentication process. This new system achieves this using two major components: an “Authentication Infrastructure Integration Program (AIIP)" and an “Integration of Desktop Authentication and Web-based Authentication (IDAWA)." The AIIP acquires Kerberos tickets (for end-users who have been authenticated by a Kerberos single sign-on system in one net- work domain) from Kerberos single sign-on systems in different network domains without establishing trust between these Kerberos single sign-on systems. The …

Design And Practical Implementation Of A Simple Data Acquisition System For Photovoltaic Applications, Dr. Adel A. Elbaset

Dr. Adel A. Elbaset

There are several commercial systems for testing PV modules under field conditions but they are expensive. This paper presents a design and implementation of a simple, low cost and high efficient data acquisition system for testing the photovoltaic modules under different operating conditions (different solar radiation levels and surface temperatures). It has been designed to be the laboratory basic element for the photovoltaic generators characterization. This data acquisition system is designed to acquire and then records the signals from the different sensors that are used for measuring the different parameters of the PV system. These measurements of the different parameter …

Hardware-Software Co-Design, Acceleration And Prototyping Of Control Algorithms On Reconfigurable Platforms, Desta Kumsa Edosa

UNLV Theses, Dissertations, Professional Papers, and Capstones

Differential equations play a significant role in many disciplines of science and engineering. Solving and implementing Ordinary Differential Equations (ODEs) and partial Differential Equations (PDEs) effectively are very essential as most complex dynamic systems are modeled based on these equations. High Performance Computing (HPC) methodologies are required to compute and implement complex and data intensive applications modeled by differential equations at higher speed. There are, however, some challenges and limitations in implementing dynamic system, modeled by non-linear ordinary differential equations, on digital hardware. Modeling an integrator involves data approximation which results in accuracy error if data values are not considered …

Hardware Implementation Of Processor Allocator For Mesh Connected Chip Multiprocessors, Rana Sangram Reddy Marri

UNLV Theses, Dissertations, Professional Papers, and Capstones

The advancements in the semiconductor process technology and the current demand for highly parallel computing has led to the advent of Chip Multiprocessors (CMPs). CMP is the integration of two or more independent processor cores, which can read and execute program instructions, on to a single integrated circuit die. CMPs are the main computing platforms for research and development in parallel and high performance computing environments. They offer minimum inter-core communication latencies as the processor cores are present on a single chip.

The Operating System (OS) plays a key role in using a CMP effectively. The OS should support a …

Is Tech M&A Value-Additive?, Ani Deshmukh

Undergraduate Economic Review

Given rising M&A deal volume across all high-tech subsectors, the ability to measure post-acquisition performance becomes critical. Despite this growth, the relevant academic literature is severely lacking (Kohers and Kohers 2000). Using an event-study approach, I find that acquirers and targets both realize statistically significant day-0 abnormal returns (1.23% [p<0.1] and 8.1% [p<0.01], respectively). As positive stock returns signal positive growth prospects in a semi-strong efficient market, AR regressions found that firms' technological relatedness, deal financing, purchase price premiums, and the relative book to market ratio, explained most variance. Overall, high-tech transactions are value-additive for both targets and acquirers.

At The Tone, The Time Will Be... Unknown – A Perspective On The Evolution Of Time In Telecommunications, Robert Iannucci

Robert A Iannucci

No abstract provided.

Embedded Virtual Machines For Robust Wireless Control And Actuation, Miroslav Pajic, Rahul Mangharam

Rahul Mangharam

Embedded wireless networks have largely focused on open-loop sensing and monitoring. To address actuation in closed-loop wireless control systems there is a strong need to re-think the communication architectures and protocols for reliability, coordination and control. As the links, nodes and topology of wireless systems are inherently unreliable, such time-critical and safety-critical applications require programming abstractions and runtime systems where the tasks are assigned to the sensors, actuators and controllers as a single component rather than statically mapping a set of tasks to a specific physical node at design time. To this end, we introduce the Embedded Virtual Machine (EVM), …