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Physical Sciences and Mathematics

California Polytechnic State University, San Luis Obispo

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Full-Text Articles in VLSI and Circuits, Embedded and Hardware Systems

Design And Characterization Of Standard Cell Library Using Finfets, Phanindra Datta Sadhu Jun 2021

Design And Characterization Of Standard Cell Library Using Finfets, Phanindra Datta Sadhu

Master's Theses

The processors and digital circuits designed today contain billions of transistors on a small piece of silicon. As devices are becoming smaller, slimmer, faster, and more efficient, the transistors also have to keep up with the demands and needs of the daily user. Unfortunately, the CMOS technology has reached its limit and cannot be used to scale down due to the transistor's breakdown caused by short channel effects. An alternative solution to this is the FinFET transistor technology, where the gate of the transistor is a three dimensional fin that surrounds the transistor and prevents the breakdown caused by scaling …


Asynchronous Mips Processors: Educational Simulations, Robert L. Webb Aug 2010

Asynchronous Mips Processors: Educational Simulations, Robert L. Webb

Master's Theses

The system clock has been omnipresent in most mainstream chip designs. While simplifying many design problems the clock has caused the problems of clock skew, high power consumption, electromagnetic interference, and worst-case performance. In recent years, as the timing constraints of synchronous designs have been squeezed ever tighter, the efficiencies of asynchronous designs have become more attractive. By removing the clock, these issues can be mitigated. How- ever, asynchronous designs are generally more complex and difficult to debug. In this paper I discuss the advantages of asynchronous processors and the specifics of some asynchronous designs, outline the roadblocks to asynchronous …