Open Access. Powered by Scholars. Published by Universities.®

Selected Works

Limiter

Electrical and Electronics

Publication Year

Articles 1 - 3 of 3

Full-Text Articles in Electronic Devices and Semiconductor Manufacturing

Limiters Protect Adcs Without Adding Harmonics, Chin-Leong Lim Dec 2014

Limiters Protect Adcs Without Adding Harmonics, Chin-Leong Lim

Chin-Leong Lim

High-speed Analogue to Digital Converters (ADC) are used for sampling at either the intermediate frequency (IF) or the radio frequency of wireless receivers. When the transmitter is nearby, the sampled signal can exceed the ADC’s maximum input level. So, amplitude limiting is necessary to prevent ADC damage or degradation. While automatic gain control is effective for controlling IF amplitude excursion in traditional single-carrier systems, it is not desirable in modern multi-carrier applications. One solution is to cap the IF amplitude excursion with a limiter. Unfortunately, a new problem is created – the strong non-linearity that is required of a good …


Low Loss Configuration For Integrated Pin-Schottky Limiters, Chin-Leong Lim Jul 2014

Low Loss Configuration For Integrated Pin-Schottky Limiters, Chin-Leong Lim

Chin-Leong Lim

Compared to the PIN diode limiter, the Schottky-PIN limiter improves receiver protection, but has a higher insertion loss. Low cost, plastic packaged diodes can further worsen the loss. Diode stacking, mesa diode construction, and isolating the Schottky diode with a high-impedance quarter wave line or a directional coupler can reduce loss, but detrimentally raises the limiting threshold and/or adds bulk or cost. The PIN-Schottky limiter’s insertion loss can be improved by integrating the diodes’ parasitic capacitances into a low pass ladder network, but this solution requires the PIN diode to have two anode connections. Recently, the PIN-Schottky limiter was integrated …


Limiting And Transient Performances Of A Low Loss Pin-Schottky Limiter, Chin-Leong Lim Nov 2013

Limiting And Transient Performances Of A Low Loss Pin-Schottky Limiter, Chin-Leong Lim

Chin-Leong Lim

The main cause of loss in the PIN-Schottky limiter is the diodes’ parasitic capacitances. Techniques to counter the parasitic capacitances include using bare chip, air cavity packaging, diode stacking, mesa construction, isolating the Schottky diode from the signal path and connecting the diodes to a low impedance node. But the aforementioned techniques either sacrifice cost, manufacturability, size, performances or thermal ruggedness. To reduce loss in the PIN-Schottky limiter, we re-configured its parasitics into a low pass ladder network. This paper reports on the new configuration’s changed large signal and transient performances. We observed improved isolation at 0.9 and 2.4 GHz, …